The Air and Ground Deterrence (AGD) Division develops integrated robotic systems designed to provide multi-domain situational awareness and force protection across land, sea, and air. The Sentry Hardware team with AGD serves as the key system integrator of the Anduril Sentry Family of Systems (FoS).

We are looking for an Electrical Engineer to join our rapidly growing team in Irvine, CA. This role will own rapidly developed, ruggedized electronics design in addition to scaling legacy design concepts to support full-rate production. In this role, you will partner with our Architecture and Product Management team to help drive system requirements prior to owning full PCB and/or electrical system design.

Key Responsibilities:

• Take ownership as the main point of contact for electrical integration activities.
• Provide hands-on and in-field support of prototype and production-level product.
• Collaborate with mechanical engineers to optimize selection, design, and integration of high-power components, modules, and distribution.
• Trade-off component and module selections against size, weight, power, and EMC requirements.
• Collaborate with design team to achieve reliability goals at a system level in context of concepts of operation.

Requirements:

• Minimum 5 years of professional experience.
• Self-starter with the ability to design digital & analog electronics from concept and functional prototype, to production-ready product.
• Ability to troubleshoot existing hardware to find root cause of issues and implement improvements to improve the design.
• Develop clear documentation to capture design requirements, specifications, test coverage, and test reports.
• Complete full-cycle PCB design including collecting requirements, schematic design, component selection, completion of layout, bring-up, test, debug, validation, characterization, and integration with the system.
• Work closely with other mechanical, software, firmware, and test engineers to deliver fully functional products.
• Work in a fast-paced environment supporting new developments, active deployments, and customer-operated hardware.
• Concurrently manage involvement in multiple projects at various stages.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Preferred Qualifications:

• Bachelor's Degree in Electrical Engineering or equivalent.
• 5+ years of experience designing, testing, and troubleshooting complex board designs and products.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Familiarity with switch-mode power supply design and testing.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Exceptional organization and communication skills (both written and oral).
• Proficient with Altium Designer or equivalent electronic design automation design tools.
• Proficiency with scripting languages (Python, Matlab, etc.).
• Ability to root-cause full-stack HLOS application to hardware component-level issues.

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As a Senior Circuit Designer, you will be responsible for designing embedded electronics from concept to functional prototype, including hardware selection, schematic & PCB design, board bring-up, and system level integration.

You will work closely with firmware/software engineers for processor/peripheral selection, board bring up, and troubleshooting.

You will also work in a fast-paced environment supporting new developments, active deployments, and customer operated hardware.

Concurrently, you will manage involvement in multiple projects at various stages.

Required qualifications include a Bachelor’s Degree in Electrical Engineering and 10+ years of experience designing, testing, and troubleshooting complex hardware, embedded systems, and products.

Experience with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication busses like SPI and I2C is also required.

Additionally, you should have experience with microprocessor and microcontroller selection, configuration, and interfacing, as well as competence with test equipment such as oscilloscopes, logic analyzers, debuggers, current-probes, and automation of tests.

Exceptional organization and communication skills are also necessary.

Salary range: $146,000-$194,000 USD.

Benefits include comprehensive medical, dental, and vision plans, income protection, generous time off, family planning & parenting support, mental health resources, professional development, commuter benefits, relocation assistance, and a retirement savings plan.

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Responsibilities:

• Perform detailed configuration and programming of SEL protective relays (e.g., SEL-751, SEL-787, SEL-700G, etc.) using acSELerator QuickSet and SEL Grid Configurator.
• Develop and implement custom automation logic in SEL RTAC platforms using acSELerator Architect, IEC 61131-3 languages (Structured Text, Ladder Logic), and SEL Logic Engine.
• Design and test SCADA communication protocols including DNP3, Modbus, IEC 61850 GOOSE/MMS, and SEL protocols over Ethernet and serial interfaces.
• Conduct factory acceptance testing (FAT), site acceptance testing (SAT), relay setting validation, and end-to-end functional verification.
• Generate comprehensive documentation: one-line diagrams, logic diagrams, setting files, HMI screens, and commissioning reports.
• Provide technical support during system energization, troubleshooting, and post-commissioning maintenance.
• Collaborate with project managers, SCADA engineers, and field crews to ensure seamless integration and schedule compliance.
• Remain current with SEL firmware updates, NERC CIP cybersecurity requirements, and industry best practices.

Basic Qualifications:

• Advanced proficiency in acSELerator QuickSet, Architect, and RTAC Web Interface.
• Demonstrated ability to develop complex automation sequences, synchrophasor applications, and remedial action schemes.
• Expertise in relay event analysis using SEL SynchroWAVE and Event Reporter.
• Familiarity with IEC 61850 configuration via SCL files (SCD, ICD, CID).
• SEL Authorized Training (e.g., SEL-5030, SEL-5033) preferred; PE license a plus but not required.

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In this role, you will work closely with an interdisciplinary technical team to route high-speed mixed-signal designs, interact with fabricators and assemblers, and manage signal integrity in complex PCBs.

Key responsibilities include:

• Working directly with engineers to produce printed circuit board designs supporting Anduril's products.
• Applying modern design standards and guidelines to create high-reliability, highly manufacturable assemblies.
• Implementing combinations of high-speed digital, precision analog, RF, and high-power designs.
• Leading the team in establishing internal guidelines for design for manufacturing (DFM), design for assembly (DFA), and overall quality fabrication and assembly outputs.
• Developing and refining team processes for PCB design, part creation, and library/database standards.
• Coordinating external PCB design resources during design surges.

Required qualifications include:

• A bachelor's degree in electrical engineering or similar and 5+ years of professional experience in PCB design OR 10+ years of professional experience in PCB design.
• Ability to read and interpret schematics and apply best practices appropriate for each design.
• Expertise in applying relevant IPC standards, CID, CID+ certification.
• Expertise in PCB fabrication processes, limitations, design rules, and best practice.
• Experience using Altium Designer CAD tools (Allegro is a plus).
• Experience with developing component libraries and library management.
• Excellent communication skills with multiple fab houses (ensuring boards are built to print).
• Excellent communication skills with multiple assembly houses (ensuring boards are built to BOM).
• Experience with a variety of board types, including high density and high layer count (greater than 16) digital designs, power electronics, flex circuits, and RF circuits.
• Experience with HDI (high density interconnect) and thicker boards (greater than 1.6mm).
• Experience with high speed digital interfaces and controlled impedance routing requirements like USB, PCIe, Ethernet, SERDES, and DDR memory.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Preferred qualifications include:

• Familiarity with RF board design.
• Experience with high-pin count packages (FPGA fanout).
• Familiarity with basic signal and power integrity rules (how they affect layout).

US Salary Range $111,000-$147,000 USD

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Key responsibilities include:

• Designing, commissioning, and upgrading control systems for Solid Rocket Motor production equipment
• Architecting, writing, and debugging Siemens PLC code
• Integrating internal and external FactoryOS software into automation equipment and production lines
• Leading root cause analysis and corrective actions for automation failures
• Installing, configuring, and tuning servo drives/VFDs

Required qualifications include:

• Bachelor's degree in Robotics, Computer Science, Mechanical Engineering, or Electrical Engineering
• 8+ years of experience in controls and automation in a production environment
• Strong skills in Siemens PLC programming (Ladder and Structured Text)
• Proficiency in servo drive and VFD configuration, PID tuning, STO/SS, etc.
• Strong knowledge of ethernet-based communication protocols (ProfiNET, ProfiSAFE, Ethernet IP.)
• Proficiency with electrical component selection and a solid foundation of wire sizing, circuit protection, and heat management in control cabinets
• Experience integrating with SCADA and OT Networking

Preferred qualifications include:

• 10+ years of experience in controls and automation in a production environment
• Experience working in an energetics facility
• Experience with control panel layout, electrical component selection, and cable routing
• Electrical troubleshooting up to 600VAC
• TUV FS Engineer certification (Functional Safety of Machinery)

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As a Manager, Software Engineering, you will be responsible for demonstrating end-to-end outcome ownership of a major system within an integrated product, and the team responsible for building and maintaining it. You will contribute as a team lead to the rapid architecting, design, delivery, support, and evolution of next-generation autonomous platforms through their entire product life-cycle.

Key responsibilities include:

• Empathizing with end-users and driving solutions that balance their needs with external constraints, restrictions, and requirements in a multi-stakeholder environment
• Being accountable for software-enabled solutions that are deployed to customers, optimizing for the delivery of value to the end-user
• Collaborating with your Technical Lead to architect scalable software that rapidly delivers capability beyond the scope of current platforms, with a clear path for both architecture and capability evolution over time
• Coordinating your team's roadmap and execution with other teams across Anduril, with the aim of developing components that are reusable across multiple Anduril product lines
• Contributing to the design, implementation, and execution of development processes for the initial delivery and subsequent iteration of vehicle and mission software, including full lifecycle testing, monitoring, and operation
• Managing a 6-18 month roadmap for your team, nested within broader organisational roadmap
• Managing an allocated budget for your team
• Managing programmatic risk for your team, and collaborating with your Technical Lead to manage technical risk, including sound and timely decision making
• Leading by example as a technically competent, trustworthy, and accountable team lead
• Communicating organisational vision, strategy, and direction to your team
• Defining, documenting, gaining consensus for, and communicating appropriate goals and plans for your team, derived from broader organisational vision, strategy, and priorities
• Building your team through mentoring, professional development, career management, and collaboration with Anduril's recruiting and people functions
• Working as a leader of a multi-disciplinary engineering team of 4-10 members, including as a mentor and manager for Engineers from differing backgrounds
• Reporting to a manager who may or may not have a background in software engineering
• Traveling to co-locate with end-users and/or other teams up to 20% of the time

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xAI is a technology company that aims to create AI systems to understand the universe and aid humanity in its pursuit of knowledge. We are seeking a Network Engineer - AI/HPC to join our team.

Responsibilities

• Develop and maintain large-scale networks with expertise in RoCEv2, optimizing performance and availability.
• Design and implement metric dashboards to monitor network performance.
• Collaborate with the team to design and implement the next iteration of our backend and front-end networks.
• Participate in a team on-call rotation and help with scaling and maintenance efforts.

Requirements

• Minimum 10 years designing and operating large-scale networks with 5 years in the ethernet AI/HPC space.
• Deep understanding of congestion control on ethernet with Infiniband an added bonus.
• Expertise in creating a portfolio of metrics for performance and operations to optimize the fleet for training and inference traffic.
• Experience with Python to automate away repetitive tasks and facilitate daily job working with and analyzing large sets of data.

Compensation and Benefits

$180,000 - $440,000 base salary. Comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

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We are seeking a skilled Network Engineer to join our team at xAI. As a Network Engineer, you will play a critical role in designing and operating large-scale networks for our AI and HPC systems.

Responsibilities

• Design and operate large-scale networks with a deep understanding of congestion control on ethernet and Infiniband
• Develop and optimize network configurations to ensure high performance and availability
• Collaborate with the team to design the next iteration of our backend and front-end networks
• Travel to Memphis to build capacity and participate in a team on-call rotation

Requirements

• Minimum of 10 years designing and operating large-scale networks with 5 years in the ethernet AI/HPC space
• Deep understanding of congestion control on ethernet with Infiniband an added bonus
• Expertise in creating a portfolio of metrics for performance and operations to optimize the fleet for training and inference traffic
• Experience with Python to automate away repetitive tasks and facilitate daily job working with and analyzing large sets of data

Benefits

• Opportunity to work with a highly motivated team focused on engineering excellence
• Collaborative and dynamic work environment
• Professional development opportunities

What We Offer

• Competitive salary and benefits package
• Opportunity to work on cutting-edge AI and HPC projects
• Collaborative and dynamic work environment

How to Apply

If you are a motivated and experienced Network Engineer looking for a new challenge, please submit your application, including your resume and cover letter, to [insert contact information].

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As an Integration and Test Technician, you will:

• Support the use of 'Test' as a design tool to accelerate component, system and subsystem maturation from discrete bench tests to production representative Vehicle, Mission and Support Systems
• Assemble complex electro-mechanical subsystems, high quality wire harnesses, test racks, junction boxes, and associated components involving hand soldering and component assembly and integration
• Build, sustain and operate highly representative Hardware In the Lab (HIL) and Hardware In The Loop (HITL) physical integration environments, including high voltage, high power hybrid powertrain testbeds
• Integrate developmental subsystems into uncrewed surrogate platforms (Group 2 and 3 UAS), and support ongoing flight test and maintenance operations
• Act with a strong safety mindset (stop, think, do) to execute work safely in experimental environments with the aim of eliminating potential harm to team members
• Support Test Readiness Reviews (TRR), ensuring that tests can be safety and efficiently conducted
• Execute test procedures across integration environments, efficiently capturing and reporting learnings
• Maintain configuration control of integration environments
• Support build, ground and flight test of prototype and production representative Omen Systems

The ideal candidate will have:

• Associate Degree (or similar) in Electrical/Electronics, Computer, Mechanical Technologies, or related fields
• 5+ years of component, electrical and electronics build and test experience in an R&D environment and exposure to manufacturing settings with rigorous quality systems (such as Aerospace, Electronics, or Medical industries)
• Participation in building and operating HIL/HITL/IRON BIRD environments for flight vehicles
• Experience in operating and maintaining Group 2 or 3 UAS (or larger)
• Competency in reading electrical system and component schematics, and capturing 'as-built' configurations
• Proficiency with electronics test equipment such as power supplies, electronic loads, oscilloscope, function generators, data acquisition and diagnostic sensors
• Knowledge of electronics/communications/integration troubleshooting, experience in debug of common protocols such as CAN/Ethernet/Serial
• Experience with high voltage and high power testing such as propulsion inverters, batteries and hybrid powertrains
• Competency with Linux and command line interface as well as software debugging preferable
• Excellent written, verbal, interpersonal and communication skills
• A sincere commitment to a positive, inclusive, and collaborative culture
• Eligible to obtain and maintain a security clearance in United States, United Kingdom, or Australia desirable

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We are seeking a Harness Design Engineer to join our team. The successful candidate will provide engineering expertise to design, fabricate and integrate harness systems and represent the harness discipline on a project. They will investigate, plan, design and develop harnesses to meet various technical requirements, research, select and procure appropriate connectors, back-shells, contacts, wire, shielding, and cable construction for the product to meet appropriate environmental requirements.

Responsibilities:

• Provide the engineering expertise to design, fabricate and integrate harness systems and represent the harness discipline on a project
• Investigate, plan, design and develop harnesses to meet various technical requirements
• Research, select and procure appropriate connectors, back-shells, contacts, wire, shielding, and cable construction for the product to meet appropriate environmental requirements
• Develop and generate harness system block diagrams and wire diagrams to release for production
• Participate in design reviews and provide input to identify issues and drive design choices
• Prepare harness assembly instructions and test procedures, incorporating your knowledge of industry standards and best practices
• Provide guidance to the electrical team in identifying electrical system requirements given input from internal and external stakeholders including engineering (mechanical, electrical, software), product management, quality and compliance
• Work in a fast-paced environment supporting new developments, active deployments, and customer operated hardware
• Concurrently manage involvement in multiple projects at various stages

Requirements:

• Bachelor's Degree in Electrical Engineering, Mechanical Engineering, or equivalent
• 3+ years hands-on experience designing electrical harnessing for rugged commercial, industrial, aerospace, or military applications
• Experience working directly with harness manufacturers to deliver high quality, high reliability products
• Familiarity with common electrical bus interfaces (CAN, Ethernet, RS422, RS232, 1553)
• Familiar with existing applicable harness standards as well as MIL-STD requirements
• Able to apply knowledge of SWaP for power, network and communications systems and designs
• Experience reading wire block interconnect diagrams and wire diagrams
• Exceptional organization and communication skills (both written and oral)
• Must be eligible to receive a US Security Clearance

Preferred Qualifications:

• Build 3D routed harness data files applying NX Cabling and Siemens Capital Harness
• Experience with or proficient in 3D CAD wire harness routing, such as (NX, Siemens Capital, CATIA, CREO)
• Able to read and generate formboard drawings in 2D CAD for production

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This role will focus on the research, evaluation, and development of robust onboard computing architectures, embedded systems, and high-reliability network solutions that power Saronic’s autonomous vessel platforms.

The ideal candidate will have deep experience designing and validating ruggedized electronic systems for mission-critical applications, including embedded computing, network topologies, data management, and environmental hardening for commercial maritime and defense use cases.

Key Responsibilities:

• Lead R&D initiatives in ruggedized computing and networking architectures for autonomous surface vessels.

• Design, evaluate, and integrate embedded computing systems, data acquisition units, and network infrastructures optimized for high performance in harsh marine environments.

• Conduct benchmarking and trade studies on ruggedized COTS and custom computing solutions (edge computers, network switches, routers, storage units, etc.).

• Develop and validate system architectures for high-availability networks supporting autonomy, sensing, and control subsystems.

• Collaborate with software, autonomy, and mechanical engineering teams to ensure reliable data throughput and system resilience across vessel networks.

• Specify and validate environmental and EMC/EMI compliance for computing and networking hardware.

• Prototype and test system configurations in laboratory and field conditions, including shock, vibration, temperature, and humidity testing.

• Author technical documentation, including R&D reports, trade studies, wiring diagrams, and integration standards.

• Mentor junior engineers and contribute to internal design guidelines for next-generation computing and network systems.

• Support system integration and troubleshooting during prototype builds, dockside commissioning, and sea trials.

Required Qualifications:

• B.S. or M.S. in Electrical Engineering, Computer Engineering, or related discipline.

• 7+ years of experience in electrical or systems engineering focused on computing and networking technologies in ruggedized or mission-critical environments.

• Expertise in embedded computing platforms, network design, and hardware integration.

• Experience with Ethernet, CAN, serial, and fiber-optic communication protocols and their implementation in distributed systems.

• Proven track record of benchmarking and trade study development for hardware performance and reliability.

• Familiarity with marine, aerospace, automotive or defense environmental standards (MIL-STD-810, MIL-STD-461, IEC 60945, etc.).

• Strong understanding of power distribution, grounding, and thermal management in dense electronics enclosures.

• Excellent communication skills and experience producing clear technical documentation and reports.

• Hands-on experience with system integration and environmental testing.

Preferred Qualifications:

• Experience developing or integrating ruggedized computing solutions for maritime or defense systems.

• Familiarity with network security, IEEE 1588/PTP Protocol, VLAN management, and deterministic networking for real-time systems.

• Knowledge of data logging, storage, and redundancy architectures in distributed sensor networks.

• Experience with hardware-in-the-loop (HITL) and hardware-software co-simulation environments.

• Background in autonomous or remote vehicle platforms.

• Understanding of cybersecurity standards and secure network design principles.

• Experience using 3D CAD tools to communicate with other engineering groups (e.g. Siemens NX, Creo, SolidWorks)

• Experience utilizing ECAD tools to define/draw single line diagrams and schematics (e.g. Altium, Zuken, AutoCAD, Siemens Capital)

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The ideal candidate has extensive experience in RF system design, testing, and benchmarking, with a strong foundation in wireless communications, spectrum management, and signal propagation in marine environments. This is a technically demanding, research-focused position with opportunities to influence system architecture and future platform capabilities.

Key Responsibilities:

• Lead R&D efforts in RF communications, radar, and electronic sensing technologies for autonomous surface vessels.
• Evaluate and benchmark RF hardware and subsystems, including radios, antennas, and signal processing modules across multiple frequency bands (VHF/UHF, L/S/C/X bands).
• Conduct trade studies and comparative analyses of commercial and military-grade RF solutions to inform system selection and integration strategies.
• Design, prototype, and test RF systems and supporting electrical architectures, including cabling, shielding, and power interfaces.
• Model and analyze RF propagation and link performance in maritime and littoral environments.
• Collaborate cross-functionally with autonomy, software, and mechanical teams to ensure seamless integration of communication and sensing systems.
• Develop test procedures, perform validation trials, and analyze system performance under operational and environmental conditions.
• Author detailed R&D documentation, including technical reports, design specifications, and performance evaluations.
• Mentor junior engineers and contribute to Saronic’s RF technology roadmap and internal knowledge base.
• Support field testing and vessel trials, including setup and troubleshooting of communication and radar systems.

Required Qualifications:

• B.S. or M.S. in Electrical Engineering, RF Engineering, or related discipline.
• 7+ years of professional experience in RF system design, testing, and integration -preferably in maritime, automotive, aerospace, or defense applications.
• Deep understanding of RF theory, antenna design, and signal propagation, including real-world marine effects (multipath, reflection, attenuation).
• Hands-on experience with RF instrumentation (spectrum analyzers, network analyzers, signal generators, power meters, etc.).
• Proven ability to conduct trade studies and technology benchmarking for RF components and systems.
• Familiarity with communications protocols such as Ethernet, CAN, and serial interfaces, and with wireless standards (LTE, SATCOM, mesh networking).
• Strong documentation and communication skills; able to translate test results into actionable design insights.
• Ability to work effectively in both lab and field test environments (dockside, at-sea, and range conditions).

Physical Requirements:

• Prolonged periods of sitting at a desk and working on a computer.
• Occasional standing and walking within the office.
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.
• Visual acuity to read screens, documents, and reports.
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

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This position focuses on research, evaluation, and integration of imaging and sensing systems - including visible, thermal, and multispectral cameras - that support autonomous vessel perception, situational awareness, and target tracking.

The ideal candidate will lead efforts in system benchmarking, performance analysis, and trade study development for EO/IR technologies across multiple market offerings. This role combines hands-on testing, technical analysis, and system-level design to shape Saronic’s next generation of perception capabilities.

Key Responsibilities

• Lead R&D efforts related to electro-optical and infrared imaging systems for autonomous maritime platforms.
• Research, evaluate, and benchmark commercial and defense-grade EO/IR camera systems, gimbals, and sensor modules under laboratory and field conditions.
• Develop and execute trade studies comparing performance, cost, reliability, and integration complexity across multiple market options.
• Design and validate electrical interfaces and integration pathways between EO/IR systems and onboard compute, storage, and autonomy networks.
• Conduct performance testing including resolution, sensitivity (NETD), dynamic range, stabilization, and environmental endurance.
• Collaborate cross-functionally with autonomy, software, and mechanical teams to integrate EO/IR data into vessel perception and situational awareness pipelines.
• Prototype and field-test camera system installations, including power distribution, data acquisition, and network integration.
• Author detailed R&D documentation, including benchmarking reports, design specifications, and integration guidelines.
• Stay current with emerging technologies in imaging sensors, optics, image stabilization, and AI-enabled perception systems.
• Mentor junior engineers and help define internal best practices for optical system evaluation and selection.

Required Qualifications

• B.S. or M.S. in Electrical Engineering, Optoelectronics, or related field.
• 7+ years of experience in electrical or related engineering with a focus on EO/IR imaging or sensing systems.
• Proven expertise in camera system integration, including power, data, and control interfaces.
• Experience conducting R&D evaluations, trade studies, and comparative testing of sensor systems.
• Solid understanding of optical and infrared imaging principles - resolution, FOV, sensitivity, dynamic range, and spectral response.
• Hands-on experience with digital video interfaces and standards (GigE Vision, MIPI, USB3 Vision, SDI, Camera Link, etc.).
• Familiarity with thermal camera technologies, including cooled and uncooled detectors (LWIR, MWIR, SWIR).
• Experience with mechanical and electrical integration of EO/IR systems into ruggedized or mobile platforms.
• Strong documentation, data analysis, and presentation skills.
• Comfortable working in lab, dockside, and field-test environments for camera calibration and evaluation.

Preferred Qualifications

• Background in maritime, aerospace, or defense sensor systems development.
• Familiarity with AI/ML-based image processing and data fusion for autonomous perception.
• Experience with environmental qualification and compliance testing (MIL-STD-810, DO-160, IEC 60945).
• Knowledge of optical system alignment, lens calibration, and stabilization systems.
• Experience integrating EO/IR systems into networked computing environments (Ethernet/IP, TSN, or deterministic networking).
• Proficiency with data analysis tools such as MATLAB, Python, or similar platforms for sensor performance evaluation.
• Understanding of radiometric calibration, sensor modeling, or image quality metrics (MTF, SNR, dynamic range).

Benefits

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

Physical Requirements

• Prolonged periods of sitting at a desk and working on a computer.
• Occasional standing and walking within the office.
• Manual dexterity to operate a computer keyboard, mouse, and other office equipment.
• Visual acuity to read screens, documents, and reports.
• Occasional reaching, bending, or stooping to access file drawers, cabinets, or office supplies.
• Lifting and carrying items up to 20 pounds occasionally (e.g., office supplies, packages).

Additional Information

This role requires access to export-controlled information or items that require “U.S. Person” status. As defined by U.S. law, individuals who are any one of the following are considered to be a “U.S. Person”: (1) U.S. citizens, (2) legal permanent residents (a.k.a. green card holders), and (3) certain protected classes of asylees and refugees, as defined in 8 U.S.C. 1324b(a)(3).

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Responsibilities:

• Install, calibrate, and commission instrumentation and control system components including sensors, transmitters, valves, actuators, and controllers
• Perform routine preventive maintenance on PLCs, HMIs, VFDs, and associated field devices
• Troubleshoot and diagnose electrical, pneumatic, and control system faults using schematics, ladder logic, and diagnostic tools
• Assist controls engineers with system upgrades, modifications, and startup activities
• Monitor and maintain SCADA/HMI systems, reporting anomalies and performing basic configuration changes as directed
• Read and interpret electrical schematics, P&IDs, loop diagrams, and technical manuals
• Document maintenance activities, equipment history, and calibration records in the CMMS
• Maintain instrument calibration records and ensure traceability to applicable standards
• Follow all safety procedures including LOTO (Lockout/Tagout), arc flash, and confined space protocols
• Coordinate with operations to minimize process disruptions during maintenance windows
• Support reliability improvement initiatives and root cause analysis (RCA) efforts

Qualifications:

• Associate's degree or technical diploma in Instrumentation, Electrical Technology, Electronics, or a related field , or equivalent military/vocational training
• 2+ years of hands-on experience in industrial instrumentation and controls maintenance
• Working knowledge of PLC systems (e.g., Allen-Bradley, Siemens) and the ability to navigate and monitor ladder logic
• Experience with instrumentation calibration tools and procedures
• Solid understanding of 4-20mA loops, HART communication, and discrete wiring
• Ability to read and interpret electrical drawings, P&IDs, and loop sheets
• Familiarity with industrial safety practices including LOTO and electrical safety (NFPA 70E)

Preferred Qualifications:

• ISA Certified Control Systems Technician (CCST) – Level I or II
• Experience with pneumatic and electro-pneumatic control valve maintenance
• Familiarity with industrial communication protocols (Modbus, Profibus, EtherNet/IP)
• Experience using a CMMS (e.g., SAP PM, Maximo, Infor)
• Knowledge of functional safety and safety instrumented systems (SIS)
• Experience in Oil & Gas / Manufacturing / Maritime

Physical Requirements:

• Must be able to work at heights, in confined spaces, and in outdoor environments as needed
• Ability to lift up to 50 lbs and stand for extended periods
• May require shift work, on-call rotation, or overtime during shutdowns and emergencies

Benefits:

• Medical Insurance: Comprehensive health insurance plans covering a range of services
• Dental and Vision Insurance: Coverage for routine dental check-ups, orthodontics, and vision care
• Saronic pays 100% of the premium for employees and 80% for dependents
• Time Off: Generous PTO and Holidays
• Parental Leave: Paid maternity and paternity leave to support new parents
• Competitive Salary: Industry-standard salaries with opportunities for performance-based bonuses
• Retirement Plan: 401(k) plan
• Stock Options: Equity options to give employees a stake in the company’s success
• Life and Disability Insurance: Basic life insurance and short- and long-term disability coverage
• Additional Perks: Free lunch benefit and unlimited free drinks and snacks in the office

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We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are: You are an accomplished verification engineer with a passion for excellence and a track record of delivering robust, high-quality IP solutions. You thrive in a fast-paced, dynamic environment and are excited by the opportunity to work on next-generation connectivity protocols that power commercial, enterprise, and automotive applications. With a solid foundation in Electrical/Electronics Engineering (BSEE with 5+ years or MSEE with 3+ years of relevant experience), you bring deep expertise in System Verilog and industry-standard verification methodologies such as UVM/OVM/VMM. Your hands-on experience developing HVL-based test environments and extracting meaningful verification metrics sets you apart as a technical leader.

You are a collaborative team player who values knowledge sharing and actively contributes to a culture of continuous improvement. Your familiarity with protocols like MIPI-I3C, UFS, AMBA, Ethernet, DDR, PCIe, and USB allows you to quickly ramp up on new projects and deliver results. You bring a strong analytical mindset, exceptional debugging skills, and a drive to meet and exceed quality metrics. Experienced with scripting languages like Perl, TCL, and Python, you automate processes for efficiency and scalability. Your strong communication skills, initiative, and global perspective enable you to work effectively with cross-functional and multi-site teams. Above all, you are a lifelong learner who embraces challenges, adapts to new technologies, and is committed to shaping the future of silicon design.

What You’ll Be Doing: Specify, architect, and implement advanced verification environments for DesignWare IP cores using System Verilog and state-of-the-art methodologies. Develop and execute comprehensive test plans, ensuring coverage of unit-level and system-level requirements. Design, code, and debug testbenches, test cases, and functional coverage models to validate complex IP functionalities. Perform functional coverage analysis and manage regression testing to achieve and maintain required quality metrics. Collaborate closely with RTL designers and global verification teams to resolve issues and drive verification closure. Leverage scripting (Perl, TCL, Python) to automate verification flows, streamline processes, and enhance productivity. Contribute to the development and refinement of verification methodologies, including VIP development and formal verification approaches.

The Impact You Will Have: Ensure the delivery of high-quality, robust IP cores that power critical applications in commercial, enterprise, and automotive markets. Drive innovation in verification methodologies, setting new standards for efficiency and coverage. Enhance time-to-market by identifying and resolving design and verification issues early in the development cycle. Strengthen Synopsys’ reputation as a leader in silicon IP and verification through technical excellence and customer focus. Mentor and support junior engineers, fostering a culture of learning and continuous improvement. Contribute to the success of global, multi-site R&D teams by providing expertise and driving cross-functional collaboration.

What You’ll Need: BSEE with 5+ years or MSEE with 3+ years of relevant experience in ASIC or IP verification. Expertise in developing HVL (System Verilog)-based verification environments and testbenches. Strong hands-on experience with industry-standard simulators (VCS, NC, MTI) and debugging tools. Proficiency in verification methodologies such as UVM, OVM, or VMM; exposure to formal verification is highly desirable. Solid understanding of protocols such as MIPI-I3C/UFS/Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, USB. Familiarity with scripting languages (Perl, TCL, Python) and HDLs (Verilog); experience with VIP development is a plus. Demonstrated ability to work with functional coverage-driven methodologies and quality metric goals.

Who You Are: Analytical thinker with strong problem-solving and debugging skills. Excellent verbal and written communication abilities. Team player who thrives in collaborative, multi-site environments. Proactive, self-motivated, and able to take initiative on challenging projects. Detail-oriented, quality-focused, and driven by a desire to excel. Adaptable and eager to continuously learn and apply new technologies.

The Team You’ll Be A Part Of: You will join the Solutions Group’s DesignWare IP Verification R&D team, a highly skilled and diverse group of engineers dedicated to delivering world-class IP cores for next-generation connectivity. The team operates in a collaborative, multi-site environment, leveraging global expertise to solve complex verification challenges. Together, you will drive innovation, share knowledge, and uphold Synopsys’ reputation for technical leadership and excellence.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

A peek inside our office

Benefits: At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

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Our high-speed interface IP (PCIE/CXL/USB/DP) subsystem solution is gradually becoming a key module of AI acceleration, GPGPU, Big-Data SOC chips. More and more customers have adopted our latest PCIE GEN6/GEN7 with CXL/IDE to improve security, reduce system latency, and meet the high bandwidth demands of high-end SOCs such as various cloud services, AI, and GPGPU.

Responsibilities:

• Implement IP (PCIE/CXL/USB/DP) subsystem design using synthesis, timing optimization, SDC writing, CDC/RDC checking, etc.
• Work with internal teams and customers to ensure successful integration and validation of the IP subsystem.
• Collaborate with cross-functional teams to develop and maintain design documentation, test plans, and other deliverables.

Requirements:

• Minimum 5+ years of experience in IP/ASIC/SOC design implementation.
• Hands-on experience in synthesis, timing optimization, SDC writing, CDC/RDC checking, etc.
• Domain understanding of one of the interface standards: PCIe, USB, Display Port, Ethernet, or DDR.
• Good communication skills while interacting with internal teams and customers.

Preferred Experience:

• Experience in Design Compiler, Fusion Compiler, PrimeTime, Spyglass, or VC Spyglass.
• Experience in DesignWare Core IPs or PHYs.
• Experience in TCL, Perl, Python, or other shell scripting.

Benefits:

• Competitive salary and benefits package.
• Opportunities for professional growth and development.
• Collaborative and dynamic work environment.

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As a Sr. Staff Engineer, you will be a key member of our Emulation/Validation team, responsible for bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.

Key responsibilities include:

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.
• Collaborating cross-functionally to optimize workflows, standardize methodologies, and ensure compliance with organizational goals.
• Mentoring and guiding junior engineers, fostering a culture of innovation and continuous improvement.

The impact you will have includes enhancing cross-functional collaboration to elevate product quality and end-customer satisfaction, transforming the approach to Emulation IP usage in validating cutting-edge digital designs and system architectures, and driving innovation by defining and refining requirements for IP product development, particularly in emulation contexts.

To succeed in this role, you will need 8+ years of relevant experience in emulation, verification, or IP product development, expert-level knowledge of PCIe/ DDR/ Ethernet interfaces, including protocol and verification strategies, extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification, and a demonstrated track record in leading IP product development initiatives with a focus on emulation.

If you are a proactive and collaborative problem-solver with a passion for excellence, innovative thinker who embraces change and seeks out opportunities for continuous improvement, strong communicator able to articulate complex technical concepts to diverse audiences, resilient and adaptable, thriving in dynamic environments and embracing new challenges, and committed to mentoring others and fostering an inclusive, team-oriented culture, then we encourage you to apply for this exciting opportunity.

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As an R&D Engineering Manager, you will be responsible for leading and mentoring a team of 4+ engineers, providing technical guidance and fostering a growth-oriented environment. You will collaborate with Product Management to define, prioritize, and execute on the product roadmap for vECU simulation solutions. You will oversee the end-to-end delivery of robust, scalable simulation and testing solutions, ensuring high-quality implementation and smooth release execution.

Key responsibilities include:

• Leading and mentoring a team of engineers
• Collaborating with Product Management to define and execute on the product roadmap
• Overseeing the end-to-end delivery of simulation and testing solutions
• Guiding software architecture evolution
• Establishing and promoting technical best practices
• Managing hiring, performance, and career development

You will be responsible for driving the adoption of innovative simulation technologies, enhancing Synopsys' reputation as a global leader in EDA and system solutions. You will shape the technical roadmap and strategic direction of simulation offerings, ensuring alignment with emerging market needs.

As a successful R&D Engineering Manager, you will have a proven track record of delivering high-impact projects on time and within budget. You will be a strategic thinker with the ability to influence and drive decisions that impact department and organizational success. You will be committed to quality, reliability, and continuous improvement in all aspects of engineering work.

You will join the Systems Software Group, a dynamic and innovative team at the heart of Synopsys' market-leading emulation, FPGA prototyping, virtual prototyping, verification IP, and optical design technologies. Our team is passionate about delivering disruptive solutions for automotive, mobile, networking, and AI applications. We value collaboration, creativity, and technical excellence, and are dedicated to enabling our customers to create better, faster, and more reliable software and hardware systems.

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Your primary responsibilities will include:

• Designing, developing, and optimizing simulation solutions for vECUs
• Taking ownership of feature development from requirements gathering through design, coding, testing, and deployment
• Developing and executing comprehensive unit and integration tests to validate software functionality and reliability
• Participating in code reviews, design discussions, and Agile ceremonies to drive best practices and continuous improvement within the team
• Supporting debugging and issue resolution across both Windows and Linux-based environments
• Designing, developing, and maintaining robust CI/CD workflows to automate build, test, and deployment processes in both local and cloud environments

As a Senior Engineer, you will have the opportunity to work on cutting-edge projects and collaborate with a talented team of engineers to deliver innovative solutions.

If you are a motivated and experienced engineer with a passion for software development and a desire to work on challenging projects, we encourage you to apply for this exciting opportunity.

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ASIC/SoC Presales Applications Engineer - 16648

Sunnyvale, California, United States

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Category: EngineeringHire Type: Employee

Job ID 16648Base Salary Range $184000-$276000Date posted 03/31/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned ASIC, SoC, or Chiplet Architect, Manager, or Design Engineer, bringing extensive expertise in IC Digital, Mixed Signal, or Analog Design. Your technical prowess is matched by your ability to engage and inspire customers, translating complex engineering concepts into clear, impactful solutions. You thrive in fast-paced, dynamic environments and are adept at navigating competitive landscapes. Your organizational skills and self-motivation ensure you deliver on ambitious goals, while your creative approach to problem-solving enables you to overcome challenges with finesse. You build trust and rapport quickly, fostering long-lasting relationships with both internal teams and external stakeholders. With a Bachelor’s (15+ years) or Master’s (11+ years) degree in a relevant field, you understand industry protocols such as SerDes, UCIe, PCIe, DDR, USB, MIPI, or Ethernet, bringing added value to each engagement. You are passionate about driving technology forward and contributing to customer success, ready to make a significant impact at Synopsys.

What You’ll Be Doing:

• Presenting Synopsys solutions to senior managers and technical stakeholders, showcasing the value and capabilities of our IP portfolio.

• Engaging with customers to understand their unique requirements and challenges, proposing tailored technical solutions that meet their needs.

• Positioning Synopsys competitively in technical discussions, articulating differentiators and advantages in the marketplace.

• Liaising between technical, marketing, and sales teams to ensure seamless communication and alignment on project objectives.

• Driving strategy and execution for technical solution design, influencing customer architectures and product adoption.

• Supporting sales and business unit negotiations with expert insight into technical feasibility, solution fit, and value proposition.

The Impact You Will Have:

• Lead customer engagements, ensuring Synopsys solutions align perfectly with client requirements and goals.

• Collaborate across global teams to deliver innovative, winning solutions that drive business growth.

• Accelerate adoption of Synopsys products and platforms within key customer accounts.

• Provide critical technical insight, shaping the design and success of customer chip projects.

• Drive customer and business success by enabling efficient, high-performance SoC and ASIC design.

• Ensure successful delivery of complex SoC projects across multiple regions, supporting Synopsys' reputation as a market leader.

What You’ll Need:

• Deep expertise in IC design, including Digital, Mixed Signal, or Analog domains.

• Experience in customer-facing roles, technical sales, or sales support within the semiconductor industry.

• Exceptional communication skills, able to convey complex technical concepts to diverse audiences.

• Strong organizational and project management abilities, driving multiple projects to completion.

• Solid understanding of major semiconductor IP product lines and industry protocols (SerDes, UCIe, PCIe, DDR, USB, MIPI, Ethernet).

Who You Are:

A creative problem solver and strategic thinker, you excel at collaborating with diverse teams and stakeholders. You are driven by a passion for technology, innovation, and customer success, bringing a positive, solutions-oriented mindset to every challenge. Your adaptability and leadership enable you to thrive in high-pressure situations, while your integrity and commitment build trust across all levels of the organization.

The Team You’ll Be A Part Of:

You’ll join a collaborative group dedicated to delivering groundbreaking chip design solutions using Synopsys IP. The team works closely with Sales, R&D, and Marketing, fostering a supportive and innovative environment where your ideas and expertise will help shape next-generation semiconductor products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

13752

Remote Eligible

No

Date Posted

12/16/2025

Responsibilities

• Reviewing Die, package, and PCB physical layout designs
• Modelling, simulating, and verifying high-speed interface performance against specifications
• Participating in the improvement of SI/PI methodology flows
• Collaborating and networking with other teams on task-oriented projects
• Independently driving SI/PI research and development activities

Impact

• Enabling SI/PI sign-off of high-speed interfaces for various Customer SoC/PKG/PCB designs targetting different applications
• Improve SI/PI methodology flows, increasing efficiency and accuracy
• Foster collaboration and innovation across globally distributed teams
• Drive research and development initiatives of next gen IP's (MRDIMM, LPDDR6, HBM4, UCIE) to stay ahead in the industry and offer guidance to our customers
• Support Synopsys' mission to lead in the Era of Pervasive Intelligence

Requirements

• Bachelor's or Master's degree in Electrical or Electronics Engineering
• Minimum of 8 years of relevant experience
• Proficient in Transmission line theory and time/frequency-domain analysis
• Experienced with SPICE and familiar with 3D field solvers
• Conversant with working of DDR, HBM, UCIE and PCIe/Ethernet interfaces
• Good verbal and written English communication skills
• Experience in scripting languages such as Python and TCL is a plus
• Familiarity with both Windows and Linux operating systems

Who You Are

You are a proactive and innovative engineer who thrives in a collaborative environment. You have a strong technical background and excellent problem-solving skills. Your ability to communicate effectively and work well with diverse teams makes you an asset to any project. You are dedicated to continuous learning and development, and your passion for technology drives you to stay ahead of industry trends. You are adaptable, detail-oriented, and committed to delivering high-quality results.

Team

You will be working with a group of highly-skilled, supportive, and globally spread-out teams. Our team is dedicated to driving innovation and excellence in SIPI analysis of high speed interface IP's. We value collaboration, continuous learning, and a can-do attitude. Together, we strive to develop the most advanced technologies and deliver exceptional results for our clients.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

Job Description

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over four years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures.

Responsibilities

Architecting and implementing state-of-the-art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications.

Translating standard and functional specifications into detailed micro-architectures and comprehensive design documentation for medium to high complexity features.

Leading and contributing hands-on to RTL coding, synthesis, CDC analysis, debug, and test development tasks.

Collaborating with global teams and engaging directly with customers to understand and refine specification requirements.

Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&R-aware synthesis using tools such as Fusion Compiler.

Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies.

Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field.

4+ years of hands-on industry experience in ASIC RTL design, with a strong portfolio of completed projects.

Deep expertise in data path and control path design, including experience with Reed Solomon FEC, BCH codes, CRC architectures, and MAC SEC engines.

Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis.

Familiarity with high-speed design (>600MHz), P&R-aware synthesis, and EDA tools such as Fusion Compiler.

Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation.

Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI).

Exposure to quality processes in IP design and verification is an advantage.

Prior experience as a technical lead or mentor is highly desirable.

Who We Are Looking For

Innovative thinker with a solutions-oriented mindset and a passion for technology.

Excellent communicator who thrives in collaborative, multicultural, and multi-site environments.

Natural leader with mentoring abilities, fostering inclusion and diversity within the team.

Detail-oriented professional with strong analytical and problem-solving skills.

Self-motivated, adaptable, and eager to drive technical excellence and process improvements.

Committed to continuous learning and staying ahead of industry trends.

The Team You’ll Be A Part Of

You will join the R&D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting-edge IP cores that enable Synopsys’ global customers to achieve their design goals.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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Your work will involve hands-on troubleshooting and repair of compute, storage, interconnect and cooling systems to keep our large GPU/CPU cluster healthy and scalable. You will also be responsible for leading complex interventions, advanced diagnostics, guiding and uplifting L1s, process and automation, safety and compliance, and parts and logistics.

To be successful in this role, you will need 5+ years of experience in data center/server hardware or L2/L3 hardware support, with proven complex hands-on work in production (HPC/AI/Cloud at scale). You should have end-to-end hardware expertise, including comfort with CPU/memory/PCIe cards, NICs, PSUs, drives, network, power and cooling. You should also be confident in analyzing BMC/IPMI logs, linux software logs and crashes simple CLI checks, and have methodical root cause analysis skills.

The ideal candidate will be willing to travel between sites (Paris area or nearby regions, occasionally in Europe or US) and have a strong understanding of safety and discipline, including impeccable ESD/LOTO/PPE habits, zero rough handling, and clean, labeled, auditable work.

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At Mistral AI, we believe in the power of AI to simplify tasks, save time, and enhance learning and creativity. Our technology is designed to integrate seamlessly into daily working life.

We are a company that democratizes AI through high-performance, optimized, open-source and cutting-edge models, products and solutions. Our comprehensive AI platform is designed to meet enterprise needs, whether on-premises or in cloud environments.

Our offerings include le Chat, the AI assistant for life and work. We are a team passionate about AI and its potential to transform society.

Role Summary

Our compute footprint is growing fast to support our science and engineering teams. We’re hiring a Datacenter HW Engineer to maintain, troubleshoot, and scale our GPU/CPU clusters safely and reliably.

What you will do

• Diagnose & operate core server/cluster components - Investigate and handle compute/storage hardware issues (CPU, memory, drives, NICs, GPUs, PSUs) and interconnect problems (switches, cables, transceivers; Ethernet/InfiniBand).
• Safety & procedures - Apply lockout/tagout (LOTO) and ESD discipline; follow pre/post-work checklists; maintain tidy, safe work areas.
• First-line diagnostics - Triage using LEDs, POST, beep codes and basic tests; capture evidence (photos, serials, results); open/update/close tickets with clear notes.
• Preventive maintenance - Provide feedback and ideas to improve proactive activities, monitoring, and targeted follow-ups on recurring or specific anomalies; help turn ad-hoc checks into SOPs, alerts, and dashboards.
• Parts & logistics - Receive and track parts, keep labeled inventory accurate, manage simple RMAs, and coordinate with vendors.
• Collaboration & escalation - Partner with senior hardware/firmware owners on complex or multi-node issues; communicate status and next steps crisply.
• Documentation & quality - Keep SOPs/checklists current; ensure zero undocumented changes and consistent, audit-ready records.

About you

• Hands-on mindset in datacenters/server hardware: you can install/re-seat/swap GPU/PCIe cards, NICs, PSUs, drives, and work cleanly in racks (rails, cabling, labeling).
• Disciplined and meticulous: follows checklists, ESD/LOTO; no rough handling; careful with all high-value server components.
• Practical electrical basics: power-off, PPE, short-circuit risk awareness.
• Comfortable in racks: cooling, network, storage, PDU, cable management; can lift/mount safely (within HSE limits).
• Clear communicator: short factual updates; reliable teammate; punctual and process-minded.
• Hardware-passionate, professionally grounded: strong curiosity and craft mindset.

Nice to have

• HPC/AI/Cloud at scale experience (production environments), large-fleet/server install & maintenance in datacenters.
• Basic networking (Ethernet/InfiniBand) and basic Linux (boot/check; no coding needed).
• Coding/automation skills (Python/Bash): small tools/scripts to improve checklists, photo/serial capture, inventory sync, or simple monitoring/reporting.
• Experience with inventory/RMA tools and vendor coordination.
• Exposure to HPC/research/industrial environments.

What we offer

• Competitive salary and equity package
• Health insurance
• Transportation allowance
• Sport allowance
• Meal vouchers
• Private pension plan
• Generous parental leave policy

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At ADAM Audio, our commitment to excellence and cutting-edge engineering drives our mission to deliver ground-breaking solutions to our customers. As an Embedded Software Engineer, you will be collaborating closely with cross-functional and multi-cultural teams across the company and external partners, to define, prototype and develop products from early sketches on to market introduction and maintenance.

On a day-to-day basis, you'll be responsible for providing the firmware code for our hardware products, including evaluation of new technologies, debugging prototype hardware and ensuring your code is suitable for mass production and complies with latest market regulations (CE, FCC, CRA etc.). You'll have the opportunity to shape the direction of our embedded projects and you'll be involved in the project's lifecycles.

You'll be refining product specifications, producing innovative designs and solutions and engaging with a multi-discipline team. You'll be planning your activities, estimating your work and collaborating to meet deadlines and product requirements as well as working hands-on at functional prototypes and evaluation boards to debug and test electronic hardware designs with your code on it.

Individual and team development is important, and we'll support you as you look for ways to grow and improve your personal knowledge and skills. We'll also be looking for you to own and help improve our approach to embedded software engineering, including best practices, processes, and tools. There will also be opportunities to share knowledge and practices with all companies across the Focusrite group.

Responsibilities

• Collaborate with cross-functional teams to define, prototype and develop products
• Provide firmware code for hardware products
• Evaluate new technologies and debug prototype hardware
• Ensure code is suitable for mass production and complies with market regulations
• Shape the direction of embedded projects and participate in project lifecycles
• Refine product specifications and produce innovative designs and solutions
• Engage with multi-discipline teams and work hands-on at functional prototypes and evaluation boards

Requirements

• Expert experience with micro-controllers and audio DSP
• Mastery in low-level programming at ARM-based-microcontrollers (STM32, NXP, etc.) and RTOS
• Experience in C and modern C++ programming and common frameworks like Zephyr
• Experience in working at systems with hard real-time constraints
• Mastering a range of test equipment: oscilloscopes, logic analysers, bus analysers and audio analysers (Audio Precision)
• Experience with meeting compliance regulations and standards (CE, FCC, EMC, RED, LVD etc.) for USB-, wireless- and Ethernet-connectivity, and battery powered devices
• Experience with common Bluetooth and RF SoCs like Qualcomm, Airoha, Bestec etc.
• Experience with networking protocols and chips/modules for Ethernet, WiFi and BLE
• Strong ability to analyse and present trade-offs between cost, quality, and development time
• Hands-on problem-solving and debugging skills, including lab work (test equipment, soldering etc.)
• Excellent communication skills and ability to collaborate effectively with multi-disciplinary teams
• Good English language skills (spoken and written) and ideally good German language skills.

What we offer

• Flexible working hours for a better work-life balance
• A healthy mix of remote and office work
• A harmonious and appreciative working atmosphere
• Work on exciting projects in a unique industry as part of an international brand group
• Employee discounts, including on Focusrite, Novation and Sequential products
• Opportunities for professional development
• ADAM Audio bonus programme – our employees share in the company's joint success!
• Company pension scheme, ADAM Audio health programme, mental health first aiders, FeelGood Manager, Business Bike programme, regular staff events and much more.

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Working within a small, highly skilled R&D team, you'll collaborate closely with software engineers, sound designers, and product specialists to bring innovative products from concept to production.

Key Responsibilities

• Design, develop, and test embedded hardware and firmware for audio processing and control systems.
• Contribute to schematic capture, PCB design, and prototype assembly.
• Develop and maintain embedded C/C++ firmware for real-time DSP, network, and control applications.
• Work with cross-functional teams to integrate embedded systems with software and hardware platforms.
• Support the full product lifecycle from concept and prototyping through to production and field deployment.
• Conduct hardware bring-up, debugging, and performance optimization.
• Liaise with manufacturing partners to ensure design-for-manufacture (DFM) and design-for-test (DFT) requirements are met.

Skills and Experience

• Degree in Electronic Engineering, Computer Engineering, or a related discipline.
• Strong experience in embedded systems design using C/C++.
• Experience with schematic capture and PCB layout (e.g. Altium, KiCad).
• Familiarity with ARM Cortex-M or similar microcontroller architectures.
• Embedded Linux experience.
• Understanding of digital and analog audio circuit design.
• Experience with communication protocols such as SPI, I²C, UART, Ethernet and USB.
• Proficient in debugging hardware and firmware using oscilloscopes, logic analysers, and other lab tools.

Benefits

• Life Assurance
• Income Protection
• Pension
• Bike2work scheme
• 25 days holiday (increasing with service)
• Medical Cash Plan and Private Healthcare options
• substantial staff discount on company products

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You are an experienced ASIC Digital Signoff Engineer with a deep passion for developing cutting-edge technology and direct hands-on experience with EM and IR flows. With over 10 years of hands-on experience, you have honed your skills in high-speed digital IP cores and/or SOCs development. You have a solid understanding of digital design flows and deep expertise in Static Timing Analysis (STA), Power Analysis, and EM/IR for advanced node designs.

Your technical expertise is complemented by your ability to foster cross-functional collaboration, driving innovation and effective communication across global teams. Your analytical mind and problem-solving skills enable you to tackle complex challenges and deliver high-quality results. You are known for your clear and concise documentation, and your familiarity with Synopsys tools and high-speed interface protocols is a significant advantage.

You will develop and deploy advanced node signoff methodologies for cutting-edge IP designs targeting different foundries. You will work with leading edge designs and teams to drive the industry best PPA for IP designs. You will evaluate and exercise various aspects of the development flow which include signoff timing, power, physical verification, EM/IR analysis, and ECO's.

You will develop and maintain best in class digital design methodologies, including documentation, scripts, and training materials. You will work as a liaison between EDAG tool and IP design teams. You will continuously improve and refine design processes to enhance efficiency and performance.

You will have a BS or MS in EE with 10+ years of hands-on experience developing high-speed digital IP cores and/or SOCs. You will have knowledge of IP deliverables, ASIC implementation and physical design flow and tools, memories, logic libraries, and PDK versions. You will have direct hands-on experience with enabling advanced node Redhawk SC EM and IR flows.

You will have the ability to facilitate cross-functional collaboration, including fostering innovation, improving communication, and driving results. You will have good analysis, debugging, and problem-solving skills. You will have solid written and verbal communication skills and the ability to create clear and concise documentation and provide trainings.

You will have familiarity with other Synopsys tools such as StarRC and ICV is a plus. You will have working knowledge of high-speed interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR is a plus.

You will drive innovation in high-speed digital IP core and Subsystem development. You will enhance the efficiency and effectiveness of our design and verification processes. You will contribute to the development of state-of-the-art technology that powers the next generation of intelligent systems. You will ensure the highest quality standards in the design and implementation of our products.

You will facilitate seamless collaboration across global teams, fostering a culture of innovation and excellence. You will support the continuous improvement of our design methodologies and tools, staying at the forefront of industry advancements.

You will join the Interface IP Digital Design Methodology team, working with global teams to define best practice ASIC design standards and flows. This team is dedicated to supporting IP development teams and is involved with next-generation SerDes and Memory interface controllers, PHYs, and subsystems.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Responsibilities

• Utilize sound knowledge to design and implement vision control systems, familiar with different types of vision cameras and their programming software
• Continuously evaluate equipment for improvement for quality and delivery
• Use FIS plant monitoring software to review cycle times of equipment, review and follow up project installations
• Reprogram equipment for engineering changes and improvements
• Update program backups for machinery and automation
• Program new installations of automation, machinery, material handling, and robots
• As part of a team, review risk assessments and evaluate equipment safety
• Assist in training manufacturing personnel and plant electricians
• Read and modify electrical prints and schematics, Auto CAD
• Maintain familiarity with OA, CPN/MPN networks and communication protocols for connecting to wireless and wired networks
• Manage installation and maintenance of virus protection software for controls network PCs, perform PC backup disc images and installation of communication and firmware and controls software

Qualifications

• High School Diploma or GED
• 4 or more years of Controls Engineering experience (internship and coop experience will be considered)
• Bachelor’s Degree in Electrical, Mechanical, Controls, or Automation Engineering (even better)
• Automotive experience is highly preferred
• Electrical background (electrician or technician) preferred
• Familiar with PLC/CNC (Allen-Bradley), VFD, Servo, Profinet, FANUC Robots
• Demonstrated ability to read blueprints, modify electrical schematics, and use AutoCAD
• Validated ability to troubleshoot equipment and continuously evaluate for process improvements
• Experience with conveyor system programming
• Solid understanding of networking to include DH+, Ethernet, and remote IO
• Lean Manufacturing and Six Sigma experience
• Lean Tools – 5S, Kanban, Poka-Yoke, Value Stream Mapping experience
• Understanding of 8D, FMEA, and DMAIC processes
• Familiar with TQM and Kaizen methods
• One or more years of experience with MS Office (Word/Excel/PowerPoint/Outlook)
• Knowledge of simulation modeling and visual factory management is preferred

Benefits

• Immediate medical, dental, vision and prescription drug coverage
• Flexible family care days, paid parental leave, new parent ramp-up programs, subsidized back-up child care and more
• Family building benefits including adoption and surrogacy expense reimbursement, fertility treatments, and more
• Vehicle discount program for employees and family members and management leases
• Tuition assistance
• Established and active employee resource groups
• Paid time off for individual and team community service
• A generous schedule of paid holidays, including the week between Christmas and New Year’s Day
• Paid time off and the option to purchase additional vacation time
• Salary grade 7 and ranges from $84,480-141,360
• Salary grade 8 and ranges from $96,720-162,120

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This role focuses on embedded-in-the-loop automation to assess ADAS software quality from component through sub-system scope. You will design and implement automated test solutions that run against real embedded targets and bench environments (e.g., SIL/HIL, ECU benches), integrated with CI/CD to provide fast, repeatable feedback on every change.

Responsibilities

• Design, develop, and maintain automated test frameworks (Python and/or C++) to validate ADAS software on ECU/bench targets
• Create and maintain test libraries and utilities that interface with embedded targets and vehicle networks (CAN, XCP, Ethernet/TCP/UDP, diagnostics)
• Implement automation to evaluate functional correctness, robustness, timing/performance, reliability, and regression behavior at component and sub-system levels
• Develop automated workflows for bench/SIL/HIL execution, including test orchestration, stimulus/response control, data capture, and result reporting
• Integrate automated test execution into CI/CD pipelines (e.g. Jenkins, GHA) to enable test frequently with actionable pass/fail criteria and traceability
• Build tooling to support quality assessment across the stack: embedded software services, middleware integration, sensor/feature interfaces, and ECU-to-ECU interactions
• Partner with manual test and integration teams to convert high-value scenarios into stable automated coverage; reduce test cycle time and increase repeatability
• Drive root-cause analysis for failures (logs, traces, network captures) and collaborate with feature teams to resolve defects efficiently
• Contribute to engineering excellence through code reviews, test design reviews, documentation, and continuous improvement of team frameworks and lab infrastructure
• Influence test strategy and coverage planning for mid- to long-term quality goals (including stability, flakiness reduction, and scalability across benches)

Qualifications

• Bachelor’s degree in Computer Science, Electrical/Computer Engineering, or related field (or equivalent experience)
• 3+ years of experience in software development and/or test automation using Python and/or C++
• Experience building automated tests that interact with real systems (embedded targets, hardware benches, or networked devices)
• Experience with HIL/SIL/bench testing and test orchestration (hardware control, flashing/deployment, data collection, test scheduling)
• Experience with automotive communication and measurement protocols/tools: CAN, XCP, UDS, DoIP, TCP/IP, UDP
• Demonstrated ability to debug complex failures using logs, traces, and systematic triage
• Experience with embedded OS (QNX and/or embedded Linux) and embedded software integration concepts
• Strong communication skills and ability to work cross-functionally in an Agile environment

Benefits

• Immediate medical, dental, vision and prescription drug coverage
• Flexible family care days, paid parental leave, new parent ramp-up programs, subsidized back-up child care and more
• Family building benefits including adoption and surrogacy expense reimbursement, fertility treatments, and more
• Vehicle discount program for employees and family members and management leases
• Tuition assistance
• Established and active employee resource groups
• Paid time off for individual and team community service
• A generous schedule of paid holidays, including the week between Christmas and New Year’s Day
• Paid time off and the option to purchase additional vacation time

Salary and Benefits Information

For more information on salary and benefits, click here: https://fordcareers.co/GSR, https://fordcareers.co/LL6, https://fordcareers.co/LL5, https://fordcareers.co/LL4Benefits, Click here to find out more about available programs and benefits: https://fordcareers.co/interns, Click here to find out more about available programs and benefits: https://fordcareers.co/supplemental

Visa Sponsorship

Visa sponsorship is available for this position.

Employment Eligibility

Candidates for positions with Ford Motor Company must be legally authorized to work in the United States. Verification of employment eligibility will be required at the time of hire.

Work Schedule

This position is hybrid (onsite four days per week) for candidates who are in commuting distance to a Ford hub location.

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About the Team

We build foundational AI infrastructure that enables large-scale training and inference across diverse workloads and rapidly evolving hardware generations. Our work directly shapes how AI systems are designed, deployed, and scaled today and into the future. Engineers on this team operate with end-to-end ownership, deep technical rigor, and a strong bias toward real-world impact.

Microsoft Superintelligence Team

Microsoft Superintelligence team’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

This role is part of Microsoft AI’s Superintelligence Team. The MAIST is a startup-like team inside Microsoft AI, created to push the boundaries of AI toward Humanist Superintelligence—ultra-capable systems that remain controllable, safety-aligned, and anchored to human values. Our mission is to create AI that amplifies human potential while ensuring humanity remains firmly in control. We aim to deliver breakthroughs that benefit society—advancing science, education, and global well-being. We’re also fortunate to partner with incredible product teams giving our models the chance to reach billions of users and create immense positive impact. If you’re a brilliant, highly-ambitious and low ego individual, you’ll fit right in—come and join us as we work on our next generation of models!

Responsibilities

Lead the co-design of AI systems across hardware and software boundaries, spanning accelerators, interconnects, memory systems, storage, runtimes, and distributed training/inference frameworks. Drive architectural decisions by analyzing real workloads, identifying bottlenecks across compute, communication, and data movement, and translating findings into actionable system and hardware requirements. Co-design and optimize parallelism strategies, execution models, and distributed algorithms to improve scalability, utilization, reliability, and cost efficiency of large-scale AI systems. Develop and evaluate what-if performance models to project system behavior under future workloads, model architectures, and hardware generations, providing early guidance to hardware and platform roadmaps. Partner with compiler, kernel, and runtime teams to unlock the full performance of current and next-generation accelerators, including custom kernels, scheduling strategies, and memory optimizations. Influence and guide AI hardware design at system and silicon levels, including accelerator microarchitecture, interconnect topology, memory hierarchy, and system integration trade-offs. Lead cross-functional efforts to prototype, validate, and productionize high-impact co-design ideas, working across infrastructure, hardware, and product teams. Mentor senior engineers and researchers, set technical direction, and raise the overall bar for systems rigor, performance engineering, and co-design thinking across the organization.

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We pursue this mission through deep hardware–software co-design, combining rigorous systems thinking with hands-on engineering. The team invests heavily in understanding real production workloads large-scale training, inference, and emerging multimodal models and translating those insights into concrete improvements across the stack: from kernels, runtimes, and distributed systems, all the way down to silicon-level trade-offs and datacenter-scale architectures.

This role sits at the boundary between exploration and production. You will work closely with internal infrastructure, hardware, compiler, and product teams, as well as external partners across the hardware and systems ecosystem. Our operating model emphasizes rapid ideation and prototyping, followed by disciplined execution to drive high-leverage ideas into production systems that operate at massive scale.

In addition to delivering real-world impact on large-scale AI platforms, the team actively contributes to the broader research and engineering community. Our work aligns closely with leading communities in ML systems, distributed systems, computer architecture, and high-performance computing, and we regularly publish, prototype, and open-source impactful technologies where appropriate.

Microsoft Superintelligence Team Microsoft Superintelligence team’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.

This role is part of Microsoft AI’s Superintelligence Team. The MAIST is a startup-like team inside Microsoft AI, created to push the boundaries of AI toward Humanist Superintelligence—ultra-capable systems that remain controllable, safety-aligned, and anchored to human values. Our mission is to create AI that amplifies human potential while ensuring humanity remains firmly in control. We aim to deliver breakthroughs that benefit society—advancing science, education, and global well-being. We’re also fortunate to partner with incredible product teams giving our models the chance to reach billions of users and create immense positive impact.

Responsibilities Lead the co-design of AI systems across hardware and software boundaries, spanning accelerators, interconnects, memory systems, storage, runtimes, and distributed training/inference frameworks.

Drive architectural decisions by analyzing real workloads, identifying bottlenecks across compute, communication, and data movement, and translating findings into actionable system and hardware requirements.

Co-design and optimize parallelism strategies, execution models, and distributed algorithms to improve scalability, utilization, reliability, and cost efficiency of large-scale AI systems.

Develop and evaluate what-if performance models to project system behavior under future workloads, model architectures, and hardware generations, providing early guidance to hardware and platform roadmaps.

Partner with compiler, kernel, and runtime teams to unlock the full performance of current and next-generation accelerators, including custom kernels, scheduling strategies, and memory optimizations.

Influence and guide AI hardware design at system and silicon levels, including accelerator microarchitecture, interconnect topology, memory hierarchy, and system integration trade-offs.

Lead cross-functional efforts to prototype, validate, and productionize high-impact co-design ideas, working across infrastructure, hardware, and product teams.

Mentor senior engineers and researchers, set technical direction, and raise the overall bar for systems rigor, performance engineering, and co-design thinking across the organization.

Qualifications Bachelor’s Degree in Computer Science or related technical field AND 6+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.

Additional or Preferred Qualifications Master’s Degree in Computer Science or related technical field AND 8+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR Bachelor’s Degree in Computer Science or related technical field AND 12+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.

Strong background in one or more of the following areas: AI accelerator or GPU architectures Distributed systems and large-scale AI training/inference High-performance computing (HPC) and collective communications ML systems, runtimes, or compilers Performance modeling, benchmarking, and systems analysis Hardware–software co-design for AI workloads Proficiency in systems-level programming (e.g., C/C++, CUDA, Python) and performance-critical software development.

Proven ability to work across organizational boundaries and influence technical decisions involving multiple stakeholders. Experience designing or operating large-scale AI clusters for training or inference. Deep familiarity with LLMs, multimodal models, or recommendation systems, and their systems-level implications. Experience with accelerator interconnects and communication stacks (e.g., NCCL, MPI, RDMA, high-speed Ethernet or InfiniBand). Background in performance modeling and capacity planning for future hardware generations. Prior experience contributing to or leading hardware roadmaps, silicon bring-up, or platform architecture reviews. Publications, patents, or open-source contributions in systems, architecture, or ML systems are a plus.

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Firmware Engineer, Robotics

Location

San Francisco

Employment Type

Full time

Location Type

On-site

Department

Research

Compensation

• $185K – $268K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

More details about our benefits are available to candidates during the hiring process.

This role is at-will and OpenAI reserves the right to modify base pay and other compensation components at any time based on individual performance, team or company results, or market conditions.

About the Team

Our Robotics team is focused on unlocking general-purpose robotics and advancing toward AGI-level intelligence in dynamic, real-world environments. Working across the full model and systems stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the physical constraints of real-world systems to improve people’s lives.

About the Role

As a Firmware Engineer on the Robotics team, you will help enable the next generation of embodied AI by developing low-level firmware that drives our robotic systems. You will join at an early phase of our firmware development, working alongside electrical, mechanical, and control systems engineers to bring up new boards, integrate novel sensors, and build foundational infrastructure for the distributed system that drives our robots.

This role is hands-on and bare-metal focused. You will read datasheets and reference manuals, write startup code and peripheral drivers, and debug hardware–firmware interactions during board bring-up and deployment. Your work will span everything from simple single-purpose sensing devices to more complex, safety- and reliability-critical subsystems, with an emphasis on correctness, performance, and scalability.

By working closely across disciplines, you will help ensure that firmware, hardware, and system-level assumptions align, and that new designs can be brought up, tested, and iterated on quickly. This role offers a unique opportunity to shape the early firmware architecture for advanced robotic systems operating in real-world environments.

This role is based in San Francisco, CA, and requires in-person presence 4 days a week.

You might thrive in this role if you:

• Have experience developing firmware for microcontrollers and enjoy working close to the hardware.

• Are comfortable writing bare-metal firmware, or are eager to deepen your understanding of startup code, peripheral drivers, low-level system initialization, and bootloaders.

• Regularly read datasheets, reference manuals, and schematics to understand how new hardware works.

• Have participated in board bring-up, lab debugging, or early hardware validation.

• Are curious about how systems fail and enjoy debugging hardware-firmware interactions using real measurement tools.

• Are comfortable developing in a test-driven environment as well as building testbenches or simple tooling to validate hardware and system behavior.

• Care about writing correct, robust firmware and improving your technical judgment through hands-on experience.

Additional, preferred qualifications:

• A Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.

• Experience with common embedded communication protocols (e.g., SPI, I²C, UART, CAN, Ethernet, BiSS).

• Experience writing C++, or Rust for microcontrollers, especially in resource-constrained or bare-metal environments.

• Familiarity with hardware debugging tools such as JTAG/SWD, logic analyzers, oscilloscopes, or similar lab equipment.

• Experience with robotics, sensing systems, data acquisition, or other hardware-centric products.

• Clear written and verbal communication skills, especially when collaborating with hardware and systems engineers.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full

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ASIC Firmware Engineer, Modeling

Location

San Francisco

Employment Type

Full time

Department

Scaling

Compensation

• $226K – $445K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

More details about our benefits are available to candidates during the hiring process.

This role is at-will and OpenAI reserves the right to modify base pay and other compensation components at any time based on individual performance, team or company results, or market conditions.

About the Team

OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.

About the Role

We are looking for an embedded engineer to help build firmware and associated modeling software for OpenAI’s in house AI accelerator. This role involves designing and developing drivers and functional models for a large array of HW components, writing high throughput and low latency firmware code, investigating bring-up and production issues.

Responsibilities

• Design and implement drivers for hardware peripherals, including those related to AI chips.

• Design and implement functional software models to simulate SoC uncore logic and enable FW testing against the model

• Design and implement low-latency and high throughput embedded SW to manage HW resources.

• Work with adjacent software and hardware teams to implement requirements, debug issues and shape future generations of the hardware.

• Collaborate with vendors to integrate their technologies within our systems.

• Bring up and debug firmware/driver on new platforms.

• Come up with processes and debug issues raised in the field.

• Set up monitoring, integration testing and diagnostics tools.

Qualifications

• 5+ years of experience working in embedded SW space.

• Ability to thrive in ambiguity and learn new technologies.

• Strong programming skills in C/C++ and/or Rust.

• Experience developing high throughput, low latency and multi-threaded code.

• Experience working with real time operating systems (RTOS).

• Experience developing hardware drivers and working with hardware

• Experience with HW/SW co-design

• Knowledge of common embedded protocols, e.g. UART, I2C, SPI, etc.

• Knowledge of microprocessor and common ARM architectures (e.g. AMBA) is a plus.

• Knowledge of PCIe, ethernet and other high BW communication protocols is a plus.

• Experience with GPUs or other compute hardware is a plus.

• Experience deploying large compute clusters is a plus.

_To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations._

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What you'll do

• Develop and implement high-performance PCIe-based designs on FPGA platforms, ensuring optimal functionality and efficiency.
• Collaborate closely with cross-functional teams to gather requirements, evaluate design tradeoffs, and deliver robust FPGA solutions that satisfy project goals.

What you need

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 3+ years of experience in FPGA design and development.
• Proficiency in HDL languages such as Verilog.
• Strong expertise with industry-standard FPGA development tools like Vivado.
• In-depth understanding of digital design principles, including clock domains and timing analysis.
• Experience with high-speed interfaces (PCIe or Ethernet).
• Excellent analytical, debug, and problem-solving skills.
• Ability to collaborate effectively in a multi-disciplinary, team-based environment.
• Strong verbal and written communication skills.

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What you'll do

• Developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
• Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.

What you need

• M.Sc. or Ph.D. in Electrical or Computer Engineering.
• Strong experience modeling circuits and systems in MATLAB/Simulink.
• Expertise in designing high-speed analog CMOS circuits.
• Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.
• Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.
• Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
• Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
• Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog.

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What you'll do

• Developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards.
• Running comprehensive system simulations to verify and sign-off design performance across multiple protocols and channels.
• Designing and proposing advanced algorithms to calibrate and adapt transceivers for optimal performance.
• Correlating simulated performance with silicon measurements to ensure accuracy and reliability.
• Providing expert assistance to customers for system-level performance issues and troubleshooting.
• Collaborating with cross-functional teams of analog, digital, and hardware engineers throughout all stages of development.
• Contributing to lab testing and analysis for high-speed serial links, ensuring robust design validation.

What you need

• M.Sc. or Ph.D. in Electrical or Computer Engineering.
• Strong experience modeling circuits and systems in MATLAB/Simulink.
• Expertise in designing high-speed analog CMOS circuits.
• Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.
• Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.
• Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).
• Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.
• Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog.

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What you'll do

• Conducting comprehensive testing on silicon implementations of high-speed analog integrated circuits in a cutting-edge R&D lab environment.
• Reviewing and debugging silicon under test, as well as supporting associated hardware systems to ensure optimal performance.

What you need

• Bachelor’s degree in Electrical Engineering (BSEE) or equivalent technical field with at least 3+ years of industry direct related experience.

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What you'll do

• Developing and writing high-quality user documentation for a variety of Digital and Mixed Signal IPs, including USB, PCIe, Ethernet, DDR, HDMI, and MIPI.
• Planning, organizing, and editing technical specifications, engineering schematics, application notes, and user guides to ensure clarity and usability.

What you need

• Bachelor’s or Master’s degree in Electronics, Science, Hardware, Computing, Software, Physics, Mathematics, Engineering, or a related technical discipline.
• 3-7 years of technical writing experience in the software or hardware industry, with proven ability to deliver high-quality documentation.

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The program's goal is to encourage qualified researchers with overseas experience who have excelled in their fields through high-level science and technology-oriented research to come to Türkiye and contribute to projects that will be carried out in research areas of strategic importance for our country.

What you need

Applicants must meet at least one of the following requirements:

• To be on the "Top Cited Researchers List" published by Thomson Reuters in any year of the last 5 years.
• To have worked for a total of at least 30 months in institutions ranked in one of the following positions in the last 5 years:
• List of top 100 universities published by QS (Quacquarelli Symonds) or THE (Times Higher Education).
• List of top 2500 companies with the highest R&D spending in the world published by the European Commission Joint Research Centre:
• List of top 250 institutions in the health - higher education - public - private subfields published by Scimago Institutions Ranking
• List of most successful Start-Ups and Unicorn Companies receiving the highest investment.

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What you'll do

Develop a complete front-to-back end design implementation methodology (RTL to GDSII) using Synopsys' best in class tools and technologies.

Work with leading edge designs and teams to drive the industry best PPA for IP designs.

Evaluate and exercise various aspects of the development flow which may include design for test logic, synthesis, place & route, timing and power (incl. EM/IR) optimization and analysis.

Develop and maintain best in class digital design methodologies, including documentation, scripts, and training materials.

Work as a liaison between EDAG tool and IP design teams.

Continuously improve and refine design processes to enhance efficiency and performance.

What you need

BS or MS in EE with 10+ years of hands-on experience developing high-speed digital IP cores and/or SOCs.

Knowledge of IP deliverables, ASIC implementation and physical design flow and tools, memories, logic libraries, and PDK versions.

Direct hands-on experience with Fusion Compiler or industry equivalent Synthesis and Place & Route tools.

Ability to facilitate cross-functional collaboration, including fostering innovation, improving communication, and driving results.

Good analysis, debugging, and problem-solving skills.

Solid written and verbal communication skills and the ability to create clear and concise documentation and provide trainings.

Familiarity with other Synopsys tools (Primetime, PrimePower, RLTA, CoreTools) is a plus.

Working knowledge of high-speed interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR is a plus.

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What you'll do

Collaborating closely with analog, digital, and hardware teams to ensure holistic design and verification coverage.

• Developing and maintaining comprehensive simulation and verification plans for IP, aligning with reliability and performance targets.

What you need

• MSc or PhD in Electrical/Computer Engineering, with 10+ years of relevant industry experience.

Why this matters

Advance high-speed connectivity for enterprise and hyperscale applications worldwide.

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What you'll do

• Work close with customers to understand new requests or customization feature from customer’s PRD/MRD
• Provide integration training to customers and conduct reviews on their major SoC milestones
• Provide feedback to Synopsys R&D for customization feature or continuous IIP product improvements
• Participate in IIP design reviews to align development with future customer needs
• Creativity and Innovation is highly inspired: such as developing small tools to simplify daily jobs or improving efficiency; authoring application notes for gate-level simulation, silicon debug and physical implementation.

What you need

• Bachelor’s and/or master’s degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science
• Minimum 5 years of Analog or Mixed signal IP or ASIC Design/Verification/Applications experience is required
• Hands-on experience on circuit design, RTL coding, simulation, synthesis, static timing check, equivalence check, etc.
• Domain knowledge PCI Express, CXL, Ethernet protocols
• Creative results are oriented with the ability to manage multiple tasks concurrently.
• Good verbal and written communication skills in English and ability to interact with customer
• High degree of self-motivation and personal responsibility
• Good inference, reasoning and problem-solving skills, and attention to details

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What you'll do

Construct ADAS simulation scenarios, develop automation scripts, and identify algorithm or system defects in simulations.

• Construct ADAS simulation scenarios (covering L2 and L2++ functionalities) using tools like Carmaker or others, including vehicle dynamics modeling, driver models, and complex traffic environments
• Develop and maintain HiL (Hardware-in-the-Loop) test platforms, integrating sensor simulations (e.g., camera/radar signal injection), vehicle dynamics models, and real-time system debugging
• Design test cases based on functional specifications and regulatory standards (e.g., x-NCAP, i-VISTA), execute SIL/HIL simulations, and deliver test reports while tracking issue resolution
• Develop automation scripts (Python/CAPL) to improve efficiency and integrate with CI/CD pipelines
• Identify algorithm or system defects in simulations, collaborate with R&D to reproduce and resolve issues

What you need

• Proficiency in VTD, Carmaker or other Simulink tools, with vehicle dynamics modeling experience
• Programming Skill: Strong skills in Python/C++/MATLAB for scripting and tool development
• Automotive Knowledge: Deep understanding of ADAS principles, sensor fusion (camera/radar/LiDAR), and communication protocols (CAN/in-vehicle Ethernet)
• Standards: Familiarity with x-NCAP, and ADAS function regulations

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What you'll do

Manage electronic system specification and software updates for all Prodrive Motorsport products.

• Data analysis and system-wide commissioning of rally cars both on event, remote and factory based testing.

• Work closely with Software, Electrical and Customer Support teams, aiming at supporting both Factory and Customer teams with their electrical and electronics needs.

What you need

• You will be competent in IT support and development (General MS Windows support including networking, plus MS Office suite including Excel+VBA. Programming such as Matlab, Simulink, Python, C appreciated

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What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.

What you need

• 8+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe/ DDR/ Ethernet interfaces, including protocol and verification strategies.
• Extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

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What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.
• Staying ahead of evolving industry standards, interpreting future changes, ECNs, and specification errata, and integrating this knowledge into Emulation and Design IP teams.
• Reviewing and validating test plans for both Emulation IP and Design IP, guaranteeing best-in-class function, feature coverage, and product quality.

What you need

• 15+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe/ DDR / Ethernet interfaces, including protocol and verification strategies.
• Extensive hands-on experience with Zebu or similar emulation platforms, particularly for IP verification.

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What you'll do

Specifying, designing, and implementing state-of-the-art verification environments for the DesignWare family of synthesizable cores.

Performing verification tasks for IP cores, including test planning and environment coding at both unit and system levels.

Developing and implementing test cases, debugging, functional coverage coding, and testing to meet quality metric goals.

Managing regression and ensuring adherence to verification methodologies.

Collaborating closely with RTL designers and a global team of verification engineers.

Working on next-generation connectivity protocols for commercial, enterprise, and automotive applications.

What you need

BSEE in Electrical Engineering with 12+ years of relevant experience or MSEE with 10+ years of relevant experience.

Experience in architecting verification environments for complex serial protocols.

Proficiency in HVL (System Verilog) and industry-standard simulators such as VCS, NC, and MTI.

Expertise in verification methodologies such as VMM, OVM, and UVM.

Knowledge of protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB.

Familiarity with Verilog and scripting languages such as Perl, TCL, and Python.

Experience with IP design and verification processes, including VIP development.

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What you'll do

• Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification for all functions, spanning both Controller and PHY domains.
• Reporting key metrics and driving continuous improvement initiatives in Emulation IP quality and performance.
• Providing technical leadership and expertise to define requirements for Emulation IP, ensuring its correct implementation and deployment within verification strategies.

What you need

• 15+ years of relevant experience in emulation, verification, or IP product development.
• Expert-level knowledge of PCIe/ DDR / Ethernet interfaces, including protocol and verification strategies.

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The E/E Vehicle Update and Test Engineer is responsible for organizing, coordinating, and performing electrical/electronic (E/E) vehicle hardware and software updates to ensure test and prototype vehicles reflect the latest development and release levels. This role supports the full update cycle - including hardware/software identification, installation, flashing, commissioning, and validation testing - to ensure functional accuracy, safety, and compliance with Porsche's development standards.

Roles & responsibilities

• Coordinate and perform full E/E vehicle hardware and software updates to ensure alignment with release schedules and development maturity.
• Commission and verify system functionality post-update; troubleshoot and resolve any integration issues.
• Support and coordinate E/E integration validation testing after updates, including test drive planning and issue reporting to functional area leads.
• Identify required hardware/software updates; manage acquisition, track delivery timelines, and ensure availability for testing and integration.
• Generate and manage work orders for workshop teams to update vehicle hardware, wiring, and systems as needed.
• Collaborate with diagnostics experts and functional teams to execute software updates and validate system performance.
• Maintain and manage vehicle scheduling plans in alignment with car line requirements, test drive deadlines, and release validation milestones.
• Coordinate and execute static and dynamic test drives; analyze results, track errors, and report findings to global stakeholders.
• Document and communicate test findings, system anomalies, and improvement opportunities to cross-functional teams and project sponsors.
• Provide U.S. market-specific release recommendations to car line departments and customer engineering teams.
• Support vehicle test planning, budget coordination, and test documentation in collaboration with customer departments.
• Actively contribute to process optimization, continuous improvement initiatives, and efficient work order management.
• Provide engineering support and technical expertise to Tech Center teams for vehicle testing and system validation.

What you need

• Bachelor’s degree in Mechatronics Engineering, Computer Engineering, Computer Science, Mechanical Engineering, Electrical Engineering, or a related field (or foreign equivalent).
• Minimum of 2 years of experience in the job offered or a closely related role.
• In lieu of a degree, 4 years of directly related experience may be accepted.
• Any suitable combination of education, training, or experience will be considered.

Nice to have

• Expert knowledge of Porsche’s E/E architecture, including update, flashing, and coding procedures.
• Experience with Porsche proprietary testing systems and tools such as PIDT, PUDiS, PPN, FAZIT, Cluu, etc.
• Familiarity with high-voltage vehicle systems and related safety procedures.
• Proficiency in German language is a plus.
• Strong analytical and diagnostic skills with high attention to detail.
• Experience working in intercultural, interdisciplinary environments.
• Strong organizational skills and the ability to adapt to dynamic project requirements.
• Excellent communication skills with the ability to present technical concepts clearly to various audiences.

Why this matters

This role keeps a world-championship-winning F1 team running. When equipment fails, races can be lost, so your work directly impacts performance. You'll develop deep expertise in high-spec facilities and have clear progression into senior facilities management roles. The F1 environment means you'll work with cutting-edge building systems and learn from the best in the industry.

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You'll be responsible for the implementation of an effective verification/validation management in vehicle projects and bear overall responsibility for a secure validation with physical and virtual methods in all phases of the product development process.

In virtual vehicle validation, the latest vehicle concepts are evaluated from the customer's point of view. Real and virtual models are used to make specific vehicle functions experiential in the early phase of the product development process.

What you need

Your focal points are...

• Integration of vehicle functions into a driving simulator (e.g. highly automated driving)
• Optimization of a dynamic driving simulator (realistic driving behavior e.g. audio, motion cueing, visualization)
• Integration of components and control units into the system
• Virtual vehicle testing or other test studies

Why this matters

This role keeps a world-championship-winning F1 team running. When equipment fails, races can be lost, so your work directly impacts performance. You'll develop deep expertise in high-spec facilities and have clear progression into senior facilities management roles. The F1 environment means you'll work with cutting-edge building systems and learn from the best in the industry.

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