{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/equivalence-checking"},"x-facet":{"type":"skill","slug":"equivalence-checking","display":"Equivalence Checking","count":3},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_7f282b7c-68c"},"title":"Sr Staff Formal Verification R&D Engineer","description":"<p>Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.</p>\n<p>You are a passionate Computer Scientist with an exceptional analytical mind, driven by curiosity and a desire to solve some of the most challenging problems in automated logical reasoning and symbolic computation. You thrive in intellectually stimulating environments, enjoying the pursuit of innovative solutions within deep technology domains. Your expertise spans formal methods, algorithms, and complexity theory, enabling you to tackle large-scale, industrial verification challenges with confidence and creativity.</p>\n<p>You bring hands-on experience in developing robust software solutions, particularly in C/C++. Whether your background is academic or industry, your contributions have been recognized by peers, and you are eager to collaborate with leading experts in the field. You understand the nuances of hardware architecture and design languages like SystemVerilog, or you are enthusiastic to learn them, appreciating their impact on verification excellence.</p>\n<p>You are adaptable, open to new ideas, and motivated by continuous learning. You value diversity of thought, enjoy working in collaborative teams, and are committed to advancing the state of the art in formal verification. You believe in the transformative power of AI/ML-assisted design flows and are excited to shift the paradigm from design-centric to verification-centric innovation. Above all, you are ready to make a significant impact in the future of technology by joining the Synopsys Formal Technology Group.</p>\n<p>Designing and implementing advanced formal verification algorithms and proof engines for large-scale VLSI chip designs.\nDeveloping scalable, memory-efficient, and mathematically robust solvers to address industry-leading verification challenges.\nIntegrating innovative solutions into the Synopsys VC Formal platform, enhancing its capabilities and usability for thousands of engineers worldwide.\nCollaborating with cross-functional teams to extend formal verification technologies into domains such as hardware security, functional safety, and low power.\nEngaging with customers and industry partners to understand their verification needs and deliver best-in-class solutions.\nContributing to the formal verification community through peer-reviewed publications, technical presentations, and mentorship of junior team members.</p>\n<p>Advancing the scalability and reliability of formal verification tools used by leading chip design companies.\nBreaking complexity barriers, enabling verification of the most challenging and extensive industrial designs.\nDriving innovation in AI/ML-assisted design flows, transforming the verification landscape for the semiconductor industry.\nEmpowering customers to achieve functional safety, hardware security, and low power goals in their products.\nFacilitating widespread adoption of formal methods across diverse domains and applications.\nFostering a collaborative, intellectually rich environment that inspires continuous learning and knowledge sharing.</p>\n<p>8-10 years of relevant experience\nExpertise in formal methods, model checking, theorem proving, and equivalence checking.\nStrong proficiency in algorithms, data structures, and complexity analysis.\nProfessional coding skills in C/C++ and experience developing large-scale software systems.\nBackground in hardware architecture and familiarity with design languages such as SystemVerilog (preferred but not required).\nPeer recognition in the formal verification community, such as publications or industry accolades.</p>\n<p>Analytical thinker with a keen eye for detail and problem-solving.\nCollaborative team player who values diversity and open communication.\nInnovative and adaptable, willing to embrace new technologies and methodologies.\nDriven by curiosity and a passion for continuous learning.\nResilient in the face of challenging technical problems and complexity.</p>\n<p>You’ll join the Synopsys VC Formal R&amp;D Team,a vibrant community of talent and expertise dedicated to advancing formal verification technologies. The team is renowned for solving deep theoretical and practical problems and integrating them into world-leading verification tools. You will collaborate with experts in formal methods, software engineering, and AI/ML, contributing to the proliferation of formal verification across hardware security, functional safety, low power, and more.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7f282b7c-68c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hillsboro/sr-staff-formal-verification-r-and-d-engineer/44408/93232526192","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":"$144000-$216000","x-skills-required":["formal methods","model checking","theorem proving","equivalence checking","algorithms","data structures","complexity analysis","C/C++","SystemVerilog"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:20:22.176Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hillsboro"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"formal methods, model checking, theorem proving, equivalence checking, algorithms, data structures, complexity analysis, C/C++, SystemVerilog","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":144000,"maxValue":216000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_b455ed20-1e0"},"title":"Applications Engineering, Sr Staff Engineer - RTL2GDS Application Specialist","description":"<p>We are seeking a highly skilled Applications Engineering, Sr Staff Engineer - RTL2GDS Application Specialist to join our team. As a key member of our Silicon Design &amp; Verification team, you will be responsible for providing expert technical guidance and engineering insight to support Synopsys product adoption and usability for leading semiconductor customers.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Providing expert technical guidance and engineering insight to support Synopsys product adoption and usability for leading semiconductor customers.</li>\n<li>Diagnosing, troubleshooting, and resolving complex technical issues during customer installations and deployments.</li>\n<li>Training customers on new implementations, features, and capabilities of Synopsys RTL2GDS full flow solutions.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Extensive experience with RTL to GDSII full flow and advanced node design methodologies.</li>\n<li>Hands-on proficiency with synthesis, physical design, static timing analysis, equivalence checking, parasitic extraction, DRC/LVS, and power analysis.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_b455ed20-1e0","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/applications-engineering-sr-staff-engineer-rtl2gds-application-specialist/44408/92176305600","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":"$157000-$235000","x-skills-required":["RTL to GDSII full flow","advanced node design methodologies","synthesis","physical design","static timing analysis","equivalence checking","parasitic extraction","DRC/LVS","power analysis"],"x-skills-preferred":["Perl","Tcl","Python","CAD automation methods","Design Compiler","ICC2","Fusion Compiler","Genus","Innovus","STA","IR drop analysis","Extraction","Formal verification"],"datePosted":"2026-03-06T07:26:03.775Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale, California"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"RTL to GDSII full flow, advanced node design methodologies, synthesis, physical design, static timing analysis, equivalence checking, parasitic extraction, DRC/LVS, power analysis, Perl, Tcl, Python, CAD automation methods, Design Compiler, ICC2, Fusion Compiler, Genus, Innovus, STA, IR drop analysis, Extraction, Formal verification","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":157000,"maxValue":235000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_0d1d3970-7a0"},"title":"Staff R&D Software Engineer – VC Formal","description":"<p>Opening. This role exists to drive the development of formal verification technology.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<p>You will lead and deliver multi-project functionality for each VC Formal product release as a technical expert and initiative owner.</p>\n<ul>\n<li>Designing, implementing, and testing complex algorithms and data structures for high-performance formal verification solutions.</li>\n<li>Driving technical initiatives, collaborating with peers and management to sell and execute the vision for formal verification advancements.</li>\n<li>Identifying broad objectives and developing strategies to solve open-ended, challenging problems in software development.</li>\n<li>Running effective meetings to facilitate team problem-solving and helping overcome technical roadblocks (“brick walls”).</li>\n<li>Collaborating with global cross-functional teams to define, implement, and deliver innovative verification solutions.</li>\n<li>Ensuring the quality, robustness, and efficiency of software implementations in a large-scale development environment.</li>\n<li>Prioritizing project milestones and features, and developing project schedules with minimal managerial direction.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>BS/MS in Computer Science or related field, with 5+ years of relevant experience in software development.</li>\n<li>Expertise in C/C++ programming, with a demonstrated ability to write efficient, maintainable code.</li>\n<li>Strong foundation in algorithms and data structure design, with practical implementation experience.</li>\n<li>Proficiency in software development processes, debugging, and configuration management tools.</li>\n<li>Solid understanding of digital logic; prior experience in EDA, equivalence checking, or formal technologies is a plus.</li>\n</ul>\n<p><strong>Why this matters</strong></p>\n<p>Accelerate the verification of complex SoC designs, enabling Synopsys customers to deliver innovative products to market faster.</p>\n<ul>\n<li>Shape the development of next-generation formal verification algorithms and methodologies, setting industry benchmarks.</li>\n<li>Enhance the scalability and performance of VC Formal, ensuring it remains the tool of choice for the most challenging design tasks.</li>\n<li>Drive technical excellence and foster a culture of innovation within the R&amp;D team and across the organization.</li>\n<li>Mentor and inspire fellow engineers by sharing best practices and facilitating knowledge transfer.</li>\n<li>Contribute to the overall success of Synopsys by delivering reliable, high-quality software that meets and exceeds customer expectations.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_0d1d3970-7a0","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/staff-r-and-d-software-engineer-vc-formal/44408/92296852064","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["C/C++ programming","algorithms and data structure design","software development processes","debugging","configuration management tools","digital logic","EDA","equivalence checking","formal technologies"],"x-skills-preferred":[],"datePosted":"2026-03-04T17:08:11.389Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"C/C++ programming, algorithms and data structure design, software development processes, debugging, configuration management tools, digital logic, EDA, equivalence checking, formal technologies"}]}