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On average, most projects may require at least 10 hours per week to deliver effectively, though this is not a fixed commitment and depends on the scope of work. Contractors have full flexibility to set their own hours and determine the exact amount of time needed to complete deliverables.</li>\n<li>Tutor roles may be performed remotely from any location worldwide, subject to legal eligibility, time-zone compatibility, and role-specific needs.</li>\n<li>For US-based candidates, please note that we are unable to hire in Wyoming and Illinois at this time.</li>\n<li>We are unable to provide visa sponsorship.</li>\n<li>For those who will be working from a personal device, your computer must be a Chromebook, a Mac with macOS 11.0 or later, or Windows 10 or later.</li>\n</ul>\n<p>Compensation and Benefits:</p>\n<p>US-based candidates: $30/hour - $75/hour depending on factors including relevant experience, skills, education, geographic location, and qualifications. International candidates: Information will be provided to you during the recruitment process.</p>\n<p>Benefits vary based on employment type, location and jurisdiction. Benefits for eligible U.S. based positions include health insurance, 401(k) plan, and paid sick leave. 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As a Principal SerDes Systems Engineer, you will be responsible for developing and maintaining SerDes system models for NRZ and PAM4 transceivers targeting PCIe (128Gbps+) and Ethernet (200Gbps+) standards. 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development.</li>\n<li>Contributing to lab testing and analysis for high-speed serial links, ensuring robust design validation.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>M.Sc. or Ph.D. in Electrical or Computer Engineering.</li>\n<li>Strong experience modeling circuits and systems in MATLAB/Simulink.</li>\n<li>Expertise in designing high-speed analog CMOS circuits.</li>\n<li>Solid understanding of DSP and communications theory, including equalization, coding, and noise/crosstalk filtering.</li>\n<li>Proficiency in analyzing link budgets for NRZ and/or PAM4 high-speed serial links.</li>\n<li>Familiarity with wireline protocols (PCIe, Ethernet, JESD204C, CPRI) and optical protocols (LINEAR, RTLR).</li>\n<li>Experience with circuit topologies used in high-speed SerDes Tx/Rx and Tx/Rx equalization techniques.</li>\n<li>Hands-on lab testing for high-speed serial links and proficiency in C/Verilog-A/systemVerilog.</li>\n</ul>\n<p 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