{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/emmc"},"x-facet":{"type":"skill","slug":"emmc","display":"Emmc","count":2},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_3541c574-2ff"},"title":"Layout Design, Sr Manager","description":"<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.</p>\n<p>You Are:</p>\n<p>You are an accomplished engineering professional with a strong background in analog and mixed-signal circuit design. With over 12 years of industry experience, you have a deep understanding of circuit design fundamentals, device physics, and technology effects. You have successfully managed projects from specifications to silicon, and you are comfortable interfacing with both internal and external stakeholders. You are a proactive team player with excellent problem-solving skills and a knack for managing complex projects. Your high energy and flexible personality allow you to go the extra mile, fostering collaboration and driving projects to successful completion. You are adept at conflict resolution and possess strong customer-facing skills, making you an invaluable asset to any high-performing team.</p>\n<p>What You’ll Be Doing:</p>\n<p>Managing analog and mixed-signal IP projects from specifications to silicon.\nInteracting with customers to guide them and help adapt our solutions to their needs.\nHandling customer queries and debugging problems efficiently.\nAligning with and improving established design processes.\nInterfacing with internal and external stakeholders to ensure high engagement levels.\nCollaborating with a global team to co-develop Analog Full Custom IPs such as GPIOs, I2C, I3C, SMBUS, eMMC, SVID, Quad SPI, JTAG, and more.</p>\n<p>The Impact You Will Have:</p>\n<p>Driving the integration of advanced capabilities into System on Chips (SoCs).\nEnabling customers to meet unique performance, power, and size requirements.\nAccelerating the time-to-market for differentiated products with reduced risk.\nEnhancing the design and development of high-performance silicon IP.\nImproving customer satisfaction through efficient problem-solving and support.\nContributing to the continuous innovation and technological advancements at Synopsys.</p>\n<p>What You’ll Need:</p>\n<p>Bachelor&#39;s or Master&#39;s degree in Electrical Engineering or a related field from a reputed institution.\n12+ years of industry experience in analog and mixed-signal circuit design.\nProven experience in managing projects from specifications to silicon.\nStrong understanding of circuit design fundamentals, device physics, and technology effects.\nProficiency in spice simulations and various sub-micron design methodologies.</p>\n<p>Who You Are:</p>\n<p>A proactive team player with strong written and verbal communication skills.\nHigh energy individual with the ability to go the extra mile.\nCreative and flexible personality with excellent customer-facing skills.\nDemonstrates good analysis and problem-solving skills.\nAdept at conflict resolution and fostering collaboration among team members.</p>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You will be part of a strong development team specializing in GPIOs, Specialty IOs, and General Purpose Analog IPs. The team is distributed globally, bringing together experienced professionals from various sites. Together, you will co-develop high-performance analog full custom IPs and work on projects that push the boundaries of technology.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_3541c574-2ff","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-sr-manager/44408/93232526160","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog and mixed-signal circuit design","spice simulations","sub-micron design methodologies","GPIOs","I2C","I3C","SMBUS","eMMC","SVID","Quad SPI","JTAG"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:22:20.614Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog and mixed-signal circuit design, spice simulations, sub-micron design methodologies, GPIOs, I2C, I3C, SMBUS, eMMC, SVID, Quad SPI, JTAG"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_e21ac2ad-394"},"title":"Principal Verification Engineer","description":"<p>You are an experienced and innovative ASIC Digital Design Principal Engineer with a passion for verification and a keen eye for detail. With a strong background in architecting verification environments for complex serial protocols, you are proficient in HVL (System Verilog) and have hands-on experience with industry-standard simulators. Your extensive experience includes developing and implementing test plans, extracting verification metrics, and coding for functional coverage. You are well-versed in verification methodologies such as VMM, OVM, and UVM, and have a solid understanding of protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB. Your familiarity with HDLs like Verilog and scripting languages such as Perl, TCL, and Python enhances your verification processes. You possess exceptional problem-solving skills, demonstrate high levels of initiative, and excel in written and oral communication. Your collaborative spirit enables you to work closely with RTL designers and seamlessly integrate into a global team of professional verification engineers, driving the next generation of connectivity protocols for commercial, enterprise, and automotive applications.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<p>Specifying, designing, and implementing state-of-the-art verification environments for the DesignWare family of synthesizable cores.</p>\n<p>Performing verification tasks for IP cores, including test planning and environment coding at both unit and system levels.</p>\n<p>Developing and implementing test cases, debugging, functional coverage coding, and testing to meet quality metric goals.</p>\n<p>Managing regression and ensuring adherence to verification methodologies.</p>\n<p>Collaborating closely with RTL designers and a global team of verification engineers.</p>\n<p>Working on next-generation connectivity protocols for commercial, enterprise, and automotive applications.</p>\n<p><strong>What you need</strong></p>\n<p>BSEE in Electrical Engineering with 12+ years of relevant experience or MSEE with 10+ years of relevant experience.</p>\n<p>Experience in architecting verification environments for complex serial protocols.</p>\n<p>Proficiency in HVL (System Verilog) and industry-standard simulators such as VCS, NC, and MTI.</p>\n<p>Expertise in verification methodologies such as VMM, OVM, and UVM.</p>\n<p>Knowledge of protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB.</p>\n<p>Familiarity with Verilog and scripting languages such as Perl, TCL, and Python.</p>\n<p>Experience with IP design and verification processes, including VIP development.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_e21ac2ad-394","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/asic-verification-principal-engineer/44408/77023412560","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["HVL (System Verilog)","industry-standard simulators","verification methodologies","protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB","HDLs like Verilog","scripting languages such as Perl, TCL, and Python"],"x-skills-preferred":["VIP development"],"datePosted":"2025-12-22T12:04:28.502Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Brackley"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"HVL (System Verilog), industry-standard simulators, verification methodologies, protocols like MIPI-I3C, UFS, Unipro, AMBA, SD/eMMC, Ethernet, DDR, PCIe, and USB, HDLs like Verilog, scripting languages such as Perl, TCL, and Python, VIP development"}]}