Responsibilities:

• Manage a team and develop SRAM/Register file /TCAM /ROM architectures and circuit implementation techniques.
• Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.
• Designing and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures.
• Learn and apply skills in memory compilers having Transistor level circuit Design.
• Resolves a wide range of issues in creative ways
• Inter-team interaction
• Customer focus
• Frequently networks with senior internal and external personnel in own area of expertise
• Experience of FinFet Technology for Memory Design
• Can coordinate, facilitate, and monitor the daily activities of a small to large group of support resources within their section or project team
• With minimal supervision, prioritizes workload to successfully manage multiple tasks and responsibilities
• Proactively addresses and communicates issues impacting productivity

As a Manager, the individual will be involved in challenging projects and drive it to completion in record time.

You will quickly ramp on the existing flow, understand the challenges, and produce the work plan.

Your expertise in deep submicron technology and Finfet, SRAM design, processor design, Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.

You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.

Skills/Experience:

• 10yrs+ Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
• BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from premium institute/university
• Deep understanding of SRAM/Register File architectures and advanced custom circuit implementations.
• Direct experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometre technology nodes
• Mastery in scripting using Perl, python for automation

Fundamentals:

• Understanding of RC circuit of 1st and 2nd order.
• Basics of Digital design (realization of Boolean function using Gates, Mux etc)
• Fundamentals of Transfer function and its analysis for stability etc.
• Strong CMOS fundamentals
• Knowledge of CMOS fabrication
• Good digital design knowledge
• Exposure to basic Analog fundamentals

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits:

• Health & Wellness: Comprehensive medical and healthcare plans that work for you and your family.
• Time Away: In addition to company holidays, we have ETO and FTO Programs.
• Family Support: Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• ESPP: Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Retirement Plans: Save for your future with our retirement plans that vary by region and country.
• Compensation: Competitive salaries.

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What you'll do

Designing and verifying embedded memory compilers for advanced nodes. Collaborating with layout, methodology, and testchip teams to solve technical issues. Optimizing memory architectures for performance and efficiency. Using spice simulators for circuit validation. Communicating technical updates effectively.

What you need

• Expertise in embedded memory (SRAM/ROM/RF/TCAM) design.
• Experience with FinFET/advanced technologies.
• Proficiency with spice simulators and schematic architecture.
• Strong technical communication in Vietnamese and English.
• Team collaboration skills.

Why this matters

Accelerate delivery of high-performance memory IP. Drive innovation in Foundation IP Group projects. Enable cutting-edge chip designs for global clients. Support team collaboration and technical excellence.

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