{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/eda-tools"},"x-facet":{"type":"skill","slug":"eda-tools","display":"Eda Tools","count":79},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_53b55c07-f8c"},"title":"Sr. Application Engineer - Electromagnetics","description":"<p>Engineer the Future with Us</p>\n<p>We currently have 700 open roles</p>\n<p><strong>Innovation Starts Here</strong></p>\n<p>Find Jobs For</p>\n<p>Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Sr. Application Engineer - Electromagnetics</strong></p>\n<p>San Jose, California, United States</p>\n<p>Save</p>\n<p><strong>Hire Type</strong> Employee<strong>Job ID</strong> 13351<strong>Base Salary Range</strong> $112000-$168000<strong>Date posted</strong> 11/10/2025</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a passionate engineering professional with a deep expertise in high-frequency electromagnetics and a drive to solve complex real-world problems. You thrive in customer-facing environments, leveraging your technical acumen and communication skills to deliver actionable solutions and build strong relationships. Your experience with advanced simulation software allows you to translate customer challenges into innovative product capabilities, and you excel at collaborating across multi-disciplinary teams. You possess a growth mindset, always eager to learn new technologies and advance your knowledge, while also contributing to a culture of excellence and continuous improvement. Your approach to problem-solving is logical and thorough, and you are adept at presenting technical concepts in a clear, engaging manner. Whether delivering training, consulting on projects, or supporting new product releases, you bring a sense of urgency, organization, and business acumen to every task. You are comfortable interacting with senior business leaders and stakeholders, and your professionalism enhances the customer experience. If you are ready to make an impact at the intersection of engineering and innovation, Synopsys is the place for you.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Provide advanced technical support and guidance to customers using Ansys electromagnetics simulation tools, ensuring high-quality, timely solutions.</li>\n<li>Engage proactively with key accounts to deliver comprehensive electromagnetic solutions tailored to customer design workflows and business needs.</li>\n<li>Conduct intermediate and advanced training sessions, webinars, and presentations for customers and internal teams.</li>\n<li>Scope, plan, and deliver professional services projects, collaborating with cross-functional application engineering teams.</li>\n<li>Gather and analyze customer requirements, working closely with product development to enhance Ansys software capabilities.</li>\n<li>Test and validate new software releases on industrial problems, providing feedback and driving product improvements.</li>\n<li>Participate in internal initiatives to share best practices and foster knowledge exchange within and across disciplines.</li>\n<li>Travel up to 25% to support customer engagements, training, and project delivery.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerate customer success by enabling seamless integration of Ansys solutions into their design workflows.</li>\n<li>Drive adoption of advanced simulation technologies, helping customers solve critical engineering challenges.</li>\n<li>Enhance customer satisfaction and loyalty through exceptional technical support and consultative services.</li>\n<li>Influence product development by translating customer feedback into innovative new features and capabilities.</li>\n<li>Elevate Synopsys’ reputation as a trusted partner in the engineering and semiconductor industry.</li>\n<li>Contribute to a culture of continuous learning and improvement, sharing expertise and best practices with peers.</li>\n<li>Support business growth through impactful pre-sales technical engagement and solution delivery.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Master’s degree in Electrical Engineering (with emphasis on high-frequency electromagnetics) or a related technical discipline.</li>\n<li>Minimum 3 years of experience in an engineering software environment, with hands-on use of ANSYS or similar CAE/CAD/EDA tools.</li>\n<li>Expertise in signal and power integrity simulation analysis, including cross-talk analysis, impedance simulations, and eye diagram analysis.</li>\n<li>Strong knowledge of circuit-level and timing analysis for signal integrity applications and compliance standards.</li>\n<li>Experience with package, PCB, and connector design processes, and familiarity with EDA tools.</li>\n<li>Fundamental understanding of microwave and antenna concepts, including S-parameters, wave propagation, and scattering analysis.</li>\n<li>Demonstrated ability to conduct training, deliver presentations, and facilitate webinars for technical audiences.</li>\n</ul>\n<p>#CM-1</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_53b55c07-f8c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/san-jose/sr-application-engineer-electromagnetics/44408/93979726576","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$112000-$168000","x-skills-required":["Ansys electromagnetics simulation tools","high-frequency electromagnetics","signal and power integrity simulation analysis","circuit-level and timing analysis","EDA tools","microwave and antenna concepts"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:19:28.901Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Jose"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Ansys electromagnetics simulation tools, high-frequency electromagnetics, signal and power integrity simulation analysis, circuit-level and timing analysis, EDA tools, microwave and antenna concepts","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":112000,"maxValue":168000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5d785d13-76b"},"title":"ASIC Physical Design Senior Manager","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>P&amp;R Applications Engineer, Sr Staff to Principal</strong></p>\n<p>Tokyo, Japan</p>\n<p>Save</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are an accomplished engineer with deep expertise in digital implementation, particularly backend processes such as place &amp; route. You thrive in fast-paced environments where advanced technology nodes (N3/N5/N7) are the norm, and your proficiency in these areas sets you apart as a technical leader. Your analytical mindset allows you to solve complex challenges, optimize workflows, and deliver innovative solutions that drive success for both your team and customers. You are a native Japanese speaker or possess Japanese N2 language proficiency, enabling seamless communication and collaboration within the local market. You are passionate about fostering a culture of excellence, sharing your knowledge, and mentoring fellow engineers. Your commitment to continuous learning and adaptability ensures you stay ahead in the rapidly evolving landscape of semiconductor technology. You embrace diversity, value teamwork, and are motivated by the opportunity to make an impact at the forefront of digital design.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Leading technical engagements with customers on digital implementation projects, focusing on backend place &amp; route processes.</li>\n</ul>\n<ul>\n<li>Providing expert guidance and hands-on support for advanced technology nodes (N3/N5/N7), addressing challenges and optimizing performance.</li>\n</ul>\n<ul>\n<li>Collaborating with internal R&amp;D and product teams to influence tool development and feature enhancement based on customer feedback.</li>\n</ul>\n<ul>\n<li>Developing and delivering technical presentations, training sessions, and documentation in Japanese for both internal and external stakeholders.</li>\n</ul>\n<ul>\n<li>Troubleshooting complex implementation issues and proposing innovative solutions to ensure successful project outcomes.</li>\n</ul>\n<ul>\n<li>Mentoring junior engineers, fostering a culture of knowledge sharing, and contributing to best practices within the organization.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerate customer success by enabling efficient and robust digital implementation using Synopsys tools.</li>\n</ul>\n<ul>\n<li>Drive adoption of advanced technology nodes, expanding Synopsys’ leadership in cutting-edge semiconductor design.</li>\n</ul>\n<ul>\n<li>Enhance product capabilities through actionable feedback and collaboration with development teams.</li>\n</ul>\n<ul>\n<li>Establish Synopsys as a trusted partner in Japan by providing exceptional technical support and communication in Japanese.</li>\n</ul>\n<ul>\n<li>Support the growth and development of engineering talent, contributing to Synopsys’ culture of innovation.</li>\n</ul>\n<ul>\n<li>Shape the future of digital design through your expertise, insights, and dedication to excellence.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Extensive experience in digital implementation, specifically backend place &amp; route methodologies.</li>\n</ul>\n<ul>\n<li>In-depth knowledge of advanced technology nodes (N3/N5/N7) and their associated challenges.</li>\n</ul>\n<ul>\n<li>Proficiency with industry-standard EDA tools for digital design and implementation.</li>\n</ul>\n<ul>\n<li>Native Japanese speaker or Japanese N2 language proficiency (mandatory).</li>\n</ul>\n<ul>\n<li>Strong problem-solving skills and the ability to troubleshoot complex technical issues.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Collaborative team player, eager to share expertise and mentor others.</li>\n</ul>\n<ul>\n<li>Adaptable and open to new ideas, technologies, and approaches.</li>\n</ul>\n<ul>\n<li>Strong communicator, able to explain complex concepts clearly in Japanese.</li>\n</ul>\n<ul>\n<li>Customer-focused, with a proactive approach to solving challenges and delivering value.</li>\n</ul>\n<ul>\n<li>Detail-oriented and committed to high standards of quality and performance.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join a dynamic and diverse team of engineering professionals dedicated to digital implementation excellence. The team is responsible for supporting customers across Japan, driving innovation in advanced technology nodes, and collaborating closely with global R&amp;D groups. Together, you will create solutions that push the boundaries of semiconductor design and help shape the industry’s future.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_85624e24-186","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/tokyo/p-and-r-applications-engineer-sr-staff-to-principal/44408/94297252448","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["digital implementation","backend place & route processes","advanced technology nodes (N3/N5/N7)","EDA tools for digital design and implementation","Japanese language proficiency"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:26.309Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Tokyo"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"digital implementation, backend place & route processes, advanced technology nodes (N3/N5/N7), EDA tools for digital design and implementation, Japanese language proficiency"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4a889b83-b84"},"title":"Staff Applications Engineer","description":"<p>Engineer the Future with Us</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p>You are a passionate engineer with a deep understanding of front-end semiconductor design and a drive to solve complex technical challenges. You thrive in collaborative environments, where your expertise in RTL design, logic synthesis, and equivalence checking can make a tangible difference for customers and colleagues alike. Your ability to diagnose technical issues, communicate effectively, and build strong relationships enables you to support both internal teams and external clients with confidence and empathy. You are comfortable working at the intersection of technology and business, helping customers achieve their goals and maximize their investment in Synopsys products. You enjoy continuous learning, keeping up with industry trends and advancements, and are not afraid to take initiative when facing new challenges. You embrace diversity and inclusion, recognizing the value that different perspectives bring to innovative solutions. Your professional experience has given you a solid foundation in semiconductor design, and you are eager to leverage this expertise to influence product development, customer adoption, and overall success. You are detail-oriented, reliable, and proactive, always striving for excellence in everything you do.</p>\n<p>Providing technical and engineering insight to support and enhance the usability and adoption of Synopsys products for semiconductor clients. Diagnosing, troubleshooting, and resolving complex technical issues related to customer installations, ensuring smooth deployment and operation. Conducting customer training sessions on new implementations and product capabilities, enabling users to fully leverage Synopsys solutions. Reviewing and analyzing customer feedback on product performance, collaborating with R&amp;D to drive enhancements and technical improvements. Partnering with customer technical leaders and Sales teams to identify business challenges and develop tailored technical solutions. Increasing utilization and retention of Synopsys products through effective technical support and strategic account management.</p>\n<p>Accelerate adoption of Synopsys front-end design tools among leading semiconductor companies. Enhance customer satisfaction and loyalty by resolving technical issues and providing proactive support. Drive product innovation by feeding customer insights and technical requirements directly into the R&amp;D roadmap. Empower customers to achieve their business objectives through optimized chip design and verification workflows. Strengthen Synopsys’ reputation as a trusted partner in high-performance silicon design and integration. Contribute to cross-functional collaboration, fostering a culture of technical excellence and customer-centric innovation.</p>\n<p>BTECH + 5 years or MTECH + 3 years of relevant experience in semiconductor front-end design. Proficiency in RTL design, logic synthesis, equivalence checking, and RTL simulations. Working knowledge of UPF, fundamentals of Place &amp; Route (PnR), and Design for Test (DFT) is a plus. Experience with industry-standard EDA tools for logic synthesis and verification. Ability to interpret and apply company policies and procedures to resolve varied technical issues.</p>\n<p>Analytical thinker with strong problem-solving skills. Excellent communicator, able to translate technical concepts for diverse audiences. Collaborative team player who builds productive relationships internally and externally. Adaptable and resourceful, able to exercise judgment and take initiative. Customer-focused, with a commitment to delivering high-quality support and solutions.</p>\n<p>You’ll join a dynamic engineering team based in Bangalore, dedicated to supporting Synopsys’ front-end design solutions for semiconductor clients. The team works closely with R&amp;D, Sales, and customer technical leaders to deliver innovative, reliable, and high-impact applications engineering support. Collaboration, continuous learning, and shared success are at the heart of how we operate.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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Our multidisciplinary teams work across engineering, EDA tools, product management, and customer success to deliver solutions that power tomorrow’s intelligent systems. We value creativity, technical rigor, and excellence, providing an environment where every member can contribute and grow.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Application Engineering, Sr Staff Engineer</strong></p>\n<p>Bengaluru, Karnataka, India</p>\n<p>Save</p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15544</p>\n<p><strong>Date posted</strong></p>\n<p>04/12/2026</p>\n<p><strong>A peek inside our office</strong></p>\n<p>Po Popal</p>\n<p>Workplace Resources, Sr Director</p>\n<p><strong>Alternate Job Titles:</strong></p>\n<ul>\n<li>Senior Staff Application Engineer</li>\n</ul>\n<ul>\n<li>Lead Application Engineer</li>\n</ul>\n<ul>\n<li>Principal Application Engineer</li>\n</ul>\n<ul>\n<li>Technical Solutions Engineer</li>\n</ul>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a passionate and versatile engineering professional who thrives in a dynamic, fast-paced environment. With a deep technical acumen and a knack for creative problem-solving, you are driven to deliver innovative solutions that address complex challenges. You have a proven track record in application engineering, accompanied by a strong understanding of EDA tools, chip design flows, and customer-centric solution delivery. You are an excellent communicator, able to articulate technical concepts clearly to both engineering teams and external stakeholders. Adaptable and resourceful, you embrace new technologies and strive for continual learning, eager to stay ahead in a rapidly evolving industry.</p>\n<p>You value collaboration and are committed to fostering an inclusive, supportive team culture. Your leadership skills shine in mentoring others and guiding cross-functional projects. You are motivated by the opportunity to shape technology that impacts millions of lives and are ready to take ownership of challenging projects. Your customer-first mindset ensures that you consistently deliver high-impact results, while your attention to detail guarantees the reliability and quality Synopsys is known for. If you are looking for a role where your expertise will be recognized and your contributions will make a tangible difference, this is the opportunity for you.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Collaborating with customers to understand their technical challenges and providing comprehensive solutions using Synopsys tools and platforms.</li>\n</ul>\n<ul>\n<li>Driving the adoption and integration of EDA tools in customer design flows, ensuring optimal utilization and performance.</li>\n</ul>\n<ul>\n<li>Developing and delivering technical workshops, training sessions, and product demonstrations tailored to customer needs.</li>\n</ul>\n<ul>\n<li>Partnering with R&amp;D and product management teams to influence product direction and resolve complex technical issues.</li>\n</ul>\n<ul>\n<li>Authoring and maintaining technical documentation, application notes, and best practice guides.</li>\n</ul>\n<ul>\n<li>Providing pre- and post-sales technical support, including troubleshooting, bug tracking, and solution development.</li>\n</ul>\n<ul>\n<li>Mentoring and guiding junior engineers, fostering a culture of technical excellence and innovation.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerating customer success by ensuring seamless deployment and integration of Synopsys solutions.</li>\n</ul>\n<ul>\n<li>Enhancing product quality and usability through direct feedback and collaboration with R&amp;D teams.</li>\n</ul>\n<ul>\n<li>Expanding Synopsys’ footprint in key accounts by demonstrating technical excellence and building strong customer relationships.</li>\n</ul>\n<ul>\n<li>Reducing design cycle times and improving overall productivity for our customers.</li>\n</ul>\n<ul>\n<li>Contributing to the growth of Synopsys’ technical community through knowledge sharing and mentoring.</li>\n</ul>\n<ul>\n<li>Influencing future product innovations by identifying emerging customer needs and market trends.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Strong expertise in ASIC/FPGA design and verification methodologies.</li>\n</ul>\n<ul>\n<li>Hands-on experience with industry-leading EDA tools such as synthesis, simulation, and formal verification platforms.</li>\n</ul>\n<ul>\n<li>Proficiency in scripting languages (e.g., Python, Perl, TCL) and automation frameworks.</li>\n</ul>\n<ul>\n<li>Solid understanding of digital design, SoC architectures, and semiconductor manufacturing processes.</li>\n</ul>\n<ul>\n<li>Ability to analyze and resolve complex technical issues quickly and effectively.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Innovative thinker with a proactive approach to problem-solving.</li>\n</ul>\n<ul>\n<li>Excellent communicator, able to convey complex technical concepts to diverse audiences.</li>\n</ul>\n<ul>\n<li>Collaborative team player who values diversity and inclusion.</li>\n</ul>\n<ul>\n<li>Customer-oriented with a commitment to delivering outstanding service and solutions.</li>\n</ul>\n<ul>\n<li>Adaptable, resilient, and eager to learn new technologies and methodologies.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join an accomplished team of application engineering experts at the forefront of EDA and semiconductor innovation. Our team partners closely with customers, R&amp;D, and product management to deliver world-class solutions and technical support. We foster a collaborative, inclusive culture that encourages continuous learning, knowledge sharing, and professional growth. Together, we drive the adoption of cutting-edge technologies and ensure Synopsys remains the trusted partner for industry leaders worldwide.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7d81d333-04b","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/application-engineering-sr-staff-engineer/44408/93904809536","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["ASIC/FPGA design and verification methodologies","EDA tools","chip design flows","customer-centric solution delivery","scripting languages","automation frameworks","digital design","SoC architectures","semiconductor manufacturing processes"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:16:02.935Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"ASIC/FPGA design and verification methodologies, EDA tools, chip design flows, customer-centric solution delivery, scripting languages, automation frameworks, digital design, SoC architectures, semiconductor manufacturing processes"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_a29274cc-e50"},"title":"Analog Design, Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>As a Staff Engineer in Analog Design, you will be part of a team focused on developing high-speed SerDes physical interfaces and supporting analog blocks for advanced SoCs. You will work alongside passionate engineers who value technical excellence, innovation, and teamwork - driving the integration of new capabilities for the Era of Smart Everything.</p>\n<p>Designing and validating analog and mixed-signal circuits, with a focus on high-speed SerDes interfaces (including drivers, receivers, clocking, PLL, DLL, and CDR). Conducting schematic entry, simulation, and final validation of analog blocks, from basic reference components to complex analog front-ends. Collaborating with layout engineers to review and optimize layout designs, minimizing the impact of parasitics on circuit performance. Developing and validating custom digital circuits for high-speed applications, ensuring timing closure and constraint checks using industry standard tools such as Primetime and Nanotime. Utilizing IC design tools and SPICE simulators for simulation, verification, and performance analysis of analog circuits. Engaging with international teams to share knowledge, solve problems, and drive innovation in analog design methodologies.</p>\n<p>Key responsibilities include: Designing and validating analog and mixed-signal circuits Conducting schematic entry, simulation, and final validation of analog blocks Collaborating with layout engineers to review and optimize layout designs Developing and validating custom digital circuits Utilizing IC design tools and SPICE simulators Engaging with international teams</p>\n<p>The ideal candidate will have: MSc in Electrical or Computer Engineering (or equivalent) with a solid background in transistor-level circuit design 5+ years of hands-on experience in analog circuit design, especially in high-speed mixed-signal environments Strong knowledge of deep submicron CMOS technologies and their application in modern ICs Experience with SPICE simulators, simulation methods, and verification tools for analog circuit analysis Familiarity with industry standard IC design tools and digital circuit validation, including STA timing closure (Primetime, Nanotime, or equivalent) Preferred: Knowledge of Synopsys EDA tools and familiarity with Unix and scripting languages (TCL, Python)</p>\n<p>As a Staff Engineer, you will be responsible for delivering high-quality designs, collaborating with cross-functional teams, and driving innovation in analog design methodologies. You will also be expected to mentor junior engineers and contribute to the development of new design techniques and tools.</p>\n<p>If you are a motivated and experienced analog design engineer looking to take your career to the next level, we encourage you to apply for this exciting opportunity.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_a29274cc-e50","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/moreira/analog-design-staff-engineer/44408/94212498336","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":"Competitive salary and benefits package","x-skills-required":["Analog circuit design","Mixed-signal circuit design","Deep submicron CMOS technologies","SPICE simulators","Simulation methods","Verification tools","Industry standard IC design tools","Digital circuit validation","STA timing closure"],"x-skills-preferred":["Synopsys EDA tools","Unix and scripting languages","TCL","Python"],"datePosted":"2026-04-24T14:15:36.855Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Moreira"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog circuit design, Mixed-signal circuit design, Deep submicron CMOS technologies, SPICE simulators, Simulation methods, Verification tools, Industry standard IC design tools, Digital circuit validation, STA timing closure, Synopsys EDA tools, Unix and scripting languages, TCL, Python"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_37b05d17-e65"},"title":"Applications Engineering, Staff Engineer","description":"<p>Engineer the Future with Us</p>\n<p>We currently have 700 open roles</p>\n<p><strong>Innovation Starts Here</strong></p>\n<p>Find Jobs For</p>\n<p>Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Applications Engineering, Staff Engineer</strong></p>\n<p>Seongnam-si, Gyeonggi-do, South Korea</p>\n<p>Save</p>\n<p><strong>Hire Type</strong> Employee<strong>Job ID</strong> 17125<strong>Date posted</strong> 04/23/2026</p>\n<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p>You Are:</p>\n<p>You are a highly motivated Staff Engagement Applications Engineer with over 6~ 8 years of hands-on experience in synthesis or formal verification for Tape out project. Your technical expertise helps customer to succeedfor most of Tape out projects to our worldwide key customers to accelerate business growth. You thrive in dynamic environments and possess excellent communication skills, including a strong command of English. Your background in EE/CS, coupled with your experience with EDA tools like DC, Formality, RTLA, and Fusion Compiler, makes you an ideal fit for this role.</p>\n<p>What You’ll Be Doing:</p>\n<ul>\n<li>Providing front-end (Synthesis, Equivalence Check) technical support to field engineers, technicians, and product support personnel.</li>\n</ul>\n<ul>\n<li>Diagnosing, troubleshooting, and debugging complex electro/mechanical equipment, computer systems, and software.</li>\n</ul>\n<ul>\n<li>Collaborating with customers to understand their technical requirements and deliver tailored solutions.</li>\n</ul>\n<ul>\n<li>Conductingtraining sessions and workshops for both customers and internal teams.</li>\n</ul>\n<ul>\n<li>Developing andmaintainingtechnical documentation and support materials.</li>\n</ul>\n<ul>\n<li>Working closely with the development team toidentifyand resolve product issues.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Enhancing customer satisfaction by deliveringtimelyand effective technical support.</li>\n</ul>\n<ul>\n<li>Contributing to the development and enhancement of Synopsys products.</li>\n</ul>\n<ul>\n<li>Helping customers maximize the value of Synopsys technologies.</li>\n</ul>\n<ul>\n<li>Reducing downtime and increasing the efficiency of customer operations.</li>\n</ul>\n<ul>\n<li>Strengthening customer relationships and building trust in Synopsys.</li>\n</ul>\n<ul>\n<li>Driving continuous improvement in support processes and best practices.</li>\n</ul>\n<p>What You’ll Need:</p>\n<ul>\n<li>Bachelor’s degree orMaster&#39;s degree in Electrical Engineering, Computer Science, or a related field.</li>\n</ul>\n<ul>\n<li>Solid understanding of semiconductor and software technologies.</li>\n</ul>\n<ul>\n<li>Minimum6~8 years of hands-on experience with tape-out project execution.</li>\n</ul>\n<ul>\n<li>Experience in troubleshooting and debugging complex systems.</li>\n</ul>\n<ul>\n<li>Experience with scripting languages likeC/C++,PerlandTcl.</li>\n</ul>\n<ul>\n<li>Strong understanding of ASIC design flow, VLSI, and CAD development.</li>\n</ul>\n<ul>\n<li>Excellent analytical and problem-solving skills.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Excellent communicator with strong interpersonal skills.</li>\n</ul>\n<ul>\n<li>Detail-oriented and highly organized.</li>\n</ul>\n<ul>\n<li>Proactive and self-motivated.</li>\n</ul>\n<ul>\n<li>Adaptable and able to thrive in a fast-paced environment.</li>\n</ul>\n<ul>\n<li>Collaborative team player with a positive attitude.</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You will join a dynamic and innovative team focused on supporting and driving customer success. Our team collaborates closely with customer to drive technological advancements and provide top-tier support to our customers. We are passionate about pushing the boundaries of what&#39;s possible in chip design and software security, and we are looking for like-minded individuals to join us on this exciting journey.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_37b05d17-e65","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/seongnam-si/applications-engineering-staff-engineer/44408/94315806304","x-work-arrangement":null,"x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["EDA tools","DC","Formality","RTLA","Fusion Compiler","ASIC design flow","VLSI","CAD development","C/C++","Perl","Tcl","Electrical Engineering","Computer Science"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:15:22.580Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Seongnam-si"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"EDA tools, DC, Formality, RTLA, Fusion Compiler, ASIC design flow, VLSI, CAD development, C/C++, Perl, Tcl, Electrical Engineering, Computer Science"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_cdd41515-ded"},"title":"SOC Engineering, Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a passionate and driven Physical Design Engineer with a strong foundation in RTL2GDSII flows and a proven ability to independently own and deliver complex designs. With at least 5 years of hands-on experience in advanced technology nodes such as 7nm, 5nm, or even 3nm, you thrive in fast-paced, innovative environments and are eager to tackle new technical challenges.</p>\n<p>Your expertise spans the entire physical design spectrum,from synthesis, place &amp; route, and clock tree synthesis (CTS) to timing optimization, static timing analysis (STA), timing closure, EMIR, and physical verification. You have experience in both block-level and full-chip floor-planning, and you’re adept at navigating timing constraints and closing timing on aggressive schedules.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Independently own and drive full RTL2GDSII physical design implementation for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.</li>\n</ul>\n<ul>\n<li>Execute synthesis, place &amp; route, clock tree synthesis (CTS), timing optimization, and static timing analysis (STA) to meet stringent performance and power targets.</li>\n</ul>\n<ul>\n<li>Perform block-level and full-chip floor-planning, physical verification, EMIR analysis, and timing closure activities.</li>\n</ul>\n<ul>\n<li>Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.</li>\n</ul>\n<ul>\n<li>Utilize and optimize Synopsys EDA tools, including Design Compiler, IC Compiler II, and PrimeTime, to deliver state-of-the-art silicon solutions.</li>\n</ul>\n<ul>\n<li>Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.</li>\n</ul>\n<ul>\n<li>Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.</li>\n</ul>\n<ul>\n<li>Enable Synopsys customers to achieve first-pass silicon success through robust and innovative physical design implementations.</li>\n</ul>\n<ul>\n<li>Drive technical excellence and best practices within the team, influencing the future direction of physical design methodologies at Synopsys.</li>\n</ul>\n<ul>\n<li>Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.</li>\n</ul>\n<ul>\n<li>Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.</li>\n</ul>\n<ul>\n<li>Support strategic customer engagements and help expand Synopsys&#39; presence in the semiconductor ecosystem through successful project outcomes.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_cdd41515-ded","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/soc-engineering-staff-engineer/44408/94169001488","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL2GDSII flows","synthesis","place & route","clock tree synthesis (CTS)","timing optimization","static timing analysis (STA)","physical verification","EMIR analysis","timing closure","block-level and full-chip floor-planning","Python","PERL","TCL","Synopsys EDA tools","Design Compiler","IC Compiler II","PrimeTime"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:15:21.802Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL2GDSII flows, synthesis, place & route, clock tree synthesis (CTS), timing optimization, static timing analysis (STA), physical verification, EMIR analysis, timing closure, block-level and full-chip floor-planning, Python, PERL, TCL, Synopsys EDA tools, Design Compiler, IC Compiler II, PrimeTime"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_68de4e05-3af"},"title":"ASIC Physical Design, Sr Engineer","description":"<p>We are seeking a highly skilled ASIC Physical Design Senior Engineer to join our team. As a key member of our team, you will be responsible for implementing and integrating state-of-the-art DDR IPs at advanced technology nodes (10nm, 7nm, 6nm, and below). You will also perform timing closure for designs operating above ~4GHz, ensuring robust performance and reliability.</p>\n<p>Your responsibilities will include:</p>\n<p>Implementing and integrating state-of-the-art DDR IPs at advanced technology nodes (10nm, 7nm, 6nm, and below). Performing timing closure for designs operating above ~4GHz, ensuring robust performance and reliability. Collaborating daily with local and US counterparts to align on technical challenges and project milestones. Integrating mixed-signal macro IPs and optimizing their placement within complex chip architectures. Designing and building efficient clock trees with exceptionally tight skew balancing to meet stringent requirements. Driving continuous improvement in implementation methodologies and sharing best practices across the team. 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You will also have proficiency in EDA tools for synthesis, place-and-route, and timing analysis.</p>\n<p>If you are a detail-oriented and analytical individual with a drive for technical excellence, effective communication skills, and a collaborative mindset, we encourage you to apply for this exciting opportunity.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_68de4e05-3af","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/asic-physical-design-sr-engineer/44408/93712504224","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["ASIC physical design","DDR IP implementation","Timing closure","EDA tools","Synthesis","Place-and-route","Timing analysis"],"x-skills-preferred":["Clock tree synthesis","Mixed-signal macro IPs","Implementation methodologies"],"datePosted":"2026-04-24T14:15:05.659Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"ASIC physical design, DDR IP implementation, Timing closure, EDA tools, Synthesis, Place-and-route, Timing analysis, Clock tree synthesis, Mixed-signal macro IPs, Implementation methodologies"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c4d2af60-a74"},"title":"Analog Design, Principal Engineer - 17007","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You Are: You are a visionary and detail-oriented principal engineer, passionate about pushing the boundaries of analog circuit design in high-speed interfaces. With a deep technical foundation and proven leadership skills, you thrive in collaborative environments and are eager to mentor the next generation of engineers.</p>\n<p>Your expertise in SerDes and analog macros enables you to dissect complex architectural requirements and translate them into robust, scalable designs. You are adept at balancing power, area, and performance trade-offs, and you proactively seek innovative solutions to technical challenges.</p>\n<p>What You’ll Be Doing:</p>\n<ul>\n<li>Own the architecture, design, and implementation of analog macro-level circuits for SerDes IP.</li>\n<li>Track and review the technical progress of sub-block owners, ensuring alignment with project goals.</li>\n<li>Interpret SerDes standards and architecture documents to develop detailed analog specifications.</li>\n<li>Identify and refine circuit implementations, optimizing for power, area, and performance targets.</li>\n<li>Propose and execute design and verification strategies using advanced simulator features for robust outcomes.</li>\n<li>Oversee physical layout to minimize parasitics, device stress, and process variation impacts.</li>\n<li>Collaborate closely with digital RTL engineers on calibration, adaptation, and control algorithms for analog circuits.</li>\n<li>Present simulation data and technical insights for peer and customer reviews.</li>\n<li>Mentor and review the progress of junior engineers, fostering growth and technical excellence.</li>\n<li>Document design features, methodologies, and test plans for internal and customer use.</li>\n<li>Consult on electrical characterization and testing of circuits within the SerDes IP product portfolio.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Drive innovation and quality in Synopsys’ industry-leading SerDes IP solutions.</li>\n<li>Elevate the performance and reliability of analog designs, enabling next-generation connectivity standards.</li>\n<li>Contribute to the success of global customers by delivering robust, silicon-proven analog macros.</li>\n<li>Enhance cross-functional collaboration across design, layout, and digital teams.</li>\n<li>Mentor and develop junior engineers, strengthening Synopsys’ talent pipeline.</li>\n<li>Influence the direction of advanced analog design methodologies and verification strategies.</li>\n<li>Provide technical leadership in customer engagements and peer reviews.</li>\n<li>Support continuous improvement in design processes and documentation practices.</li>\n</ul>\n<p>What You’ll Need:</p>\n<ul>\n<li>PhD with 7+ years, or MSc with 10+ years of SerDes/high-speed analog design experience.</li>\n<li>Expertise in transistor-level circuit design and strong CMOS design fundamentals.</li>\n<li>Silicon-proven experience implementing circuits for TX, RX, and Clock paths within SerDes architectures.</li>\n<li>Leadership experience in guiding small teams through macro-level design projects.</li>\n<li>In-depth knowledge of SerDes sub-circuits such as equalizers, samplers, drivers, serializers, deserializers, VCOs, phase interpolators, DLLs, PLLs, bandgap references, ADCs, and DACs.</li>\n<li>Advanced skills in optimizing FinFET CMOS layouts to minimize parasitics and local device mismatches.</li>\n<li>Awareness of ESD and reliability issues, including circuit techniques and layout strategies.</li>\n<li>Proficiency with EDA tools for schematic entry, physical layout, and design verification.</li>\n<li>Experience with SPICE simulators for detailed circuit analysis.</li>\n<li>Familiarity with analog behavioral modeling and simulation control using Verilog-A.</li>\n<li>Programming experience in TCL, Perl, C, Python, and MATLAB for design automation and data analysis.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Analytical thinker with exceptional problem-solving skills.</li>\n<li>Collaborative leader and effective communicator.</li>\n<li>Detail-oriented and methodical in approach.</li>\n<li>Adaptable and open to learning new technologies.</li>\n<li>Mentor and role model for junior engineers.</li>\n<li>Self-motivated and proactive in driving project outcomes.</li>\n<li>Committed to excellence, reliability, and innovation.</li>\n</ul>\n<p>The Team You’ll Be A Part Of: You will join a dynamic and multidisciplinary team of analog, digital, and mixed-signal engineers dedicated to developing industry-leading SerDes IP solutions. The team is focused on delivering high-performance, reliable, and scalable designs that enable advanced connectivity in semiconductor products. Collaboration, mentorship, and technical innovation are at the core of the team’s culture, providing an environment where your expertise and leadership will have a direct impact on both product and team success.</p>\n<p>Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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Mentor and develop the next wave of ASIC design engineers, fostering a culture of learning and technical excellence. Contribute to the evolution of Synopsys’ EDA tool ecosystem by providing critical feedback and championing innovative solutions. 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during early design stages to optimize and define SIPI (Signal Integrity/Power Integrity) performance requirements, including bump mapping and power estimation.</li>\n<li>Designing and developing advanced silicon package solutions such as silicon interposers, RDL fanout packages, and silicon bridge packages.</li>\n<li>Modeling and analyzing advanced package designs to ensure optimal electrical, thermal, and mechanical performance.</li>\n<li>Representing Synopsys on business unit projects as a technical leader and subject matter expert in advanced packaging.</li>\n<li>Resolving a wide range of design and integration issues using creative, data-driven approaches.</li>\n<li>Supporting customer engagements in exploring and implementing advanced package solutions with Synopsys IPs.</li>\n<li>Collaborating with global teams to share best practices and drive innovation in advanced packaging methodologies.</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>Bachelor’s degree in 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include both monetary and non-monetary offerings.</p>\n<p>Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_aa155194-bee","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/advanced-packaging-design-sr-staff-engineer-13846/44408/89639743968","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$157,000-$235,000","x-skills-required":["advanced circuit and transmission line theory","multi-physics analysis","EDA tools","Windows and Linux operating systems","TSMC, Intel, Samsung, or OSAT advanced package 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>As a Staff Engineer in Analog Design, you will be part of a fast-growing team dedicated to developing the highest data rate SerDes IP in advanced FinFET/GAA process nodes. You will design and develop medium complexity analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Design and develop medium complexity analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.</li>\n<li>Define and plan analog design activities, setting clear milestones and deliverables for project success.</li>\n<li>Prepare and conduct technical design reviews, identifying improvements, tracking actions, and ensuring best practices are followed.</li>\n<li>Evaluate and minimize the impact of layout parasitic effects by collaborating closely with layout teams, optimizing circuit performance, power, and area.</li>\n<li>Perform silicon correlation with simulation results, analyzing discrepancies and driving design refinements.</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Accelerate the development of industry-leading SerDes IP products, supporting diverse markets such as mobile, automotive, cloud computing, HPC, AI, IoT, 5G, and storage, enabling high-speed chip-to-chip communications in next-generation devices.</li>\n<li>Enhance Synopsys&#39; reputation as a provider of silicon-proven IP by delivering reliable, high-performance analog designs.</li>\n<li>Reduce risk for customers by ensuring robust correlation between simulation and silicon, leading to differentiated products in the marketplace.</li>\n<li>Foster innovation and continuous improvement within the analog and mixed-signal R&amp;D team, setting benchmarks for technical excellence.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>M.Sc. degree in Electrical Engineering with 3+ years of experience, or Ph.D. in Electrical Engineering with 1.5+ years of experience.</li>\n<li>Background in CMOS analog circuit design, preferably including ADC, DAC, PLL, Rx, Tx, References, or related areas.</li>\n<li>Familiarity with industry-standard IC design packages and EDA tools.</li>\n<li>Experience working in UNIX operating systems.</li>\n<li>Good written and verbal communication skills in English.</li>\n<li>System-level knowledge of SerDes architecture is a plus.</li>\n</ul>\n<p>Team:</p>\n<p>You will join Synopsys&#39; fast-growing analog and mixed-signal R&amp;D team, dedicated to developing the highest data rate SerDes IP in advanced FinFET/GAA process nodes. The team is global, dynamic, and cross-functional, working collaboratively to deliver world-class products that power innovations across multiple industries.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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As a member of our Hardware-Analytics and Test (HAT) business unit, you will be part of the SLM Hardware Group (SHG) developing advanced SLM IPs and subsystems.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Design and implement physical design flows for SLM IPs and subsystems, including state-of-the-art SLM Controllers and on-chip Monitors.</li>\n<li>Execute RTL2GDS flows on advanced process nodes (16nm to 3nm and beyond), ensuring robust performance and reliability.</li>\n<li>Perform static timing analysis, synthesis, and layout closure using industry-leading EDA tools, preferably Synopsys PrimeTime, ICC2, Design Compiler, or Fusion Compiler.</li>\n<li>Collaborate with cross-functional teams to integrate soft and mixed-signal IPs, optimize design margins, and address high-frequency, multi-voltage, and low-power requirements.</li>\n<li>Develop and enhance automation scripts (TCL/PERL) to streamline design processes and improve execution efficiency.</li>\n<li>Participate in project planning, execution, and mentoring, supporting both internal teams and external customers with technical expertise and guidance.</li>\n<li>Contribute to the signoff and verification of designs, ensuring compliance with quality and reliability standards.</li>\n</ul>\n<p>Impact:</p>\n<ul>\n<li>Accelerate the integration and deployment of next-generation SLM products, enabling customers to bring differentiated solutions to market faster and with reduced risk.</li>\n<li>Optimize semiconductor lifecycle management through innovative hardware IP, test, and analytics, enhancing performance, power, area, and yield.</li>\n<li>Drive advancements in chip design and verification methodologies, supporting the evolution of process nodes and IP integration.</li>\n<li>Enhance reliability and scalability of technology products, contributing to breakthroughs in AI, IoT, automotive, and cloud sectors.</li>\n<li>Empower global teams and customers with robust solutions, technical guidance, and effective collaboration.</li>\n<li>Support Synopsys&#39; leadership in the Era of Smart Everything, powering the technologies that shape our connected world.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Strong experience in standard ASIC RTL2GDS physical implementation and signoff flows.</li>\n<li>Hands-on expertise in synthesis, pre-layout STA, post-layout STA, and CTS tools.</li>\n<li>BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience.</li>\n<li>Automation-focused mindset with proven experience in scripting (TCL/PERL) and custom flow development.</li>\n<li>Exposure to soft and mixed-signal IPs, high-frequency/multi-voltage designs, and low-power methodologies.</li>\n<li>Proficiency with EDA tools from any vendor, preferably Synopsys tools (PrimeTime, ICC2, Design Compiler, Fusion Compiler).</li>\n<li>Solid understanding of OCV, POCV, derates, crosstalk, and design margins.</li>\n<li>Experience in layout of digital blocks, timing constraints, STA, and timing closure.</li>\n<li>Experience with PVT-sensors and/or DFT/DFx technologies is a strong plus.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Collaborative and inclusive team player who values diversity and supports others.</li>\n<li>Excellent communicator, able to convey complex technical concepts clearly and effectively.</li>\n<li>Mentor and leader, providing guidance and support to peers and junior engineers.</li>\n<li>Adaptable and innovative, eager to learn and embrace new technologies and methodologies.</li>\n<li>Self-motivated with strong project execution and planning skills.</li>\n<li>Customer-focused, dedicated to delivering high-quality solutions and support.</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You’ll join the rapidly expanding Hardware-Analytics and Test (HAT) business unit as a member of the SLM Hardware Group (SHG). The team is dedicated to developing advanced SLM IPs and subsystems, leveraging expertise in backend and physical design to deliver robust, high-performance solutions.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_4f7dae70-9ee","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/r-and-d-engineer-staff-pd-pnr-cts/44408/93647959680","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL2GDS physical implementation","Synthesis","Static timing analysis","Place and route","Layout closure","Automation scripting","TCL/PERL","EDA tools","Synopsys PrimeTime","ICC2","Design Compiler","Fusion Compiler","Soft and mixed-signal IPs","High-frequency/multi-voltage designs","Low-power methodologies","PVT-sensors","DFT/DFx technologies"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:12:09.026Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL2GDS physical implementation, Synthesis, Static timing analysis, Place and route, Layout closure, Automation scripting, TCL/PERL, EDA tools, Synopsys PrimeTime, ICC2, Design Compiler, Fusion Compiler, Soft and mixed-signal IPs, High-frequency/multi-voltage designs, Low-power methodologies, PVT-sensors, DFT/DFx technologies"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_6c3773cd-28f"},"title":"Lead RTL Verification Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. 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You will also debug RTL issues, manage regressions, and lead root cause analysis for failures.</p>\n<p>Guiding and mentoring junior engineers, establishing verification standards and best practices, collaborating with design, software, and validation teams to ensure seamless project delivery and integration, evaluating and championing new verification tools, automation scripts, and methodologies to drive innovation.</p>\n<p>Elevate the quality and reliability of Synopsys&#39; mixed signal IPs, directly impacting the success of global semiconductor partners. Accelerate innovation in chip design and verification, contributing to industry-leading products and solutions. Mentor and empower the next generation of engineers, fostering a culture of excellence and growth. Drive adoption of best-in-class verification standards, enhancing productivity and efficiency across teams. Enable seamless integration of complex IPs by bridging design, software, and validation disciplines. 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Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Applications Engineering, Staff Engineer</strong></p>\n<p>United States Off-siteSave</p>\n<p><strong>Remote Eligible</strong> Yes<strong>Hire Type</strong> Employee<strong>Job ID</strong> 16527<strong>Base Salary Range</strong> $112000-$168000<strong>Date posted</strong> 04/07/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a seasoned Physical Verification Specialist, deeply passionate about advancing semiconductor technology and eager to make your mark in a high-impact, customer-facing role. With over seven years of hands-on industry experience, you are adept at DRC, LVS, FILL, and PERC, and have a track record of delivering innovative solutions for advanced physical verification challenges. Your expertise spans EDA tools such as IC Validator, Calibre, or Assura, and you possess a comprehensive understanding of runset development and backend physical design flows. You thrive in dynamic environments, seamlessly managing multiple customer engagements and collaborating with cross-functional teams to drive success. Your programming skills in Python, TCL, or Perl enable you to automate and optimize verification flows, while your attention to detail ensures robust technical documentation and effective troubleshooting. You are a proactive problem-solver, continually seeking to expand your knowledge and stay ahead of emerging technologies. Your exceptional communication and interpersonal skills empower you to build strong relationships with customers and colleagues alike, ensuring their needs are met and their goals achieved. Above all, you are motivated by the opportunity to shape the future of semiconductor design, contributing your expertise and enthusiasm to a team that values innovation, diversity, and excellence.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Engaging directly with customers to understand their physical verification challenges and deliver tailored solutions.</li>\n</ul>\n<ul>\n<li>Supporting the sale and adoption of the IC Validator product, enhancing customer performance, quality, and development timelines.</li>\n</ul>\n<ul>\n<li>Providing deep expertise in physical verification for advanced node designs, ensuring robust and accurate results.</li>\n</ul>\n<ul>\n<li>Managing multiple customer activities, including product demonstrations, evaluations, and competitive benchmarking.</li>\n</ul>\n<ul>\n<li>Conducting training sessions, resolving technical issues, and offering ongoing technical account management.</li>\n</ul>\n<ul>\n<li>Collaborating with account teams to develop customized flows and solutions that address unique customer needs.</li>\n</ul>\n<ul>\n<li>Creating and maintaining flows in TCL/Python, as well as authoring DRC/LVS/FILL/PERC rule decks.</li>\n</ul>\n<ul>\n<li>Working closely with R&amp;D, Product Engineering, and Sales teams to drive tool enhancement and customer success.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerating customer adoption of Synopsys’ IC Validator, driving improved design performance and faster development cycles.</li>\n</ul>\n<ul>\n<li>Enhancing the quality and reliability of semiconductor designs through advanced physical verification methodologies.</li>\n</ul>\n<ul>\n<li>Reducing time-to-market for customers by streamlining verification workflows and resolving technical challenges.</li>\n</ul>\n<ul>\n<li>Supporting the ongoing innovation of Synopsys products through direct feedback and close collaboration with R&amp;D.</li>\n</ul>\n<ul>\n<li>Strengthening customer relationships and satisfaction through expert guidance and responsive support.</li>\n</ul>\n<ul>\n<li>Positioning Synopsys as the preferred partner for cutting-edge physical verification solutions in the semiconductor industry.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>BS or MS degree in Electronic Engineering, Computer Science, or related field with strong knowledge of VLSI and device components.</li>\n</ul>\n<ul>\n<li>Strong scripting/programming skills, with proficiency in Python, TCL, Perl, or shell scripting.</li>\n</ul>\n<ul>\n<li>7+ years of industry experience in physical verification flows (LVS/DRC/FILL/PERC) and runset development.</li>\n</ul>\n<ul>\n<li>Hands-on experience with EDA tool products such as IC Validator, Calibre, or Assura.</li>\n</ul>\n<ul>\n<li>Understanding of backend physical design flows (FC/Innovus), custom layouts (Custom Compiler/Virtuoso layout), and PEX flows.</li>\n</ul>\n<ul>\n<li>Ability to produce clear and comprehensive technical documentation.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Innovative thinker with a passion for learning and exploring new technologies.</li>\n</ul>\n<ul>\n<li>Resilient and able to perform well under high-pressure situations.</li>\n</ul>\n<ul>\n<li>Proactive, customer-centric, and results-oriented.</li>\n</ul>\n<ul>\n<li>Strong communication skills with proficiency in English.</li>\n</ul>\n<ul>\n<li>Excellent interpersonal skills and a collaborative mindset.</li>\n</ul>\n<ul>\n<li>Detail-oriented, analytical, and skilled at troubleshooting and problem-solving.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a dynamic Applications Engineering team dedicated to driving customer success in physical verification. Our team collaborates across R&amp;D, Product Engineering, and Sales, leveraging diverse expertise to deliver innovative solutions for advanced semiconductor designs. Together, we foster an inclusive culture that values continuous learning, teamwork, and excellence.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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As a Staff Engineer, you will be responsible for leading the design and development of next-generation DDR and HBM PHY IP layout, driving technical innovation and best practices.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Lead the design and development of next-generation DDR and HBM PHY IP layout</li>\n<li>Provide technical mentorship and guidance to junior engineers</li>\n<li>Take ownership of layout planning, execution, and quality review processes</li>\n<li>Collaborate with cross-functional teams to meet project goals and customer requirements</li>\n<li>Manage effort estimation, project scheduling, and execution in multi-disciplinary team settings</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>BTech/MTech degree in Electronics, Electrical Engineering, or a related field</li>\n<li>Minimum 5 years of relevant experience in physical layout design, particularly in advanced nodes (7nm and below)</li>\n<li>Strong command of deep submicron effects, advanced floorplan techniques, and process technologies such as CMOS, FinFET, and GAA</li>\n<li>Expertise in layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, and bond-pad/IO frame design</li>\n<li>Demonstrated ability to lead projects, manage schedules, and deliver high-quality results within tight timelines</li>\n</ul>\n<p>Preferred Qualifications:</p>\n<ul>\n<li>Experience with industry-standard EDA tools for layout and verification</li>\n<li>Strong problem-solving skills and ability to work in a fast-paced environment</li>\n<li>Excellent communication and collaboration skills</li>\n</ul>\n<p>Benefits:</p>\n<ul>\n<li>Comprehensive medical and healthcare plans</li>\n<li>Time away from work programs</li>\n<li>Family support programs</li>\n<li>ESPP</li>\n</ul>\n<p>At Synopsys, we value diversity and inclusion and are committed to creating a workplace where everyone feels valued and supported. We are an equal opportunity employer and welcome applications from qualified candidates of all backgrounds.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_8ec6d1f4-b98","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/layout-design-staff-engineer/44408/93942161216","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["physical layout design","deep submicron effects","advanced floorplan techniques","process technologies","layout matching","ESD","latch-up","PERC","EMIR","DFM","LEF generation","bond-pad/IO frame design"],"x-skills-preferred":["industry-standard EDA tools","problem-solving skills","communication skills","collaboration skills"],"datePosted":"2026-04-24T14:09:19.554Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"physical layout design, deep submicron effects, advanced floorplan techniques, process technologies, layout matching, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad/IO frame design, industry-standard EDA tools, problem-solving skills, communication skills, collaboration skills"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c208b273-78c"},"title":"Layout Design Engineer","description":"<p>You will be part of an R&amp;D team developing high-speed analog and mixed-signal layout. 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You will also structure, populate, and maintain the component libraries upon which those designs will be based.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Design and implement workflows for shared component libraries</li>\n<li>Evolve strategies for backing stores and access</li>\n<li>Build and maintain automation tools to accelerate library creation, maintenance, and quality control</li>\n<li>Create schematic symbols, footprints, and 3D models for new library components</li>\n</ul>\n<p>The team uses the KiCad suite of EDA tools, though familiarity with that suite can be learned on the job.</p>\n<p>In this role, you will work closely with electrical and mechanical engineers to trade off design requirements, place and route boards, handle DFM feedback from board vendors to get to build readiness, and create rulesets and stackup templates to accelerate future designs.</p>\n<p>You will be expected to have a background in PCB design, be interested and willing to try new tools and technologies to accelerate your work, have an unflappable commitment to principled organization and consistent quality, and be willing to tell your designers that they&#39;re prioritizing badly.</p>\n<p>Success in this role will be measured by your ability to build a consistent and high-quality library that is easy to maintain, electrical design engineers spending a majority of their time making schematics, and growing design-reuse across the organization.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7770fdd5-4e7","directApply":true,"hiringOrganization":{"@type":"Organization","name":"OpenAI","sameAs":"https://openai.com","logo":"https://logos.yubhub.co/openai.com.png"},"x-apply-url":"https://jobs.ashbyhq.com/openai/49d67b25-476e-440b-b20e-51aa85a995fa","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"Full time","x-salary-range":"$216K – $225K","x-skills-required":["PCB design","KiCad","EDA tools","component libraries","schematic symbols","footprints","3D models"],"x-skills-preferred":[],"datePosted":"2026-04-24T12:20:47.825Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"PCB design, KiCad, EDA tools, component libraries, schematic symbols, footprints, 3D models","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":216000,"maxValue":225000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_7330a4d3-ca6"},"title":"Senior Technical Product Engineer","description":"<p>Engineer the Future with Us</p>\n<p>We currently have 614 open roles</p>\n<p>Innovation Starts Here</p>\n<p>Find Jobs For</p>\n<p>Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Senior Technical Product Engineer</strong></p>\n<p>Sunnyvale, California, United States</p>\n<p>Save</p>\n<p>Category: Product ManagementHire Type: Employee</p>\n<p><strong>Job ID</strong> 15163<strong>Base Salary Range</strong> $192000-$288000<strong>Date posted</strong> 02/10/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are an experienced and highly motivated engineer with a passion for semiconductor innovation and digital design solutions. You thrive in environments that challenge you to bridge customer needs with cutting-edge technology, and you excel at translating complex technical concepts into actionable product strategies. With a deep understanding of EDA tools,especially in areas like synthesis, RTL architecture, place and route and  ECO methodologies,you are eager to drive the development of next-generation solutions. You bring a strong analytical mindset, a collaborative spirit, and a customer-centric approach to every project. Your ability to engage directly with customers, understand their critical challenges, and translate those insights into high-value product features sets you apart. You are a thought leader, comfortable presenting at industry forums and representing Synopsys as a subject matter expert. You are adept at managing cross-functional teams, prioritizing product roadmaps, and ensuring releases meet the highest standards of quality and impact. Your enthusiasm for technology is matched by your commitment to inclusivity, mentorship, and continuous learning. If you are ready to lead transformative projects and be at the forefront of semiconductor innovation, Synopsys is the place for you.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Engaging directly with customers to identify high-value problems, particularly around optimizing power, performance, and area (PPA), and achieving multi-physics closure in design.</li>\n</ul>\n<ul>\n<li>Analyzing and interpreting market trends to inform the Synopsys SCA roadmap, with a focus on advanced nodes and GenAI/Agentic flows.</li>\n</ul>\n<ul>\n<li>Collaborating with DRIs and field partners to pinpoint product gaps and evaluate new opportunities for tool enhancement and innovation.</li>\n</ul>\n<ul>\n<li>Defining and prioritizing product roadmaps by crafting Market Requirements Documents (MRDs) and partnering with Product Engineers to develop Product Requirements Documents (PRDs).</li>\n</ul>\n<ul>\n<li>Writing code prototypes for new features and products, serving as “executable specifications” to demonstrate functionality and requirements to development teams.</li>\n</ul>\n<ul>\n<li>Managing release readiness, including defining criteria for Alpha, Beta, Limited Customer Availability (LCA), and General Availability (GA) stages.</li>\n</ul>\n<ul>\n<li>Enabling partners and field teams with training, strategic campaigns, and benchmarks to ensure new products deliver on promised value.</li>\n</ul>\n<ul>\n<li>Representing Synopsys as a subject matter expert at customer forums, including TRMs and MRMs, and driving thought leadership at industry conferences.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerate the adoption of Synopsys solutions, driving improved PPA outcomes for customers.</li>\n</ul>\n<ul>\n<li>Shape the direction of Synopsys’s product offerings by identifying and acting on emerging industry trends.</li>\n</ul>\n<ul>\n<li>Build stronger customer relationships through direct engagement, enabling tailored solutions that address their most critical challenges.</li>\n</ul>\n<ul>\n<li>Enhance Synopsys’s reputation as a technology leader by presenting at industry events and fostering thought leadership.</li>\n</ul>\n<ul>\n<li>Streamline product development processes through executable specifications, ensuring clarity and alignment across teams.</li>\n</ul>\n<ul>\n<li>Increase the commercial success of new products by ensuring release readiness and effective go-to-market strategies.</li>\n</ul>\n<ul>\n<li>Elevate partner and sales enablement, empowering teams to communicate product value and drive adoption.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Deep technical expertise in EDA tools, especially in synthesis, RTL architecture, place and route and ECO methodologies.</li>\n</ul>\n<ul>\n<li>Proven experience in product management, including roadmap prioritization, MRD/PRD development, and release readiness are a nice to have</li>\n</ul>\n<ul>\n<li>Strong coding skills for prototyping features and creating executable specifications.</li>\n</ul>\n<ul>\n<li>Ability to analyze market trends, customer feedback, and competitive landscapes to inform product strategy.</li>\n</ul>\n<ul>\n<li>Experience collaborating with cross-functional teams (engineering, sales, marketing, partners) in a fast-paced environment.</li>\n</ul>\n<ul>\n<li>Familiarity presenting at industry forums, conferences, and customer meetings as a subject matter expert.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Customer-centric, with a passion for solving complex technical challenges.</li>\n</ul>\n<ul>\n<li>Analytical and strategic thinker, able to synthesize information and drive actionable decisions.</li>\n</ul>\n<ul>\n<li>Collaborative leader, skilled at working across teams and building consensus.</li>\n</ul>\n<ul>\n<li>Effective communicator, comfortable presenting to diverse audiences and stakeholders.</li>\n</ul>\n<ul>\n<li>Adaptable, curious, and committed to continuous learning and improvement.</li>\n</ul>\n<ul>\n<li>Inclusive and supportive, fostering a culture of mentorship and teamwork.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a passionate and innovative product management team at Synopsys, focused on delivering state-of-the-art solutions for semiconductor design, verification, and optimization. Our team works closely with engineering, sales, and marketing to ensure that our tools meet the evolving needs of our customers. Together, we drive product excellence, industry leadership, and customer success.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p><strong>#LI-SV1</strong></p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7330a4d3-ca6","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/senior-technical-product-engineer/44408/91639673840","x-work-arrangement":null,"x-experience-level":"senior","x-job-type":"employee","x-salary-range":"$192000-$288000","x-skills-required":["eda tools","synthesis","rtl architecture","place and route","eco methodologies","product management","roadmap prioritization","mrds","prds","release readiness","executable specifications","customer engagement","market trends analysis","competitive landscape analysis","cross-functional team collaboration","presenting at industry forums"],"x-skills-preferred":[],"datePosted":"2026-04-24T11:24:40.955Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Sunnyvale"}},"occupationalCategory":"product management","industry":"technology","skills":"eda tools, synthesis, rtl architecture, place and route, eco methodologies, product management, roadmap prioritization, mrds, prds, release readiness, executable specifications, customer engagement, market trends analysis, competitive landscape analysis, cross-functional team collaboration, presenting at industry forums","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":192000,"maxValue":288000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8920f03e-94b"},"title":"Application Engineering, Staff Engineer - ICV Runset Development","description":"<p>We are seeking an experienced Application Engineer to join our team in Bengaluru. As a Staff Engineer, you will be responsible for developing and validating DRC, LVS, and Fill runsets for the Synopsys IC Validator tool. You will collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.</p>\n<p>Your responsibilities will include:</p>\n<ul>\n<li>Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.</li>\n<li>Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.</li>\n<li>Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.</li>\n<li>Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges.</li>\n<li>Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions.</li>\n<li>Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team.</li>\n<li>Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys&#39; technical edge.</li>\n</ul>\n<p>You will accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. 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If you are excited about contributing to leading-edge silicon design and want to make a tangible impact, Synopsys is the place for you.</p>\n<p>What You’ll Be Doing:</p>\n<ul>\n<li>Independently own and drive full RTL2GDSII physical design implementation for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.</li>\n<li>Execute synthesis, place &amp; route, clock tree synthesis (CTS), timing optimisation, and static timing analysis (STA) to meet stringent performance and power targets.</li>\n<li>Perform block-level and full-chip floor-planning, physical verification, EMIR analysis, and timing closure activities.</li>\n<li>Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.</li>\n<li>Utilise and optimise Synopsys EDA tools, including Design Compiler, IC Compiler II, and PrimeTime, to deliver state-of-the-art silicon solutions.</li>\n<li>Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.</li>\n<li>Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.</li>\n<li>Enable Synopsys customers to achieve first-pass silicon success through robust and innovative physical design implementations.</li>\n<li>Drive technical excellence and best practices within the team, influencing the future direction of physical design methodologies at Synopsys.</li>\n<li>Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.</li>\n<li>Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.</li>\n<li>Support strategic customer engagements and help expand Synopsys&#39; presence in the semiconductor ecosystem through successful project outcomes.</li>\n</ul>\n<p>What You’ll Need:</p>\n<ul>\n<li>Bachelor’s or Master’s degree (BE/BTech/MTech or equivalent) in Electronics, Electrical Engineering, or a related field.</li>\n<li>5+ years of relevant experience in physical design, particularly in advanced technology nodes (7nm/5nm/3nm).</li>\n<li>Comprehensive hands-on experience with RTL2GDSII flows, including synthesis, place &amp; route, CTS, timing optimisation, STA, EMIR, and physical verification.</li>\n<li>Proficiency with Synopsys EDA tools such as Design Compiler, IC Compiler II, and PrimeTime.</li>\n<li>Strong scripting and automation skills using Python, PERL, TCL, or similar languages.</li>\n<li>Solid understanding of timing constraints, timing closure, and floor-planning techniques for both block-level and full-chip designs.</li>\n<li>Exposure to high-frequency design and low-power design methodologies.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Proactive, self-motivated, and driven to achieve technical excellence.</li>\n<li>Exceptional problem-solving and analytical skills with a keen attention to detail.</li>\n<li>Excellent communication and interpersonal abilities, comfortable working in diverse and global teams.</li>\n<li>Collaborative team player who values knowledge sharing and mentoring others.</li>\n<li>Adaptable and open to learning new technologies and methodologies in a rapidly evolving field.</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You’ll join a world-class team of physical design engineers at Synopsys, dedicated to delivering innovative system design solutions for our global customers. Our team thrives on collaboration, technical excellence, and a shared passion for pushing the boundaries of semiconductor design. Working closely with experts across multiple domains, you will play a key role in empowering customers to achieve their silicon goals while contributing to Synopsys’ leadership in the industry.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>Benefits:</p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honoured to work alongside such talented and passionate individuals who choose to make a difference here every day. We’re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24-month look-back.</p>\n<ul>\n<li>Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>** Benefits vary by country and region - check with your recruiter to confirm</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7c858523-91f","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/soc-engineering-staff-engineer/44408/92684730800","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL2GDSII flows","synthesis","place & route","clock tree synthesis (CTS)","timing optimisation","static timing analysis (STA)","physical verification","block-level and full-chip floor-planning","EMIR analysis","timing closure","Python","PERL","TCL","Synopsys EDA tools","Design Compiler","IC Compiler II","PrimeTime"],"x-skills-preferred":["high-frequency design","low-power design methodologies","collaboration","problem-solving","analytical skills","communication","interpersonal abilities"],"datePosted":"2026-04-05T13:22:21.047Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL2GDSII flows, synthesis, place & route, clock tree synthesis (CTS), timing optimisation, static timing analysis (STA), physical verification, block-level and full-chip floor-planning, EMIR analysis, timing closure, Python, PERL, TCL, Synopsys EDA tools, Design Compiler, IC Compiler II, PrimeTime, high-frequency design, low-power design methodologies, collaboration, problem-solving, analytical skills, communication, interpersonal abilities"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5566d11e-802"},"title":"RTL Design & Verification - Senior Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.</p>\n<p>You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.</p>\n<p>You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.</p>\n<p>You will participate in code reviews and technical discussions to drive innovation and continuous improvement.</p>\n<p>You will accelerate the development of industry-leading SLM IPs that power the world&#39;s top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.</p>\n<p>You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys&#39; leadership in the market.</p>\n<p>You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.</p>\n<p>To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.</p>\n<p>You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.</p>\n<p>You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.</p>\n<p>Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5566d11e-802","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/yerevan/rtl-design-and-verification-senior-staff-engineer/44408/93169653024","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["EDA tools","Verilog","System Verilog","TCL scripting","Formal Verification methodologies","Unix/Linux environments","debugging and problem-solving skills"],"x-skills-preferred":["digital, analog, and mixed-signal IP/circuit design","3D-IC standards and semiconductor verification best practices"],"datePosted":"2026-04-05T13:22:07.814Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Yerevan"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies, Unix/Linux environments, debugging and problem-solving skills, digital, analog, and mixed-signal IP/circuit design, 3D-IC standards and semiconductor verification best practices"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_223485dd-7d5"},"title":"Applications Engineering, Sr Engineer","description":"<p>Engineer the Future with Us</p>\n<p>We currently have 614 open roles</p>\n<p><strong>Innovation Starts Here</strong></p>\n<p>Find Jobs For</p>\n<p>Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Applications Engineering, Sr Engineer</strong></p>\n<p>Hsinchu, Taiwan</p>\n<p>Save</p>\n<p>Category: EngineeringHire Type: Employee</p>\n<p><strong>Job ID</strong> 15949<strong>Date posted</strong> 03/08/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a proactive, customer-oriented engineer passionate about advancing semiconductor technologies. You thrive in fast-paced environments and are eager to solve complex technical challenges, collaborating with leading foundries and design teams. You possess a strong foundation in ASIC design flow, VLSI, and CAD engineering, and are comfortable navigating the intricacies of EDA tools and physical design. Your communication skills enable you to build trust with customers, translating their needs into actionable solutions and ensuring seamless product implementation. You are resourceful, adaptable, and able to exercise sound judgment while tackling technical issues. Your creative approach to problem-solving and drive for excellence enable you to contribute meaningfully to both individual projects and broader team initiatives. You value diversity and inclusivity, and you are committed to continuous learning, staying current with industry trends and emerging technologies. By joining Synopsys, you seek to make a tangible impact on the future of high-performance silicon, and you are motivated by opportunities to grow, innovate, and collaborate in a global, supportive environment.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Managing and providing ICV runset support for key foundry customers, ensuring optimal product performance and customer satisfaction.</li>\n</ul>\n<ul>\n<li>Delivering post-sales technical expertise during the runset programming, implementation, and maintenance of Synopsys products.</li>\n</ul>\n<ul>\n<li>Implementing detailed customer installation requirements and customizing solutions to fit unique client environments.</li>\n</ul>\n<ul>\n<li>Ensuring client needs are met and that Synopsys solutions function according to technical specifications and industry standards.</li>\n</ul>\n<ul>\n<li>Collaborating with sales teams to provide pre-sales technical support, contributing to successful business development and customer onboarding.</li>\n</ul>\n<ul>\n<li>Troubleshooting and resolving moderately complex technical issues</li>\n</ul>\n<ul>\n<li>Empowering customers to efficiently deploy and maximize the value of Synopsys EDA solutions in their design workflows.</li>\n</ul>\n<ul>\n<li>Enhancing customer satisfaction and strengthening long-term partnerships with key foundry clients.</li>\n</ul>\n<ul>\n<li>Driving successful product adoptions and implementations, contributing directly to Synopsys’ market leadership.</li>\n</ul>\n<ul>\n<li>Supporting the technical excellence of customer projects, enabling innovative chip design and verification outcomes.</li>\n</ul>\n<ul>\n<li>Facilitating knowledge transfer, helping customers understand and leverage advanced product features.</li>\n</ul>\n<ul>\n<li>Identifying opportunities for product improvements and feeding insights back to development teams for continuous innovation.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Basic understanding of the design process, with a preference for Design Rule Checking (DRC).</li>\n</ul>\n<ul>\n<li>Solid grasp of ASIC design flow, VLSI concepts, and/or CAD engineering principles.</li>\n</ul>\n<ul>\n<li>Familiarity with competitive EDA tool products and expertise in areas such as Verification, Place and Route, Design Reuse, and/or Physical Design.</li>\n</ul>\n<ul>\n<li>Ability to manage projects from initiation through completion, delivering high-quality technical solutions.</li>\n</ul>\n<ul>\n<li>Creative problem-solving skills and the ability to exercise judgment in selecting methods and techniques to obtain solutions.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Collaborative and effective communicator, able to build strong relationships with customers and internal teams.</li>\n</ul>\n<ul>\n<li>Resourceful and adaptable, thriving in dynamic, fast-paced environments.</li>\n</ul>\n<ul>\n<li>Detail-oriented with strong analytical skills and a commitment to delivering exceptional results.</li>\n</ul>\n<ul>\n<li>Open-minded and inclusive, embracing diverse perspectives and fostering an environment of belonging.</li>\n</ul>\n<ul>\n<li>Self-motivated and eager to learn, continuously seeking opportunities for growth and innovation.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join the Customer Application Services team, a group of passionate engineers dedicated to delivering technical excellence and customer success. The team works closely with foundries, design teams, and sales professionals, providing deep expertise and support throughout the product lifecycle. You’ll collaborate in a culture of innovation, knowledge sharing, and mutual respect, where every member’s contribution is valued and celebrated.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_223485dd-7d5","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hsinchu/applications-engineering-sr-engineer/44408/92631659424","x-work-arrangement":null,"x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["ASIC design flow","VLSI","CAD engineering","EDA tools","Physical design","Verification","Place and Route","Design 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>As a global leader in semiconductor design and verification solutions, we enable the world&#39;s most advanced technology companies to deliver cutting-edge SoCs and systems. Our mission is to accelerate innovation through state-of-the-art verification IP, methodologies, and strategic consulting.</p>\n<p>You are a passionate and analytical engineer with a proven track record in digital design and verification, ready to embrace the challenge of developing advanced embedded memory test and SLM architectures. You thrive in dynamic, collaborative environments where your technical expertise and innovative mindset can drive significant impact.</p>\n<p>You are detail-oriented, always seeking to ensure design integrity and optimal performance through rigorous validation, debugging, and synthesis. Your hands-on approach extends to scripting and automation, enhancing productivity and accelerating development cycles. You communicate effectively with cross-functional teams, translating complex technical concepts for diverse stakeholders, and you enjoy mentoring and guiding others to achieve shared goals.</p>\n<p>Developing and modeling RTL logic in Verilog for embedded memory test and SLM IP blocks.\nPerforming digital design validation and functional verification at both block and SoC levels.\nExecuting logic synthesis, static timing analysis, and generating fault coverage reports to ensure robust designs.\nApplying DFT (Design-for-Test) expertise for comprehensive memory and logic testing.\nIdentifying and troubleshooting design timing and DFT functional issues to optimize chip performance.\nUtilizing and scripting in languages such as Tcl to automate design and verification workflows.\nDeveloping and maintaining technical collateral including test suites, protocol documentation, and debug guides.</p>\n<p>Accelerate the delivery of reliable, high-performance SoCs for industry-leading technology companies.\nShape the evolution of embedded memory test and SLM architectures that power next-generation devices.\nDrive innovation in simulation, emulation, and verification methodologies for advanced semiconductor products.\nEnhance customer satisfaction by delivering robust, easy-to-use IP and responsive technical support.\nContribute to the continuous improvement of Synopsys&#39; design and verification solutions, setting new industry benchmarks.\nMentor and elevate team capabilities, fostering a culture of excellence, knowledge sharing, and mutual growth.\nInfluence the adoption of best practices in DFT, protocol compliance, and subsystem integration across the organization.\nSupport strategic decision-making by providing technical insights and market-driven recommendations.</p>\n<p>2-4 years of relevant experience in ASIC digital design and verification.\nProficiency in RTL simulation, logic synthesis, and timing verification tools.\nStrong understanding of DFT architectures.\nFamiliarity with debug tools such as Verdi and workflows for performance analysis.\nProgramming skills in SystemVerilog, UVM, Verilog, C/C++, Python, and scripting languages like Tcl.\nExperience with EDA tools such as VCS, Verdi, and DC, and methodologies including VC Auto-Testbench and protocol compliance checking.</p>\n<p>Analytical thinker with exceptional problem-solving skills.\nEffective communicator, able to collaborate across disciplines and with external partners.\nProactive, self-motivated, and adaptable in fast-paced environments.\nCommitted to quality, detail, and continuous learning.\nTeam player who values diversity, inclusion, and mentorship.\nCustomer-focused, dedicated to delivering timely and effective solutions.</p>\n<p>You&#39;ll join a highly collaborative and innovative team of digital design and verification experts, working at the forefront of embedded memory test and SLM architecture development. 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Our team values innovation, collaboration, and technical excellence, working closely with circuit designers, verification engineers, and global partners to deliver industry-leading silicon IP. We foster a supportive environment where knowledge sharing and continuous learning are encouraged, and where your contributions will directly impact the success of our products and customers.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_6eb810f3-99d","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ottawa/layout-design-staff-engineer-16003/44408/92625958368","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["CMOS circuit layout","high-speed SerDes physical interfaces","deep submicron CMOS technologies","layout effects","signal integrity","ESD","latch-up mitigation","UNIX operating systems","scripting languages","Synopsys EDA tools"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:26.656Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ottawa"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS circuit layout, high-speed SerDes physical interfaces, deep submicron CMOS technologies, layout effects, signal integrity, ESD, latch-up mitigation, UNIX operating systems, scripting languages, Synopsys EDA tools"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_52170496-422"},"title":"Applications Engineer - ICV Runset Development","description":"<p>We are seeking an experienced Applications Engineer to join our team in Hyderabad. As an Applications Engineer, you will be responsible for developing and validating DRC, LVS, and Fill runsets for the Synopsys IC Validator tool. You will collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. Your responsibilities will also include automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python. You will troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Additionally, you will interface directly with customers and Field Application Engineers (FAEs) to gather requirements, provide technical support, and ensure successful deployment of PV solutions. You will also mentor junior team members, share best practices, and contribute to a knowledge-sharing culture within the team.</p>\n<p>You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You will work closely with foundry partners, internal R&amp;D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_52170496-422","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/applications-engineer-icv-runset-development/44408/92715864304","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Physical Verification (PV)","EDA tools such as IC Validator, Calibre, Pegasus, and PVS","Scripting languages such as Perl, Tcl, and Python","CMOS layout, ASIC design flows, and foundry process requirements","DRC, LVS, ERC, and DFM rule decks"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:20.854Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Physical Verification (PV), EDA tools such as IC Validator, Calibre, Pegasus, and PVS, Scripting languages such as Perl, Tcl, and Python, CMOS layout, ASIC design flows, and foundry process requirements, DRC, LVS, ERC, and DFM rule decks"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_cc76d9ba-dc2"},"title":"Staff Layout Design Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p><strong>You Are:</strong></p>\n<p>You are a passionate and detail-oriented engineer who thrives in the fast-paced world of advanced semiconductor layout. You possess a deep understanding of analog and mixed-signal CMOS design principles, with a particular focus on high-speed SerDes interfaces. Your expertise is backed by a solid academic foundation and practical experience, enabling you to tackle complex layout challenges with confidence.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Drive layout development for high-speed SerDes physical interfaces and complex analog/mixed-signal CMOS blocks.</li>\n</ul>\n<ul>\n<li>Lead the complete layout design process, including floorplanning, verification, and quality assurance, with a strong emphasis on reliability and manufacturability.</li>\n</ul>\n<ul>\n<li>Port designs across multiple foundry nodes, ensuring optimal performance and compliance with technology-specific requirements.</li>\n</ul>\n<ul>\n<li>Implement advanced techniques for signal integrity, ESD, and latch-up mitigation, such as differential routing, shielding, and biasing.</li>\n</ul>\n<ul>\n<li>Collaborate closely with design, verification, and manufacturing teams to deliver robust and scalable layout solutions.</li>\n</ul>\n<ul>\n<li>Utilize Synopsys EDA tools and scripting languages (TCL, Python) to automate layout tasks and optimize workflow efficiency.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Enable Synopsys customers to achieve higher performance and reliability in their silicon designs.</li>\n</ul>\n<ul>\n<li>Accelerate the time-to-market for cutting-edge semiconductor products by delivering high-quality, manufacturable layouts.</li>\n</ul>\n<ul>\n<li>Enhance the robustness and scalability of Synopsys IP through meticulous attention to detail and innovative design solutions.</li>\n</ul>\n<ul>\n<li>Drive advancements in deep submicron CMOS technology adoption and integration.</li>\n</ul>\n<ul>\n<li>Foster a collaborative environment that supports knowledge sharing, mentorship, and professional growth.</li>\n</ul>\n<ul>\n<li>Support Synopsys’ leadership in chip design and verification by contributing to the development of industry-leading IP blocks.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>MSc in Electrical/Computer Engineering (or equivalent).</li>\n</ul>\n<ul>\n<li>Minimum 3 years hands-on experience in analog and mixed-signal CMOS layout, including high-speed SerDes interfaces.</li>\n</ul>\n<ul>\n<li>Deep knowledge of deep submicron CMOS technologies and design for reliability (EM/IR, matching, proximity effects).</li>\n</ul>\n<ul>\n<li>Proficiency in layout floorplanning, porting designs across foundry nodes, and implementing signal integrity and ESD mitigation strategies.</li>\n</ul>\n<ul>\n<li>Experience with custom digital and high-speed digital layout, as well as Synopsys EDA tools.</li>\n</ul>\n<ul>\n<li>Strong skills in UNIX environments, including shell scripting and command-line operations.</li>\n</ul>\n<ul>\n<li>Familiarity with scripting languages such as TCL and Python.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Excellent problem-solving, organizational, and communication skills.</li>\n</ul>\n<ul>\n<li>Self-motivated and proactive, with the ability to work independently and as part of a team.</li>\n</ul>\n<ul>\n<li>Effective collaborator who values diverse perspectives and fosters inclusive teamwork.</li>\n</ul>\n<ul>\n<li>Adaptable and open to new challenges, with a commitment to continuous improvement.</li>\n</ul>\n<ul>\n<li>Detail-oriented with a strong sense of ownership and pride in delivering high-quality work.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join a dynamic, highly skilled team dedicated to developing world-class analog and mixed-signal IP for Synopsys’ global customer base. The team is focused on pushing the boundaries of high-speed interface design, reliability, and manufacturability, working together to solve complex challenges and deliver industry-leading solutions.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_cc76d9ba-dc2","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/moreira/staff-layout-design-engineer/44408/93269033040","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["MSc in Electrical/Computer Engineering","Analog and mixed-signal CMOS layout","High-speed SerDes interfaces","Deep submicron CMOS technologies","Design for reliability","Layout floorplanning","Porting designs across foundry nodes","Signal integrity and ESD mitigation strategies","Custom digital and high-speed digital layout","Synopsys EDA tools","UNIX environments","Shell scripting and command-line operations","Scripting languages such as TCL and Python"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:06.360Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Moreira"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"MSc in Electrical/Computer Engineering, Analog and mixed-signal CMOS layout, High-speed SerDes interfaces, Deep submicron CMOS technologies, Design for reliability, Layout floorplanning, Porting designs across foundry nodes, Signal integrity and ESD mitigation strategies, Custom digital and high-speed digital layout, Synopsys EDA tools, UNIX environments, Shell scripting and command-line operations, Scripting languages such as TCL and Python"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_8409e0bb-24a"},"title":"RTL Design & Verification Staff Engineer","description":"<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>We are looking for a passionate, detail-oriented engineer with an insatiable curiosity for technology and its impact on the world. You will thrive in collaborative environments, bringing together diverse perspectives to solve complex challenges. With a strong foundation in RTL design and verification, you will approach every project with a sense of ownership and a commitment to excellence.</p>\n<p>As an effective communicator, you will clearly articulate technical concepts to both internal teams and external customers, fostering strong partnerships and driving innovation. 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You will document design specifications, verification plans, and results to ensure transparency and repeatability.</p>\n<p>You will participate in code reviews and technical discussions to drive innovation and continuous improvement.</p>\n<p>The impact you will have includes accelerating the development of industry-leading SLM IPs that power the world&#39;s top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions. You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy.</p>\n<p>You will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will have 5+ years of hands-on experience in RTL design and verification. You will be proficient in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.</p>\n<p>You will be an analytical and critical thinker with a detail-oriented approach. You will be an effective communicator, comfortable collaborating across teams and with customers. You will be self-motivated and proactive in seeking solutions and driving projects forward.</p>\n<p>You will join a talented and diverse engineering team focused on developing and verifying cutting-edge Silicon Lifecycle Management IPs for next-generation chip solutions.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_8409e0bb-24a","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/yerevan/rtl-design-and-verification-staff-engineer/44408/93169652816","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL design and verification","EDA tools","Verilog","System Verilog","TCL scripting","Formal Verification methodologies"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:20:54.841Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Yerevan"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL design and verification, EDA tools, Verilog, System Verilog, TCL scripting, Formal Verification methodologies"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_a4490a5f-125"},"title":"Sr Staff Application Engineer - VCS Simulation","description":"<p><strong>Job Summary</strong></p>\n<p>As a Sr Staff Application Engineer - VCS Simulation, you will be responsible for leading customer deployments of VCS simulation technology, working closely with field teams and R&amp;D to ensure successful adoption and integration.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Lead customer deployments of VCS simulation technology, working closely with field teams and R&amp;D to ensure successful adoption and integration.</li>\n<li>Diagnose and troubleshoot complex technical issues in verification flows, utilizing deep product knowledge and analytical skills.</li>\n<li>Collaborate with global domain experts to gather requirements and contribute to the development of a robust product roadmap.</li>\n<li>Drive competitive engagements by demonstrating Synopsys VCS advantages and supporting customers in benchmarking scenarios.</li>\n<li>Provide technical expertise in HDL/HVL methodologies, including UVM, SVA, and simulation debugging.</li>\n<li>Interface directly with customers, product validation, and R&amp;D teams to propose solutions and suggest improvements in implementation and validation processes.</li>\n<li>Develop and optimize scripts (Perl, TCL, Shell, Make) to enhance productivity and workflow automation.</li>\n</ul>\n<p><strong>The Impact You Will Have</strong></p>\n<ul>\n<li>Enable customers to accelerate their verification cycles and achieve first-pass silicon success through expert support and deployment of VCS simulation technology.</li>\n<li>Drive innovation in verification methodologies by integrating advanced features and AI-driven productivity tools.</li>\n<li>Enhance Synopsys&#39; product offerings by providing actionable feedback from customer engagements and competitive benchmarking.</li>\n<li>Facilitate seamless collaboration across global teams, ensuring consistent delivery of high-quality solutions.</li>\n<li>Support the continuous improvement of VCS and related technologies through proactive problem-solving and technical leadership.</li>\n<li>Contribute to the growth of Synopsys&#39; leadership in EDA by empowering customers to leverage the full capabilities of verification platforms.</li>\n</ul>\n<p><strong>What You’ll Need</strong></p>\n<ul>\n<li>Bachelor’s degree in Electronics with 7+ years or Master’s degree in Electronics with 5+ years of experience.</li>\n<li>Proficiency in verification technologies, including simulation, UVM, SVA, and LRM.</li>\n<li>Strong expertise in HDL languages (Verilog, VHDL, SystemVerilog) and digital design fundamentals.</li>\n<li>Proven experience in debugging simulation mismatches and verification flows.</li>\n<li>Advanced scripting skills (Perl, TCL, Make, Shell) and working knowledge of UNIX environments.</li>\n<li>Exposure to Synopsys EDA tools such as SpyGlass, VC SpyGlass, Verdi is a plus.</li>\n</ul>\n<p><strong>Who You Are</strong></p>\n<ul>\n<li>Excellent written and oral communication skills, comfortable interfacing with global teams and customers.</li>\n<li>Collaborative team player with a proactive and innovative mindset.</li>\n<li>Detail-oriented and organized, able to manage multiple tasks and priorities.</li>\n<li>Motivated self-starter with strong problem-solving abilities.</li>\n<li>Adaptable and open to travel, eager to learn and grow in a fast-paced environment.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of</strong></p>\n<p>You will join a dynamic and diverse team of applications engineers dedicated to solving the most challenging problems in the verification domain. Our team works at the intersection of technology development, customer engagement, and product innovation, collaborating with experts across field, R&amp;D, and product validation globally. We foster a culture of continuous learning, open communication, and mutual support, ensuring every member can make a meaningful impact and grow professionally.</p>\n<p><strong>Rewards and Benefits</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>You are a driven and curious engineering professional, passionate about tackling complex technical challenges and eager to make a real difference in the semiconductor industry. You thrive in collaborative, diverse environments and are energized by working alongside global experts to solve high-value problems. You are committed to continuous learning and growth, staying ahead of the curve in verification methodologies, HDL/HVL technologies, and dynamic simulation.</p>\n<p>Collaborate with customers to understand their verification challenges and provide tailored technical solutions using Synopsys Verification Platform. Support customer projects throughout their tapeout schedules, ensuring timely resolution of technical issues and successful project outcomes. Deliver technical presentations, workshops, and training sessions on Synopsys EDA tools, methodologies, and best practices.</p>\n<p>Enable customers to optimize and verify chips for power, cost, and performance—accelerating their time-to-market. Build strong, collaborative relationships with customers, fostering trust and loyalty through expert support and innovation. Drive adoption of Synopsys Verification Platform, contributing to company growth and industry leadership.</p>\n<p>Master’s degree in Electronics, or Bachelor’s degree in Electronics with 1-2 years of relevant experience. Solid understanding of digital design, HDLs (Verilog, VHDL), and System Verilog. Experience with dynamic simulation verification, including methodologies, debug, low power, and coverage. Familiarity with Synopsys EDA tools (VCS, Verdi) is a plus. Proficiency in UNIX environments and scripting languages such as Tcl, with the ability to automate and optimize workflows.</p>\n<p>Collaborative team player who values diversity and inclusion. Detail-oriented, organized, and able to manage multiple priorities effectively. Innovative thinker with a proactive, results-driven mindset. Motivated, self-organized, and open to travel as required. Strong interpersonal and social communication skills, fostering positive relationships with colleagues and clients. Adaptable and eager to learn, embracing new technologies and methodologies.</p>\n<p>You’ll be part of the Customer Success Group, a collaborative and diverse team dedicated to building strong partnerships with market leaders and innovators. The team’s core mission is to enable customers to solve high-value problems through advanced verification solutions and continuous technical support. Working closely with domain experts across global locations, you’ll develop deep expertise in Synopsys Verification Platform and play a key role in helping customers achieve their design goals efficiently and effectively.</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_3b0726c6-2a1","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/application-engineering-sr-engineer/44408/92040418272","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["digital design","HDLs (Verilog, VHDL)","System Verilog","dynamic simulation verification","Synopsys EDA tools (VCS, Verdi)","UNIX environments","scripting languages (Tcl)"],"x-skills-preferred":["verification methodologies","HDL/HVL technologies","dynamic simulation"],"datePosted":"2026-03-09T11:04:40.752Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru, Karnataka, India"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"digital design, HDLs (Verilog, VHDL), System Verilog, dynamic simulation verification, Synopsys EDA tools (VCS, Verdi), UNIX environments, scripting languages (Tcl), verification methodologies, HDL/HVL technologies, dynamic simulation"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_ca788431-240"},"title":"Principal AI/GenAI Engineer","description":"<p><strong>Principal AI/GenAI Engineer</strong></p>\n<p>We are seeking an experienced AI/GenAI engineer to join our team at Synopsys. As a Principal AI/GenAI Engineer, you will design, develop, and deploy GenAI Agentic and machine learning models, algorithms, and systems to tackle complex business challenges.</p>\n<p><strong>What You&#39;ll Be Doing:</strong></p>\n<ul>\n<li>Design, develop, and deploy GenAI Agentic and machine learning models, algorithms, and systems to tackle complex business challenges.</li>\n<li>Provide technical leadership and mentorship, supporting junior engineers and data scientists in best practices and advanced techniques.</li>\n<li>Stay abreast of the latest AI, Agentic AI, and machine learning advancements, applying them to enhance existing systems or develop innovative solutions.</li>\n<li>Collaborate with program and product managers, software engineers, and stakeholders to define requirements and create technical specifications for AI solutions.</li>\n<li>Conduct data analysis, preprocessing, and feature engineering to prepare datasets for machine learning models.</li>\n<li>Train, validate, and fine-tune machine learning models to meet performance and accuracy benchmarks.</li>\n<li>Deploy AI models into production environments, monitoring and optimizing their performance.</li>\n<li>Document models, algorithms, and methodologies to ensure reproducibility and facilitate knowledge sharing.</li>\n<li>Ensure all AI solutions comply with ethical guidelines, data privacy regulations, and industry standards.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerate innovation in AI-driven products and solutions, directly influencing Synopsys&#39; technological leadership.</li>\n<li>Enhance operational efficiency and decision-making through intelligent automation and data-driven insights.</li>\n<li>Drive adoption of Agentic AI systems, enabling transformative business outcomes across multiple domains.</li>\n<li>Mentor and elevate the technical capabilities of the engineering and data science teams, fostering a culture of excellence.</li>\n<li>Champion ethical AI practices, ensuring responsible development and deployment of cutting-edge technologies.</li>\n<li>Support cross-functional collaboration, bridging the gap between technical and business teams for successful project delivery.</li>\n<li>Contribute to the advancement of semiconductor IPs and EDA tool integration with AI, expanding Synopsys&#39; product portfolio.</li>\n</ul>\n<p><strong>What You&#39;ll Need:</strong></p>\n<ul>\n<li>Ph.D. or Master’s degree in Computer Science, Data Science, Electrical Engineering, or a related field.</li>\n<li>Minimum 8 years of experience in software engineering, machine learning, and GenAI, with a proven track record in production deployments.</li>\n<li>Strong proficiency in Python; familiarity with backend and distributed systems, message queues, and orchestration technologies is a plus.</li>\n<li>Expertise in data structures, algorithms, and design patterns for scalable AI solutions.</li>\n<li>Extensive experience with machine learning and Agentic frameworks (e.g., TensorFlow, PyTorch, LangChain/LangGraph, AutoGen) and LLM models.</li>\n<li>Strong grasp of statistical analysis, data mining, and data visualization techniques.</li>\n<li>Knowledge of cloud platforms, containerization (Kubernetes, Docker), and version control systems (Git, P4).</li>\n<li>Familiarity with Agile, Kanban, or Scrum methodologies.</li>\n<li>Understanding or experience with semiconductor IPs and EDA tools is highly desirable.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Exceptional problem-solving and analytical abilities, with a strategic mindset.</li>\n<li>Strong communication and interpersonal skills to engage diverse audiences.</li>\n<li>Ability to work independently and collaboratively within multidisciplinary teams.</li>\n<li>Demonstrated leadership and mentorship capabilities.</li>\n<li>Adaptable, proactive, and eager to continuously learn and innovate.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join a dynamic, collaborative group of professionals dedicated to advancing AI and GenAI solutions for diverse projects. The team values innovation, knowledge sharing, and continuous improvement, working closely with product managers, engineers, and stakeholders to deliver impactful AI-powered systems. You will play a key role in mentoring, technical leadership, and driving the evolution of Synopsys’ AI initiatives.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_ca788431-240","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/yerevan/principal-ai-genai-engineer/44408/91688698208","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Python","Machine learning","GenAI","TensorFlow","PyTorch","LangChain/LangGraph","AutoGen","LLM models","Data structures","Algorithms","Design patterns","Cloud platforms","Containerization","Version control systems","Agile","Kanban","Scrum"],"x-skills-preferred":["Semiconductor IPs","EDA tools","Statistical analysis","Data mining","Data visualization"],"datePosted":"2026-03-09T11:03:27.017Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Yerevan, Armenia"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Python, Machine learning, GenAI, TensorFlow, PyTorch, LangChain/LangGraph, AutoGen, LLM models, Data structures, Algorithms, Design patterns, Cloud platforms, Containerization, Version control systems, Agile, Kanban, Scrum, Semiconductor IPs, EDA tools, Statistical analysis, Data mining, Data visualization"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_eb9218fe-189"},"title":"Timing Analog Mixed Signal Design Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>What You&#39;ll Be Doing:</strong></p>\n<ul>\n<li>Develop accurate timing models for macros used in multi-die designs.</li>\n<li>Perform analysis and verification to ensure timing models meet all performance, reliability, and design requirements.</li>\n<li>Collaborate closely with IP design teams to maintain high-quality timing arcs and adhere to timing methodology standards.</li>\n<li>Assist in timing analysis and closure for high-speed interfaces and mixed-signal IP blocks.</li>\n<li>Perform STA (Static Timing Analysis) using industry-standard EDA tools.</li>\n<li>Support constraint development and validation for timing sign-off.</li>\n<li>Collaborate with design, verification, and physical implementation teams to resolve timing issues.</li>\n<li>Utilize SiliconSmart for SPICE-based characterization and NanoTime for transistor-level Static Timing Analysis (STA)</li>\n</ul>\n<p><strong>Authority:</strong></p>\n<ul>\n<li>Normally receives detailed instructions on all work.</li>\n<li>Follows standard practices and procedures in analyzing situations or data from which answers can be readily obtained.</li>\n<li>Applies company policies and procedures to resolve routine issues.</li>\n</ul>\n<p><strong>What You&#39;ll Need:</strong></p>\n<ul>\n<li>Bachelor&#39;s or Master&#39;s degree in Electronics - Electrical Engineering, or Telecommunications; Computer Science Engineering or related ones.</li>\n<li>1-2 year working experience in similar roles or fresh graduates</li>\n</ul>\n<p>(Fresh graduates are also welcomed and offered the on-the-job training to adapt the position&#39;s requirements.)</p>\n<ul>\n<li>Basic understanding of timing analysis, SPICE simulation, and STA concepts.</li>\n<li>Experience with scripting languages such as Python and TCL for automation and data processing.</li>\n<li>Familiarity with EDA tools for timing characterization and verification.</li>\n<li>Strong problem-solving abilities and keen attention to detail.</li>\n<li>Good verbal and written English communication skills.</li>\n<li>Highly responsible and self-motivated, with a strong sense of ownership over your work.</li>\n<li>Collaborative team player, open to feedback and eager to learn from others.</li>\n<li>Detail-oriented and methodical, always striving for accuracy and quality.</li>\n<li>Effective communicator, able to articulate technical concepts clearly.</li>\n<li>Adaptable and resilient in the face of new challenges or shifting priorities.</li>\n<li>Enthusiastic about contributing to a diverse, inclusive, and innovative workplace.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join the Synopsys UCIe Design Team, a dynamic group of engineers specializing in advanced chiplet interconnect and analog mixed-signal technologies. This is global team, which is working on state-of-the-art UCIe, 2.5D/3D IC, and Tbps die-to-die interfaces.</p>\n<p>As a team member, you’ll receive structured training, mentorship, and exposure to the complete design flow, helping you grow into a technical expert or future design leader. If you are passionate about precision timing analysis and eager to work in a collaborative, innovative environment, we’d love to have you on our team.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p>What is it like to be an Analog Design Engineer at Synopsys?</p>\n<p>Arman Shahmuradyan</p>\n<p>Analog Design, Manager</p>\n<p><strong>Benefits:</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We’re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p>Back to nav</p>\n<p>Get an idea of what your daily routine around the office can be like</p>\n<p>\\ Explore Ho Chi Minh City</p>\n<p>View Map</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_eb9218fe-189","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ho-chi-minh-city/timing-analog-mixed-signal-design-engineer-hcmc/44408/92554331200","x-work-arrangement":"onsite","x-experience-level":"entry","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["timing analysis","SPICE simulation","STA concepts","Python","TCL","EDA tools","timing characterization","verification"],"x-skills-preferred":["problem-solving","detail-oriented","effective communication","adaptability","resilience"],"datePosted":"2026-03-09T11:00:31.108Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ho Chi Minh City"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"timing analysis, SPICE simulation, STA concepts, Python, TCL, EDA tools, timing characterization, verification, problem-solving, detail-oriented, effective communication, adaptability, resilience"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_82b664ed-78c"},"title":"Staff Application Engineer (Backend)","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>16005</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>03/05/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<p>You are an accomplished and forward-thinking engineering professional with a deep passion for the intersection of artificial intelligence and semiconductor design. Your expertise spans RTL-to-GDSII flows, and you have hands-on experience with industry-leading EDA tools, especially those driving the next generation of AI and high-performance compute silicon. You are highly analytical, able to dissect complex design challenges and architect robust, scalable solutions that address both immediate and future technology needs. You thrive in customer-facing roles, translating requirements into actionable methodologies and championing innovation every step of the way.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Partnering with leading customers to develop and implement advanced AI-driven RTL-to-GDS methodologies using Synopsys EDA tools, IPs, and libraries.</li>\n</ul>\n<ul>\n<li>Creating and optimizing design flows and solutions to meet aggressive PPA (performance, power, area) targets for high-frequency cores, automotive, and high-capacity AI/compute designs.</li>\n</ul>\n<ul>\n<li>Enabling and deploying flows/solutions leveraging Synopsys offerings such as Fusion Compiler, RTL Architect, and AI-based Design Space Optimization engines, utilizing Tcl/Python scripting for automation.</li>\n</ul>\n<ul>\n<li>Collaborating cross-functionally with customers, R&amp;D, and internal teams to drive innovative solution and feature development that anticipates and addresses real-world design challenges.</li>\n</ul>\n<ul>\n<li>Leading and mentoring a team of junior application engineers, providing technical guidance, coaching, and project management support to ensure successful execution of deliverables.</li>\n</ul>\n<ul>\n<li>Delivering technical presentations, application notes, and best practices to both internal and external stakeholders, supporting knowledge-sharing and customer enablement.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Accelerate customer adoption of next-generation AI-driven design methodologies, empowering them to achieve breakthrough silicon results.</li>\n</ul>\n<ul>\n<li>Shape Synopsys’ technology direction by providing valuable field insights and partnering with R&amp;D on new feature development.</li>\n</ul>\n<ul>\n<li>Reduce time-to-market and improve competitiveness for customers through innovative flow optimization and automation.</li>\n</ul>\n<ul>\n<li>Drive Synopsys’ leadership in AI-powered EDA solutions, further differentiating our offerings in a competitive market.</li>\n</ul>\n<ul>\n<li>Elevate the technical capabilities of the application engineering team through mentorship and cross-training.</li>\n</ul>\n<ul>\n<li>Enhance customer satisfaction and loyalty through proactive engagement, expert troubleshooting, and tailored technical support.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field with 5 + years of relevant experience.</li>\n</ul>\n<ul>\n<li>Deep understanding of RTL-to-GDSII flows and hands-on experience with backend P&amp;R tools (Fusion Compiler, ICC2, or similar).</li>\n</ul>\n<ul>\n<li>Expertise in physical synthesis, timing closure, clock tree synthesis (CTS), and routing at advanced technology nodes.</li>\n</ul>\n<ul>\n<li>Proficiency in Tcl and Python scripting for automating EDA workflows and optimizing design methodologies.</li>\n</ul>\n<ul>\n<li>Strong technical account management skills and a proven ability to lead and mentor teams in a high-performance environment.</li>\n</ul>\n<ul>\n<li>Outstanding verbal and written communication, presentation, and customer interaction skills.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Collaborative and empathetic leader, skilled at building relationships and enabling the success of others.</li>\n</ul>\n<ul>\n<li>Analytical thinker with a problem-solving mindset and a passion for continuous improvement.</li>\n</ul>\n<ul>\n<li>Adaptable and resilient in the face of evolving customer requirements and technology landscapes.</li>\n</ul>\n<ul>\n<li>Strong organizational skills, able to manage multiple projects and priorities with poise.</li>\n</ul>\n<ul>\n<li>Driven by curiosity and a desire to innovate at the forefront of AI and semiconductor design.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You’ll join a dynamic and diverse Application Engineering team at Synopsys Bangalore, dedicated to driving customer success and innovation in AI-enabled design automation. The team partners closely with global customers, R&amp;D, and product management to deliver state-of-the-art solutions for the most advanced silicon on the planet. With a culture rooted in collaboration, technical excellence, and mentorship, you’ll have the opportunity to lead, learn, and contribute to the next wave of EDA innovation.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_82b664ed-78c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/staff-application-engineer-backend/44408/92463617216","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["RTL-to-GDSII flows","industry-leading EDA tools","physical synthesis","timing closure","clock tree synthesis (CTS)","routing at advanced technology nodes","Tcl and Python scripting","backend P&R tools","Fusion Compiler","ICC2"],"x-skills-preferred":[],"datePosted":"2026-03-08T22:22:03.259Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"RTL-to-GDSII flows, industry-leading EDA tools, physical synthesis, timing closure, clock tree synthesis (CTS), routing at advanced technology nodes, Tcl and Python scripting, backend P&R tools, Fusion Compiler, ICC2"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5eebcb09-82f"},"title":"Electrical Engineer","description":"<p>At Valve, electrical engineers deliver world class hardware products. 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