At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a hands-on technical leader with extensive experience in mixed-signal verification and ASIC development. You excel at implementing sophisticated test plans and sharing best practices with project owners to ensure seamless execution. Your expertise in high-speed protocols, verification environments, and automation scripting positions you to drive successful product delivery and technical excellence. You are passionate about leveraging your skills to mentor others, optimize workflows, and contribute to a culture of innovation and collaboration. Your approach is both solution-oriented and inclusive, ensuring every team member has the opportunity to contribute and grow.

What You’ll Be Doing:

• Implementing Unified Test Plans for HPC DSP-based SERDES PHY products, integrating verification and validation phases in a structured workflow.
• Building and maintaining robust verification environments using UVM methodology and SystemVerilog, including VIP integration.
• Developing, optimizing, and sharing automation scripts (Shell, Perl, Python, C++, AI-based approaches) to support design, verification, and testing.
• Collaborating with product stakeholders and project owners to ensure technical challenges are resolved and milestones are met.
• Creating and executing comprehensive test plans for high-speed data recovery circuits, ensuring thorough coverage and traceability.
• Sharing knowledge and best practices with team members and project owners, driving clarity and continuous improvement.

The Impact You Will Have:

• Directly influence the implementation and quality of flagship silicon IP products.
• Accelerate time-to-market for high-performance SoCs through effective testplan execution.
• Advance innovation in data recovery and signal processing, impacting global standards.
• Provide technical leadership and mentorship, supporting global customer success.
• Contribute to a knowledge-sharing, inclusive engineering culture.
• Drive opportunities for advancement and professional growth for yourself and others.

What You’ll Need:

• 10+ years of ASIC development and mixed-signal verification experience.
• Expertise in PCIe, Ethernet protocols, and digital signal processing.
• Advanced skills in SystemVerilog and UVM methodology for verification environment implementation.
• Proficiency in scripting (Shell, Perl, Python, C++); experience with AI-driven automation is a plus.
• Strong organizational and communication skills with a proven record of delivering solutions under tight deadlines.

Who You Are:

• Hands-on, solution-oriented, and technically driven.
• Effective communicator and mentor, eager to share knowledge.
• Collaborative, adaptable, and inclusive in your approach.
• Detail-focused, organized, and committed to quality.
• Dedicated to continuous learning, growth, and innovation.

The Team You’ll Be A Part Of:

You’ll join a multidisciplinary engineering team advancing silicon IP solutions for global customers. The team is comprised of industry experts focused on mentorship, technical excellence, and continuous improvement in a respectful, inclusive environment.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include:

• Architect and oversee the implementation of the Android platform audio domain, defining strategies for custom AOSP framework modifications and Ford-specific SDK platforms.

• Spearhead the design and architectural direction of Android Audio HAL (HIDL/AIDL) and Linux Kernel audio drivers (ALSA/ASoC), targeting high-performance System-on-Chip (SoC) platforms.

• Place emphasis on end-to-end audio quality improvements working with partner teams, test and automation stakeholders.

• Define the virtualization strategy for audio solutions within Hypervisor-based architectures, ensuring deterministic behavior and seamless IPC between Android and real-time operating systems (QNX/Automotive Linux).

• Provide technical mentorship and code governance to development teams, ensuring adherence to design patterns and quality standards.

• Collaborate with domain architects and key technology partners to define the long-term vision for the Ford Infotainment System audio platform.

• Lead complex root cause analysis for critical software defects and system stability issues.

• Architect solutions for optimizing boot-up performance, system responsiveness, and resource management.

The ideal candidate will have a Bachelor's Degree in Computer Engineering, Electrical Engineering, Computer Science or related, and five or more years of experience in software architecture and development on Android AOSP using C++/Java/Kotlin etc. for automotive, embedded, mobile, or consumer electronic platforms. Three or more years of specialized experience in Android Audio HAL development, Audio Policy, and Linux Kernel driver integration (ALSA/ASoC) is also required. Two or more years of experience with in-vehicle signaling mechanisms such as CAN/Ethernet etc. is preferred.

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Key responsibilities include:

• Collaborating with a multidisciplinary team of software and hardware engineers to develop software defined radios;
• Implementing high-performance, real-time signal processing chains on embedded and hardware platforms to support mission-critical sensing capabilities;
• Developing Modeling and Simulation (M&S) code for RADAR techniques and data analysis including Hardware-in-the Loop / Software-in-the-loop (HIL/SIL) testing;
• Participating in laboratory and field testing of RF systems and techniques;
• Participating in the maturation of RF systems into deployable systems and products.

Required qualifications include:

• 5+ years of experience with a BSEE or related field;
• Strong foundation in digital signal processing, comms theory, and system engineering with emphasis in direction finding algorithm implementation;
• Hands-on experience with direction finding, angle-of-arrival estimation, and multi-antenna signal processing;
• Strong experience with DSP implementation for embedded devices including FPGA, Nvidia Jetson, and Software Defined Radios and/or software defined radios;
• Strong knowledge of Python and MATLAB;
• Experience with CUDA or GPU accelerated frameworks like cuSignal is preferred;
• Familiar with deep learning algorithms;
• Familiar with wireless communication standards (Bluetooth, 3G/4G/5G, Wi-Fi, SINCGARS, MUOS, etc.).

Preferred qualifications include:

• Masters or PhD degree in Electrical, Electronics, Computer Engineering, or related fields;
• Experience with ML frameworks such as TensorFlow and PyTorch;
• Defense, national security, or aerospace domain familiarity through industry or education;
• Extensive Digital Signal Processing (DSP) knowledge and experience;
• Expertise in Synthetic Aperture Radar (SAR) and/or Inverse SAR (ISAR): Image formation, waveforms, phenomenology, modeling and simulation.

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Responsibilities:

• Oversee the design, installation, configuration, and integration of AV systems.
• Perform hands-on setup, operation, troubleshooting, and maintenance of AV equipment for live events, meetings, and presentations.
• Plan and support events ranging from 300+ person internal/external events to small team meetings.
• Act as the primary escalation point for complex technical issues, ensuring minimal downtime and quick resolution.
• Collaborate with clients, event planners, IT teams, and vendors to assess needs, plan layouts, and execute AV setups for small to large-scale events.
• Develop and maintain documentation, including maintenance schedules, troubleshooting guides, inventory tracking, and system diagrams.
• Ensure compliance with safety standards, company policies, and industry best practices during installations and operations.
• Manage project timelines, budgets (for small projects), and resource allocation while maintaining profitability and quality.
• Stay current with emerging AV technologies and recommend upgrades or improvements
• Provide exceptional customer service, including on-site support and post-event debriefs

Basic Qualifications:

• Associate's or Bachelor's degree in Audio Visual Technology, Electronics, Information Technology, or a related field preferred (or equivalent experience).
• 5+ years in audio-visual technical roles, with at least 2 years in a lead, senior, or supervisory position. Experience in corporate, educational, or event environments is a plus.
• CTS (Certified Technology Specialist) from AVIXA strongly preferred; additional certifications like Crestron, Extron, Dante, or Biamp are highly desirable.
• Proficiency with AV control systems (Crestron, AMX, Extron), video conferencing (Zoom, Microsoft Teams, Cisco Webex), digital signal processing (DSP), and networking basics.
• Strong knowledge of audio/video signal flow, cabling, rigging, lighting, and projection systems.
• Experience with live event production, including mixing boards, cameras, and streaming.
• Excellent leadership, communication, and problem-solving abilities; ability to work under pressure and manage multiple priorities. Strong customer service orientation and team collaboration.
• Physical Requirements: Ability to lift heavy equipment (up to 50 lbs), climb ladders, and work in varied environments (including evenings/weekends for events). Valid driver's license may be required

Additional Requirements:

• Must be physically fit enough to regularly lift up to 30 lbs. for duties such as delivering computers, unpacking and rack-mounting equipment, etc.
• Must be willing to work extended hours and weekends as needed.
• Must be willing to travel

Compensation and Benefits: $115,000 - $145,000 Base salary is just one part of our total rewards package at xAI, which also includes equity, comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, and various other discounts and perks.

ITAR Requirements: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

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The ideal candidate will have 7+ years of experience with a BSEE or related field, strong experience with DSP implementation for embedded devices and/or software defined radios, strong knowledge of Python and MATLAB, experience with CUDA or GPU accelerated frameworks like cuSignal, experience with embedded devices, including FPGA, Nvidia Jetson, and Software Defined Radios, skilled with Modeling and Simulation of RF systems including Radar and SAR, familiar with deep learning algorithms, experience with ML frameworks such as TensorFlow and PyTorch, familiar with wireless communication standards (Bluetooth, 3G/4G/5G, Wi-Fi, SINCGARS, MUOS, etc.), excellent at balancing multiple projects at any given time and/or managing a larger team for a larger program, enthusiastic about both working with a team and executing some work individually (depending on program scope), experience with Electronic Warfare systems, and currently possesses and is able to maintain an active U.S. Secret security clearance.

Preferred qualifications include a Master's or PhD degree in Electrical, Electronics, Computer Engineering, or related fields, defense, national security, or aerospace domain familiarity through industry or education, extensive Digital Signal Processing (DSP) knowledge and experience, expertise in Synthetic Aperture Radar (SAR) and/or Inverse SAR (ISAR): Image formation, waveforms, phenomenology, modeling and simulation.

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In this role, you will define FPGA architectures, implement high-performance digital logic, and collaborate closely with hardware, firmware, and quantum engineering teams to build scalable, low-latency control systems.

Key responsibilities include: Developing and improving a custom microprocessor responsible for waveform generation and critical logic to operate a quantum computer Working closely with hardware, firmware, and software teams to define architecture, data flow, and interfaces Implementing, simulating, and verifying designs including DSP pipelines, control logic, and high-speed I/O Optimizing designs for latency, resource utilization, and robustness in production environments Developing and maintaining testbenches, verification flows, and CI Supporting bring-up, lab validation, and debugging in collaboration with Quantum Engineering on actual quantum computers Contributing to the long-term roadmap for the architecture of Rigetti’s control systems.

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Key Responsibilities

• Design, develop, and optimize FPGA-based digital systems for real-time defense applications
• Implement RTL designs (VHDL, Verilog, SystemVerilog) for high-speed data processing
• Perform simulation, synthesis, timing analysis, and timing closure
• Develop and integrate DSP algorithms in hardware (e.g., FFTs, filters, modulation)
• Interface with high-speed ADCs/DACs, RF front ends, and embedded processors
• Support hardware bring-up, debugging, and validation in lab environments
• Collaborate with RF, systems, and software engineers to ensure system performance
• Document designs, requirements, and verification results

Required Qualifications

• Bachelor’s degree in Electrical or Computer Engineering (or related field)
• Minimum of 2 years' professional experience within the aerospace & defense industry
• Minimum 2 years' experience using FPGA toolchains (Xilinx Vivado, Intel Quartus)
• Proficiency in HDLs (VHDL, Verilog, or SystemVerilog)
• Strong understanding of digital design fundamentals (timing, clock domains, pipelining)
• Experience with simulation/verification tools (ModelSim, Questa, etc.)
• Ability to obtain and maintain a U.S. security clearance

ITAR Regulations

• To conform to U.S. Government technology export regulations, including the International Traffic in Arms Regulations (ITAR), applicant must be a US Citizen, Green Card holder, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

Bonus Points

• Experience with defense systems (radar, EW, communications)
• Knowledge of digital signal processing (DSP) implementation and fixed-point math
• Proficient in scripting languages (Tcl, bash, Python)
• Familiarity with embedded software integration on SoCs
• Experience with high-speed interfaces (JESD204, PCIe, Ethernet, DDR)
• Familiarity with SoC platforms (e.g., Xilinx Zynq, RFSoC)
• Understanding of RF signal chains and systems

Additional Information

CX2 is a next-generation defense technology company securing spectrum dominance for the United States and its allies. We build AI-enabled hardware and software platforms to detect, disrupt, and defend the electromagnetic spectrum across land, air, sea, and space. Our systems are deployed in the most contested operational environments in the world. We’re backed by leading venture investors in the defense ecosystem and led by founders with track records at Meta, SpaceX, Epirus, and the U.S. Department of Defense.

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Responsibilities:

• Design, characterize, and deliver algorithms such as channelizers, frequency agile detection, adaptive filters, MIMO, wideband detectors, and other algorithms related to signal sorting
• Write and contribute to existing Python repositories using CUDA and PyTorch
• Own requirements, ICDs, and verification from concept through delivery
• Stay current: Track and insert advances in signal processing techniques and associated technologies, adaptive beamforming, RF machine learning, and resilient PNT for GPS-denied ops.

Required Qualifications:

• Masters Degree in Electrical, Computer or Systems Engineering or related field with Graduate study emphasis in Signal Processing; OR a Bachelor’s Degree in an Engineering discipline with 3-5 years relevant working Signal Processing Experience
• Intermediate to advanced proficiency in Python
• Willingness to support critical test events that occasionally require extended hours/weekends.
• Ability to obtain and maintain a security clearance. Learn more about Security Clearances here.
• Must be a U.S. Person (see ITAR Regulations below) due to required access to U.S. export-controlled information or facilities

Bonus Points:

• PhD in Electrical Engineering, Computer Engineering, or related field
• 5+ years’ experience with EW subsystems and payloads.
• EA/ECM technique design (deception, Digital RF Memory, coherent/non-coherent techniques).
• Comms system design (LPI/LPD, Waveform-of-Interest exploitation)
• RF machine learning for emitter ID, modulation/classification, anomaly detection, PDW creation
• Tools Experience: ADS/AWR/SystemVue, MATLAB/Simulink, Python (NumPy/SciPy), GNU Radio/SDR (USRP/RFSoC), VITA-49; HDL/firmware experience also helpful (Vivado/Quartus/Libero).
• Clearance: Active Secret or ability to obtain and maintain; TS/SCI eligibility preferred. ITAR/EAR-controlled work.
• Field work: supporting periodic travel for flight tests and customer demonstrations/support
• Mindset: Builder-tester who loves first-principles RF, rapid lab iteration, and getting hardware flying fast.

What We Offer:

• Competitive salary, stock options and benefits, including health, vision and dental.
• 401K enrollment at 90 days.
• Generous PTO + most Federal Holidays observed.
• Collaborative and inclusive work environment.
• Access to the latest tools and technologies.
• High levels of responsibility and autonomy.
• Professional growth and development opportunities.
• Access to the hardest problems in electronic warfare.

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This role requires an onsite presence in our El Segundo, CA HQ; a remote work environment is not considered for this opportunity.

Key Responsibilities:

• Design, validate & deliver RF payload subsystems: Design, Integration and Testing of Antennas, RF front ends, SDRs and provide validation of operation. Support development and analysis of RF performance metrics.

• Own requirements, ICDs, and verification from concept through delivery

• Stay current: Track and insert advances in relevant technologies, SDRs, RF Systems, RF machine learning, and PNT.

Qualifications:

• BS/MS in Electrical Engineering, Computer Engineering, or related field

• Antenna and receiver design across analog/RF/mixed-signal domains: mixers, PLLs/LOs, gain/linearity/noise trades; ability to turn simulations into reality.

• Channelizers & wideband architectures: filter banks, analog/digital down conversion, sample-rate planning, clocking/synchronization.

• Willingness to support critical test events that occasionally require extended hours/weekends

• Ability to obtain and maintain a security clearance

• Must be a U.S. Person (see ITAR Regulations below) due to required access to U.S. export-controlled information or facilities

Bonus Points:

• PhD in Electrical Engineering, Computer Engineering, or related field

• 5+ years’ experience with EW subsystems and payloads

• EA/ECM technique design (deception, Digital RF Memory, coherent/non-coherent techniques)

• Digital Signal processing: Design characterize and deliver channelizers, wideband detection/classification, MIMO/digital-arrays, and algorithms in MATLAB/Python/C++

• Communication / Waveform system design

• RF machine learning for emitter ID, modulation/classification, anomaly detection, PDW creation

• Tools Experience: ADS/AWR/SystemVue, MATLAB/Simulink, Python (NumPy/SciPy), GNU Radio/SDR (USRP/RFSoC), VITA-49; HDL/firmware experience; also helpful (Vivado/Quartus/Libero).

• Clearance: Active Secret or ability to obtain and maintain; TS/SCI eligibility preferred. ITAR/EAR-controlled work. Learn more about Security Clearances here.

• Field work: supporting periodic travel for flight tests and customer demonstrations/support

• Mindset: Builder-tester who loves first-principles RF, rapid lab iteration, and getting hardware flying fast

What We Offer:

• Competitive salary, stock options and benefits, including health, vision and dental.

• 401K enrollment at 90 days.

• Generous PTO + most Federal Holidays observed.

• Collaborative and inclusive work environment.

• Access to the latest tools and technologies.

• High levels of responsibility and autonomy.

• Professional growth and development opportunities.

• Access to the hardest problems in electronic warfare.

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As a Sr Staff Engineer in ASIC Digital Design, you will be responsible for architecting and designing embedded RISC microprocessor IP at both architectural and RTL levels. You will write comprehensive high-level architecture and micro-architecture specifications for processor designs, optimize designs for performance, speed, area, and power, and develop standalone Verilog testbenches to verify modules and ensure robust functionality.

You will also debug design issues and collaborate closely with verification teams to resolve bugs and improve quality. Additionally, you will maintain existing processor product lines and derivative products, ensuring ongoing reliability and innovation.

You will work closely with multi-site, multi-time zone, and multi-cultural teams on aspects like design, implementation, physical design, and verification. You will also develop and manage project plans, working closely with program managers to align deliverables and timelines.

As a member of the Synopsys ARC Processor hardware team, you will contribute to the advancement of processor technology and work on architectural design, implementation, verification, and maintenance of processor products that drive the next wave of intelligent devices.

You will join a team of passionate engineers dedicated to advancing processor technology and collaborate with global teams to deliver innovative solutions. You will work on architectural design, implementation, verification, and maintenance of processor products that drive the next wave of intelligent devices.

You will be responsible for driving improvements in design methodology and verification processes, raising the bar for quality and speed of delivery. You will also facilitate seamless collaboration across global teams, fostering a culture of shared knowledge and success.

You will support the growth and maintenance of Synopsys' processor product portfolio, ensuring market competitiveness. You will enable customers to build smarter, faster, and more energy-efficient devices by delivering optimized processor designs.

You will contribute to the evolution of silicon chip technology that powers intelligent systems worldwide.

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As a High-Speed Interface Digital Design Manager, you will be responsible for managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement. You will drive architecture specification, digital design, and verification activities for current and next-generation products, engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met.

Key responsibilities include:

• Leading a high-performing digital and verification engineering team focused on the design and delivery of advanced SerDes IP
• Managing and mentoring engineers, fostering a culture of innovation, ownership, and continuous improvement
• Driving architecture specification, digital design, and verification activities for current and next-generation products
• Engaging with customers to manage escalations, facilitate pre- and post-sales discussions, and ensure their requirements are met

Requirements include:

• Bachelor's or Master's degree in Electrical Engineering or related field
• 10+ years of hands-on digital design and verification experience in the semiconductor industry
• 5+ years of proven leadership and people management experience, preferably in ASIC or IP development environments
• Deep knowledge of the ASIC development flow, including architecture specification, digital design, and verification methodologies
• Experience with high-speed interface protocols (e.g., PCIe, Ethernet, USB) and digital signal processing techniques
• Expertise in managing customer escalations and facilitating technical discussions during pre- and post-sales phases
• Proficiency with industry-standard EDA tools, scripting, and project management platforms

Benefits include:

• Comprehensive medical and healthcare plans
• Time away programs
• Family support
• ESPP
• Retirement plans
• Competitive salaries

If you are a strong leader with excellent team-building and mentoring skills, a customer-focused and results-oriented individual with sound decision-making abilities, a collaborative communicator able to build strong cross-functional alliances, organized, detail-oriented, and adept at managing multiple priorities efficiently, adaptable, proactive, and committed to continuous improvement, we encourage you to apply.

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As an audio programmer, you will use existing and emerging technologies to improve the realism and fidelity for drivers through spatial audio and haptic cues. You will have a passion for audio, gaming, programming, and simulation. You will also have a strong proficiency in designing and implementing real-time audio systems for racing games, including audio middleware integration, DSP fundamentals, performance optimization, and cross-platform support.

Responsibilities:

• Design, develop, and maintain the complete sound systems for multiple motor racing titles on PC and console
• Collaborate with recording artists and sound designers to provide authoring tools and support the implementation of complex sonic models into various middlewares
• Work closely with simulation engineers to provide a physics-driven soundscape, managing the performance and reliability of the audio system
• Use existing and emerging technologies to improve the realism and fidelity for drivers through spatial audio and haptic cues
• Have a strong proficiency in designing and implementing real-time audio systems for racing games, including audio middleware integration, DSP fundamentals, performance optimization, and cross-platform support

Qualifications:

• 5+ years professional C++ programming experience
• Experience developing and integrating sound engines in the gaming or simulation industries
• Experience integrating with audio middlewares and system APIs
• BS in computer science, or equivalent experience

Preferred skills:

• 3+ years professional Python experience in high performance applications (Cython)
• Experience with Digital Signal Processing, Acoustics, and Linear Systems e.g. filter design, granular synthesis, convolution, transfer functions, system identification and modeling
• Experience with spatial audio e.g. object-based rendering, wave propagation, occlusion, early reflections, reverberation, ambisonics, near field effects
• Experience with digital communication and protocols including data formats, speech processing, and psycho acoustics
• Knowledge of audio engineering and sound design
• Interest in motorsports and cars
• Passion for gaming or simulation
• Experience collaborating in a team with diverse skills and backgrounds.

Benefits & Compensation:

In addition to competitive pay and benefits, we offer the opportunity to be part of a talented team building high-quality, immersive games for players worldwide.

Benefits Include:

• Health, dental, vision, and life insurance
• 401(k) and discretionary employer match
• Paid time off (vacation, personal, sick, and holidays)

Location, Working Conditions, & Eligibility:

This position is a full time remote within the United States. Candidates must be legally authorized to work in the United States at the time of application. We are unable to sponsor visas, or work permits for this role.

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Location

San Francisco

Employment Type

Full time

Department

Scaling

Compensation

• $295K – $445K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

Benefits

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the Team

The Frontier Systems team at OpenAI builds, launches, and supports the largest supercomputers in the world that OpenAI uses for its most cutting-edge model training.

We take data center designs, turn them into real, working systems and build any software needed for running large-scale frontier model trainings.

Our mission is to bring up, stabilize and keep these hyperscale supercomputers reliable and efficient during the training of the frontier models.

About the Role

As a Software Engineer on the Frontier Systems team focused on power management, you will work on critical infrastructure to support cutting-edge research. With large-scale supercomputers consuming substantial amounts of power, managing this efficiently is key to maximizing computational capacity. This role is critical to ensuring that our cutting-edge research supercomputing infrastructure runs smoothly, while maintaining reliability and grid-level power stability.

Our team empowers strong engineers with a high degree of autonomy and ownership, as well as ability to effect change. This role will require a keen focus on system-level comprehensive investigations and the development of automated solutions. We want people who go deep on problems, investigate as thoroughly as possible, and build automation for detection and remediation at scale.

In this role, you will:

• Develop and implement system-level and software-level solutions to optimize power usage in large-scale supercomputers, ensuring efficient and reliable operations.

• Build automation to monitor power consumption patterns during training workloads and design algorithms to stabilize these fluctuations, preventing issues with grid reliability.

• Work with researchers and engineers to design tools for real-time monitoring, detection, and remediation of power-related hardware and system faults.

• Collaborate cross-functionally to translate complex electrical system requirements into code, while driving continuous improvements in power management solutions.

• Drive the development of power throttling mechanisms at the IT system level to dynamically adjust power usage based on workload demands and infrastructure limitations.

• Collaborate with hardware design teams to integrate system-level power control requirements into IT hardware design, ensuring seamless coordination between software-driven power management and hardware capabilities.

You might thrive in this role if you have:

• 7+ years of software engineering experience with a focus on solving large-scale, system-level challenges.

• Strong proficiency in Python and familiarity with automation and scripting tools (e.g., shell scripting).

• Experience with distributed systems to efficiently aggregate and analyze streaming data.

• Knowledge of electrical engineering concepts including digital signal processing, power systems, Fast Fourier Transforms, or related areas.

• Experience in system-level investigations and development of automated solutions to address power management, fault detection, and remediation.

• Strong analytical skills and the ability to dig into noisy data (experience with SQL, PromQL, Pandas, etc.).

• Comfort working with both hardware and software teams to solve multidisciplinary problems.

Bonus points if you have:

• Deep expertise with the power characteristics of synchronous workloads (as seen in supercomputing or model training environments).

• Knowledge of power control requirements in IT hardware design, with the ability to drive cross-functional collaboration to integrate power management features into hardware systems effectively.

• Working knowledge of control system fundamentals and how physical systems respond to control strategies.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits humanity. It is a privately held company with a large team of researchers and engineers.

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