<?xml version="1.0" encoding="UTF-8"?>
<source>
  <jobs>
    <job>
      <externalid>8bdc9e27-30e</externalid>
      <Title>Staff Engineer - Physical Design &amp; Signoff (Synthesis to GDS2)</Title>
      <Description><![CDATA[<p>You will conceptualize, design, and productize state-of-the-art RTL to GDS implementation for SLM monitors using ASIC design flows.</p>
<p>Design on-chip Process, Voltage, Temperature, glitch, and Droop monitors for silicon biometrics and reliability.</p>
<p>Execute digital backend activities, including synthesis, pre-layout STA, SDC constraints development, floor planning, bump placement, power planning, MV design techniques, VCLP, UPF understanding, placement, CTS, and routing.</p>
<p>Drive post-layout STA, timing and functional ECO development, and timing signoff methodology for high-frequency IP design closure.</p>
<p>Perform physical verification tasks such as DRC, LVS, PERC, ERC, Antenna, EMIR, and Power signoff.</p>
<p>Collaborate with architects and circuit design engineering teams to create and refine new flows and methodologies.</p>
<p>Ensure pre-layout and post-layout timing closure and timing model characterizations across various design corners, meeting reliability and aging requirements for automotive and consumer products.</p>
<p>Accelerating the integration of next-generation intelligent in-chip sensors and analytics into Synopsys technology products.</p>
<p>Optimizing performance, power, area, schedule, and yield at every stage of the semiconductor lifecycle.</p>
<p>Enhancing product reliability and differentiation in the market, reducing risk for customers and partners.</p>
<p>Driving innovation in physical design, verification, STA, and signoff methodologies and tools.</p>
<p>Contributing to industry-leading SLM monitors and silicon biometrics solutions that set new standards.</p>
<p>Collaborating with cross-functional teams to ensure successful deployment and adoption of advanced technologies.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>Physical Design, Physical Verification, pre- &amp; post-layout STA, EMIR/Power signoff, SDC development, UPF/Multivoltage design, DRC, LVS, DFM cleaning, Timing closure, Digital design tools, Synopsys tools, Advanced nodes, Scripting (TCL/PERL), Custom methodologies, Flow enhancements</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services for the semiconductor and electronics industries.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/staff-engineer-physical-design-and-signoff-synthesis-to-gds2/44408/94244068752</Applyto>
      <Location>Bengaluru</Location>
      <Country></Country>
      <Postedate>2026-04-24</Postedate>
    </job>
    <job>
      <externalid>14ac1088-f19</externalid>
      <Title>ASIC Digital Design, Architect</Title>
      <Description><![CDATA[<p>We Are:</p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>You Are:</p>
<p>An experienced and visionary ASIC Digital Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in design methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of protocols such as DDR, PCIe/CXL, UCIe, AMBA and its applications. You can define and executing a new architecture for protocols such as UAL (Universal Accelerator Link). You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.</p>
<p>What You’ll Be Doing:</p>
<p>Defining and developing ASIC RTL design and verification at both chip and block levels.
Creating and executing design plans for complex digital designs, particularly focusing on DDR, PCIe,CXL,UAL, UCIe IO protocols.
Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
Utilizing advanced design and verification methodologies and tools to achieve high-quality results.
Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
Communicating with internal and external stakeholders to align on project goals and deliverables.</p>
<p>The Impact You Will Have:</p>
<p>Enhancing the reliability and performance of Synopsys’ digital design processes.
Driving innovations in DDR, PCIe, UAL, UCIe technology, contributing to the development of cutting-edge semiconductor solutions.
Improving time-to-market for high-performance silicon chips through efficient methodologies.
Building and nurturing a highly skilled development team, elevating overall project quality.
Influencing strategic decisions that shape the future of Synopsys’ capabilities.
Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.</p>
<p>What You’ll Need:</p>
<p>Extensive experience in ASIC RTL design.
In-depth knowledge of DDR, PCIe, UAL, UCIe and similar IO protocols and their applications.
Proficiency in advanced digital design tools and methodologies.
Strong problem-solving skills and the ability to work independently.
Excellent communication skills for effective collaboration with diverse teams.</p>
<p>Who You Are:</p>
<p>A visionary leader with a strategic mindset.
A mentor who fosters talent and encourages innovation.
A proactive problem solver who thrives in complex environments.
An effective communicator with the ability to convey technical concepts to a broad audience.
A team player who values collaboration and diversity.</p>
<p>The Team You’ll Be A Part Of:</p>
<p>You will join a dynamic and innovative team focused on advancing Synopsys&#39; design technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>
<p>Benefits:</p>
<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>
<p>Visit Benefits Page</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC RTL design, DDR, PCIe, CXL, UAL, UCIe, AMBA, advanced digital design tools, methodologies</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. It has over 9,000 employees worldwide.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/dublin/asic-digital-design-architect/44408/92736415760</Applyto>
      <Location>Dublin</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>e0507188-1b6</externalid>
      <Title>ASIC Digital Design, Architect</Title>
      <Description><![CDATA[<p>We Are:</p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p>You Are:</p>
<p>An experienced and visionary ASIC Digital Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in design methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of protocols such as HBM, DDR, PCIe/CXL, AMBA and its applications. You can define and execute a new architecture for protocols such as UAL (Universal Accelerator Link). You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.</p>
<p>What You’ll Be Doing:</p>
<ul>
<li>Defining and developing ASIC RTL design and verification at both chip and block levels.</li>
<li>Creating and executing design plans for complex digital designs, particularly focusing on HBM, PCIe/CXL and AMBA protocols.</li>
<li>Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.</li>
<li>Utilizing advanced design and verification methodologies and tools to achieve high-quality results.</li>
<li>Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.</li>
<li>Communicating with internal and external stakeholders to align on project goals and deliverables.</li>
</ul>
<p>The Impact You Will Have:</p>
<ul>
<li>Enhancing the reliability and performance of Synopsys’ digital design processes.</li>
<li>Driving innovations in HBM, PCIe/CXL and AMBA technology, contributing to the development of cutting-edge semiconductor solutions.</li>
<li>Improving time-to-market for high-performance silicon chips through efficient methodologies.</li>
<li>Building and nurturing a highly skilled development team, elevating overall project quality.</li>
<li>Influencing strategic decisions that shape the future of Synopsys’ capabilities.</li>
<li>Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.</li>
</ul>
<p>What You’ll Need:</p>
<ul>
<li>Extensive experience in ASIC RTL design.</li>
<li>In-depth knowledge of HBM, PCIe, CXL, AMBA and similar IO protocols and their applications.</li>
<li>Proficiency in advanced digital design tools and methodologies.</li>
<li>Strong problem-solving skills and the ability to work independently.</li>
<li>Excellent communication skills for effective collaboration with diverse teams.</li>
</ul>
<p>Who You Are:</p>
<ul>
<li>A visionary leader with a strategic mindset.</li>
<li>A mentor who fosters talent and encourages innovation.</li>
<li>A proactive problem solver who thrives in complex environments.</li>
<li>An effective communicator with the ability to convey technical concepts to a broad audience.</li>
<li>A team player who values collaboration and diversity.</li>
</ul>
<p>The Team You’ll Be A Part Of:</p>
<p>You will join a dynamic and innovative team focused on advancing Synopsys&#39; design technologies. Our team is dedicated to excellence, collaboration, and continuous improvement. We work closely with various departments to ensure the successful integration and performance of our solutions. Together, we drive the future of semiconductor technology and make a significant impact on the industry.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC RTL design, HBM, DDR, PCIe/CXL, AMBA, advanced digital design tools, methodologies</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. It offers a range of products and services for designing and verifying complex electronic systems.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/dublin/asic-digital-design-architect/44408/91458064944</Applyto>
      <Location>Dublin</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>ed273d82-c6f</externalid>
      <Title>ASIC Digital Design Architect</Title>
      <Description><![CDATA[<p>We are seeking an experienced and visionary ASIC Digital Architect to join our team. As a key member of our design team, you will be responsible for defining and developing ASIC RTL design and verification at both chip and block levels. You will create and execute design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols. You will collaborate with cross-functional teams to ensure seamless integration and functionality of designs. You will utilize advanced design and verification methodologies and tools to achieve high-quality results. You will mentor and guide junior engineers, promoting best practices, and fostering a culture of continuous improvement. You will communicate with internal and external stakeholders to align on project goals and deliverables.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange>$181000-$271000</Salaryrange>
      <Skills>ASIC RTL design, DDR, PCIe, UAL, UCIe and similar IO protocols and their applications, Advanced digital design tools and methodologies, Strong problem-solving skills and the ability to work independently, Excellent communication skills for effective collaboration with diverse teams, Leadership skills, Mentoring and guiding junior engineers, Fostering a culture of continuous improvement</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys drives the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/austin/asic-digital-design-architect/44408/91458064976</Applyto>
      <Location>Austin, Texas</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
    <job>
      <externalid>9a45cb11-7c8</externalid>
      <Title>ASIC Digital Design Architect</Title>
      <Description><![CDATA[<p>We are seeking an experienced ASIC Digital Design Architect to join our team. As an ASIC Digital Design Architect, you will be responsible for defining and developing ASIC RTL design and verification at both chip and block levels. You will create and execute design plans for complex digital designs, particularly focusing on DDR, PCIe, CXL, UAL, UCIe IO protocols. You will collaborate with cross-functional teams to ensure seamless integration and functionality of designs.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>ASIC RTL design, DDR, PCIe, UAL, UCIe and similar IO protocols, advanced digital design tools and methodologies, problem-solving skills, communication skills, leadership skills</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and services. The company&apos;s technology is used to design and develop complex electronic systems, including semiconductors, computer chips, and other electronic components.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/dublin/asic-digital-design-architect/44408/91555138848</Applyto>
      <Location>Dublin</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
  </jobs>
</source>