Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nThis role is for a Pre-Silicon Signoff Lead who will be responsible for leading simulation and sign-off activities that guarantee reliability and performance. The ideal candidate will have a rich background in high-speed serial communication and advanced transceiver design, with expertise in theoretical modeling and hands-on lab work.
\nKey responsibilities include collaborating closely with analog, digital, and hardware teams to ensure comprehensive design and verification coverage, developing and maintaining robust simulation and verification plans for IP, and reviewing progress against verification plans through regular meetings with multiple verification teams.
\nThe successful candidate will have a strong command of simulation, verification, and hardware validation processes, with experience in high-speed protocols such as PCIe and Ethernet. They will also have a proven track record of leadership in testbench architecture, planning, cross-site collaboration, and mentoring.
\nAs a member of our world-class engineering team, you will drive innovation, tackle complex challenges, and ensure our products empower customers to achieve their goals in enterprise, data center, and networking applications.
\nIf you are an innovative and forward-thinking engineer with a passion for advancing connectivity technologies, we encourage you to apply for this exciting opportunity.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_c2bf9f43-9e8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/mississauga/pre-silicon-signoff-lead-16513/44408/93247557808","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["SystemVerilog","object-oriented verification","UVM/VMM/OVM","assertion-based verification","coverage closure","Python","TCL","Perl","C/C++","high-speed analog and digital design principles","verification flows: analog, cosimulation, digital verification, GLS, formal methods, and emulation"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:22:35.013Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mississauga"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"SystemVerilog, object-oriented verification, UVM/VMM/OVM, assertion-based verification, coverage closure, Python, TCL, Perl, C/C++, high-speed analog and digital design principles, verification flows: analog, cosimulation, digital verification, GLS, formal methods, and emulation"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_fd0bf848-e22"},"title":"Senior FPGA Engineer","description":"We are seeking a Senior FPGA Engineer to join our team. As a Senior FPGA Engineer, you will be responsible for designing and developing high-performance digital solutions using FPGAs. You will work closely with cross-functional teams to gather requirements, evaluate design tradeoffs, and deliver robust FPGA solutions that satisfy project goals.
\nWhat you'll do
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_fd0bf848-e22","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/moreira/senior-fpga-engineer/44408/92415360528","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["FPGA design and development","HDL languages such as Verilog","Industry-standard FPGA development tools like Vivado","Digital design principles","High-speed interfaces (PCIe or Ethernet)","Analytical, debug, and problem-solving skills","Collaboration and communication skills"],"x-skills-preferred":["PCIe-based designs","Cross-functional team collaboration","Design tradeoff evaluation","Robust FPGA solutions","Clock domains and timing analysis","High-speed interfaces (PCIe or Ethernet)"],"datePosted":"2026-03-06T07:36:19.795Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Moreira, Porto, Portugal"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"FPGA design and development, HDL languages such as Verilog, Industry-standard FPGA development tools like Vivado, Digital design principles, High-speed interfaces (PCIe or Ethernet), Analytical, debug, and problem-solving skills, Collaboration and communication skills, PCIe-based designs, Cross-functional team collaboration, Design tradeoff evaluation, Robust FPGA solutions, Clock domains and timing analysis, High-speed interfaces (PCIe or Ethernet)"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_3bbd064e-4be"},"title":"Senior Firmware Design Engineer","description":"We are seeking a Senior Firmware Design Engineer to join our team. As a Senior Firmware Design Engineer, you will be responsible for designing, developing, and debugging bare metal firmware for advanced mixed-signal and high-speed SerDes products.
\nWhat you'll do
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_3bbd064e-4be","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/staff-firmware-design-engineer/44408/92139734464","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["bare metal firmware development","silicon testing","digital design principles"],"x-skills-preferred":["structured firmware development","verification","comprehensive documentation processes"],"datePosted":"2026-03-06T07:26:12.737Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru, Karnataka, India"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"bare metal firmware development, silicon testing, digital design principles, structured firmware development, verification, comprehensive documentation processes"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_e7c94150-83c"},"title":"R&D Engineering, Principal Engineer- 15024","description":"Opening.
\nWhat you'll do
\nCollaborating closely with analog, digital, and hardware teams to ensure holistic design and verification coverage.
\nWhat you need
\nWhy this matters
\nAdvance high-speed connectivity for enterprise and hyperscale applications worldwide.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_e7c94150-83c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/mississauga/r-and-d-engineering-principal-engineer-15024/44408/91213465776","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["MSc or PhD in Electrical/Computer Engineering","10+ years of relevant industry experience","High-speed protocols—PCIe and Ethernet","SystemVerilog, object-oriented verification, UVM/VMM/OVM, and assertion-based verification, coverage closure expertise","Strong scripting/programming: Python, TCL, Perl, C/C++","In-depth knowledge of high-speed analog and digital design principles","Familiarity with verification flows: analog, co-simulation, digital verification, GLS, formal methods, and emulation","Proven leadership: testbench architecture, planning, cross-site collaboration, and mentoring"],"x-skills-preferred":["Signal processing","Hardware validation"],"datePosted":"2026-02-04T16:12:36.289Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mississauga"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"MSc or PhD in Electrical/Computer Engineering, 10+ years of relevant industry experience, High-speed protocols—PCIe and Ethernet, SystemVerilog, object-oriented verification, UVM/VMM/OVM, and assertion-based verification, coverage closure expertise, Strong scripting/programming: Python, TCL, Perl, C/C++, In-depth knowledge of high-speed analog and digital design principles, Familiarity with verification flows: analog, co-simulation, digital verification, GLS, formal methods, and emulation, Proven leadership: testbench architecture, planning, cross-site collaboration, and mentoring, Signal processing, Hardware validation"}]}