{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/digital-circuit-design"},"x-facet":{"type":"skill","slug":"digital-circuit-design","display":"Digital Circuit Design","count":6},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_362bf485-c10"},"title":"Senior Electrical Engineer","description":"<p>We are looking for a skilled Senior Electrical Engineer to join our team. As a Senior Electrical Engineer, you will be responsible for the design and development of cutting-edge avionics systems for UAVs. You will work closely with cross-functional teams to design, test, and deliver high-performance electrical systems.</p>\n<p>Key Responsibilities:</p>\n<ul>\n<li>Hands-on Engineering: Actively participate in the design, testing, and troubleshooting of circuits, PCB layouts, and other electronic systems.</li>\n<li>Collaboration: Work closely with cross-functional teams, including software, firmware, and mechanical engineers, to ensure seamless integration of electrical systems.</li>\n<li>Mentorship: Provide technical guidance and mentorship to junior engineers, helping to develop the team&#39;s capabilities.</li>\n<li>System Testing and Validation: Oversee system-level testing and validation to ensure designs meet performance, safety, and reliability standards.</li>\n<li>Vendor Coordination: Interface with vendors to source and select appropriate components for designs, ensuring quality and timely delivery.</li>\n<li>Project Management: Support project timelines and ensure that technical milestones are met, reporting on progress to senior management.</li>\n</ul>\n<p>Requirements:</p>\n<ul>\n<li>Experience: 5+ years of experience in electrical engineering, with a focus on avionics, UAV systems, or similar industries.</li>\n<li>Technical Expertise: Strong hands-on knowledge of analog and digital circuit design, PCB design, and avionics systems.</li>\n<li>Project Management: Ability to oversee the technical aspects of projects from concept to delivery, ensuring that deadlines and specifications are met.</li>\n<li>Eligible to obtain and maintain an active U.S. Secret security clearance.</li>\n</ul>\n<p>Preferred Qualifications:</p>\n<ul>\n<li>Familiarity with avionics design standards like DO-254, MIL-STD-810, and others.</li>\n<li>Proficiency with Altium Designer or equivalent PCB design tools.</li>\n<li>Strong problem-solving skills with a focus on delivering innovative solutions.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_362bf485-c10","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anduril Industries","sameAs":"https://anduril.com","logo":"https://logos.yubhub.co/anduril.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/andurilindustries/jobs/4947197007","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$140,000-$213,000 USD","x-skills-required":["analog and digital circuit design","PCB design","avionics systems","project management","UAV systems"],"x-skills-preferred":["DO-254","MIL-STD-810","Altium Designer","problem-solving skills"],"datePosted":"2026-04-18T15:49:24.201Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Costa Mesa, California, United States"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog and digital circuit design, PCB design, avionics systems, project management, UAV systems, DO-254, MIL-STD-810, Altium Designer, problem-solving skills","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":140000,"maxValue":213000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c89c2925-f40"},"title":"Electrical Engineer","description":"<p>We are seeking a highly skilled Electrical Engineer to design, develop, and support advanced electronic systems for next-generation drone defense (counter-UAS) solutions. This role involves working on cutting-edge technologies including RF systems, embedded electronics, sensors, and power systems to detect, track, and neutralize unmanned aerial threats.</p>\n<p>Key responsibilities include designing, developing, and testing electronic hardware for drone detection and mitigation systems, working on RF systems including signal detection, jamming, and communication modules, and integrating sensors (radar, EO/IR, acoustic, RF) into defense platforms.</p>\n<p>The ideal candidate will have a strong background in electrical engineering, experience with analog and digital circuit design, PCB design tools, embedded systems, and microcontrollers, as well as familiarity with RF systems, antennas, and signal processing.</p>\n<p>In addition to technical skills, the successful candidate will be able to work in fast-paced, mission-driven environments, collaborate with cross-functional teams, and communicate effectively with stakeholders.</p>\n<p>As an Electrical Engineer at CX2, you will have the opportunity to work on high-priority projects, contribute to the development of cutting-edge technologies, and make a meaningful impact on national security.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c89c2925-f40","directApply":true,"hiringOrganization":{"@type":"Organization","name":"CX2","sameAs":"https://cx2.com/","logo":"https://logos.yubhub.co/cx2.com.png"},"x-apply-url":"https://jobs.lever.co/cx2/e1b92667-e612-42c0-9770-38c1c8377d36","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":"$120,000 - $180,000 per year","x-skills-required":["Analog and digital circuit design","PCB design tools","Embedded systems","Microcontrollers","RF systems","Antennas","Signal processing"],"x-skills-preferred":["Experience with FPGA systems","Understanding of military standards (MIL-STD, DO-160, etc.)","Knowledge of RF jamming, spectrum monitoring, or direction finding"],"datePosted":"2026-04-17T12:27:43.765Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog and digital circuit design, PCB design tools, Embedded systems, Microcontrollers, RF systems, Antennas, Signal processing, Experience with FPGA systems, Understanding of military standards (MIL-STD, DO-160, etc.), Knowledge of RF jamming, spectrum monitoring, or direction finding","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":120000,"maxValue":180000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_de112d07-e65"},"title":"Analog Design, Principal Engineer","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15231</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/15/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<ul>\n<li>An experienced and passionate Analog and Mixed-Signal (A&amp;MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.</li>\n</ul>\n<ul>\n<li>You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<ul>\n<li>Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.</li>\n</ul>\n<ul>\n<li>You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.</li>\n</ul>\n<ul>\n<li>You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.</li>\n</ul>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Leading NRZ/PAM4 Serdes analog design transceiver solutions.</li>\n</ul>\n<ul>\n<li>Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.</li>\n</ul>\n<ul>\n<li>Collaborating with silicon test and debug experts for Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Driving innovation in mixed-signal advanced analog serdes design.</li>\n</ul>\n<ul>\n<li>Enhancing the performance and efficiency of high-speed physical interfaces.</li>\n</ul>\n<ul>\n<li>Contributing to the development of cutting-edge technology in High Speed PHY IP.</li>\n</ul>\n<ul>\n<li>Improving quality and robustness of design through collaboration and Sim2Sil correlation.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.</li>\n</ul>\n<ul>\n<li>Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.</li>\n</ul>\n<ul>\n<li>Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .</li>\n</ul>\n<ul>\n<li>Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.</li>\n</ul>\n<ul>\n<li>Experience with PLL designs and high-speed digital circuit design.</li>\n</ul>\n<ul>\n<li>Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.</li>\n</ul>\n<ul>\n<li>Familiarity with digitally assisted analog circuit techniques.</li>\n</ul>\n<ul>\n<li>Capable to drive technical decision and tradeoff with customer focus</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.</p>\n<p>You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p><strong>Get an idea of what your daily routine <strong>around the office</strong> can be like</strong></p>\n<p>\\ Explore <strong>Noida</strong></p>\n<p>View Map</p>\n<p>---</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_de112d07-e65","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/analog-design-principal-engineer/44408/91802916768","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert","PLL , data converters and SERDES design","mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction","circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes","Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology","silicon test and debug experts to advance quality through Sim2Sil correlation","Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits","Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity ","RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:06:28.077Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert, PLL , data converters and SERDES design, mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction, circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes, Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology, silicon test and debug experts to advance quality through Sim2Sil correlation, Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits, Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity , RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_5a098910-ad1"},"title":"SRAM Design Engineer, Staff","description":"<p>You will be working as a SRAM Design Engineer, Staff at Synopsys. As a member of our team, you will be responsible for designing and verifying SRAM integrated circuits to ensure robustness and reliability. You will also develop SRAM compilers, including gds and netlist tiling for optimal performance and scalability. Additionally, you will characterize SRAM timing, power, and other critical metrics to meet customer and product requirements. Your work will involve executing compiler quality assurance processes to uphold industry-leading standards. You will also conduct SRAM bitcell analysis and formulate design criteria for advanced memory products. You will utilize EDA tools (XA, hspice, Verilog, Starrc, EMIR) for simulation, verification, and design optimization. You will collaborate with cross-functional teams to address post-silicon debug and implement improvements. You will also explore and integrate SP/2P/ROM variety designs into SRAM IP solutions.</p>\n<p>Your contributions will drive innovation in SRAM IP design, maintaining Synopsys’s leadership in memory technology. You will enhance product performance and reliability for global semiconductor customers. You will support the delivery of best-in-class SRAM compilers used in high-performance silicon chips. You will strengthen quality assurance processes, ensuring robust and scalable designs. You will accelerate time-to-market for new memory IP solutions through efficient verification and debug activities. You will contribute to the development of advanced memory architectures, impacting next-generation electronic devices.</p>\n<p>To be successful in this role, you will need a Master’s degree in Electrical/Electronic Engineering or a related field. You will have 3–7+ years of hands-on experience in SRAM circuit design. You will have prior understanding of CMOS-based block level circuit design and SRAM architectures. You will have experience with SP/2P/ROM variety design and SRAM bitcell analysis. You will be proficient in digital circuit design and VLSI process concepts. You will have familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell. You will have experience with EDA tools for simulation and design: XA, hspice, Verilog, Starrc, EMIR. Post-silicon debug experience is a plus.</p>\n<p>You will be an analytical thinker with strong problem-solving skills. You will be curious and eager to learn new technologies and concepts. You will be detail-oriented and committed to delivering high-quality results. You will be a collaborative team player with effective communication skills. You will be adaptable and able to manage multiple tasks in a fast-paced environment. You will be self-motivated and resourceful in overcoming technical challenges.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_5a098910-ad1","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hsinchu/sram-design-engineer-staff/44408/91639673872","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["SRAM circuit design","CMOS-based block level circuit design","SRAM architectures","SP/2P/ROM variety design","SRAM bitcell analysis","digital circuit design","VLSI process concepts","scripting languages","EDA tools"],"x-skills-preferred":["Python","Tcl/Tk","Perl","Unix shell","XA","hspice","Verilog","Starrc","EMIR"],"datePosted":"2026-03-09T11:06:12.430Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hsinchu"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"SRAM circuit design, CMOS-based block level circuit design, SRAM architectures, SP/2P/ROM variety design, SRAM bitcell analysis, digital circuit design, VLSI process concepts, scripting languages, EDA tools, Python, Tcl/Tk, Perl, Unix shell, XA, hspice, Verilog, Starrc, EMIR"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_937c266a-1fb"},"title":"SRAM Design Engineer, Staff","description":"<p>You are a passionate and detail-oriented engineer eager to make an impact in the memory technology space. You thrive in collaborative environments and are driven by curiosity and a desire to push technological boundaries. Your background in Electrical or Electronic Engineering, complemented by a solid foundation in CMOS and digital circuit design, positions you perfectly to contribute to the world&#39;s largest SRAM circuit and compiler design team.</p>\n<p>You enjoy solving complex problems and are not afraid to explore new methods and technologies. You bring a strong analytical mindset, excellent problem-solving skills, and a willingness to learn from both successes and setbacks. You value diversity and inclusion, recognizing that the best solutions come from teams with varied perspectives. You take pride in your work, communicate effectively, and are motivated to deliver high-quality results. Whether you are fresh out of graduate school or have a few years of hands-on experience, you are ready to take on new challenges and contribute to innovations that power the next generation of intelligent devices.</p>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Designing and verifying the robustness of SRAM integrated circuits, ensuring optimal performance and reliability.</li>\n<li>Developing and enhancing SRAM compilers, including GDS and netlist tiling for efficient memory layout and integration.</li>\n<li>Characterizing SRAM modules for timing, power, and functional parameters to meet stringent specifications.</li>\n<li>Analyzing and developing SRAM bitcell design criteria, supporting a wide range of memory architectures.</li>\n<li>Utilizing EDA tools (XA, Hspice, Verilog, Starrc, EMIR) for simulation, verification, and design optimization.</li>\n<li>Collaborating with cross-functional teams to resolve post-silicon issues and continuously improve memory IP quality.</li>\n<li>Exploring new SRAM architectures including SP, 2P, and ROM varieties, contributing to innovation in IP solutions.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Advance the capabilities of Synopsys’s SRAM IP, strengthening its position as an industry leader.</li>\n<li>Deliver high-performance, reliable memory solutions that enable next-generation chips for global customers.</li>\n<li>Drive innovation by creating robust, scalable, and energy-efficient SRAM designs.</li>\n<li>Enhance the efficiency and productivity of the design team through automation and process improvements.</li>\n<li>Support successful silicon tapeouts and post-silicon validation, ensuring product excellence.</li>\n<li>Contribute to a collaborative and inclusive team culture that values knowledge sharing and continuous learning.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>Master’s degree in Electrical/Electronic Engineering or a related field.</li>\n<li>Strong understanding of CMOS-based block level circuit design and SRAM architectures.</li>\n<li>Solid grasp of digital circuit design and VLSI process concepts.</li>\n<li>Familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell for workflow automation.</li>\n<li>Experience 3~10 years in SRAM circuit design, bitcell analysis, and design criteria development.</li>\n<li>Knowledge of SP/2P/ROM variety designs and post-silicon debug processes is a plus.</li>\n<li>Proficiency with EDA tools including XA, Hspice, Verilog, Starrc, and EMIR for simulation and verification.</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Innovative thinker with a strong desire to learn and explore new technologies.</li>\n<li>Detail-oriented and analytical, capable of tackling complex technical challenges.</li>\n<li>Collaborative team player who values diverse perspectives and open communication.</li>\n<li>Effective communicator able to present ideas clearly and work across global teams.</li>\n<li>Resilient and adaptable, able to thrive in a fast-paced, ever-evolving environment.</li>\n<li>Proactive problem solver who takes ownership of projects and drives results.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>You will join Synopsys’s world-class SRAM circuit and compiler design department, the largest of its kind globally. Our team is at the forefront of memory IP solutions, working collaboratively to deliver robust, high-performance SRAM products for a diverse range of applications. We foster a culture of innovation, knowledge sharing, and continuous improvement, empowering each member to contribute to the advancement of cutting-edge technologies in semiconductor design.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_937c266a-1fb","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hsinchu/sram-design-engineer-staff/44408/91675562416","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["CMOS-based block level circuit design","SRAM architectures","digital circuit design","VLSI process concepts","scripting languages","EDA tools","SRAM circuit design","bitcell analysis","design criteria development"],"x-skills-preferred":["Python","Tcl/Tk","Perl","Unix shell","XA","Hspice","Verilog","Starrc","EMIR"],"datePosted":"2026-03-09T11:02:55.213Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hsinchu"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS-based block level circuit design, SRAM architectures, digital circuit design, VLSI process concepts, scripting languages, EDA tools, SRAM circuit design, bitcell analysis, design criteria development, Python, Tcl/Tk, Perl, Unix shell, XA, Hspice, Verilog, Starrc, EMIR"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_141567c1-532"},"title":"ASIC Digital, Verification Engineer - Senior Staff","description":"<p>We are seeking a highly skilled and driven ASIC Digital Verification Engineer with a passion for advancing technology and solving complex problems. The successful candidate will be responsible for developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products.</li>\n<li>Writing and maintaining advanced testcases using SystemVerilog and UVM methodologies to ensure thorough coverage and robust verification.</li>\n<li>Debugging and analyzing complex testbench and design-related issues, collaborating closely with design and mixed-signal engineering teams.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Bachelor’s or Master’s degree in Electrical Engineering (BSEE or MSEE) with a minimum of 10 years of digital design/verification experience.</li>\n<li>Proven experience in writing and maintaining testcases using SystemVerilog/UVM.</li>\n<li>Strong debugging skills for complex testbench and design-related issues.</li>\n<li>Solid understanding of digital circuit design concepts and principles.</li>\n<li>Proficiency with scripting languages such as Python or Perl for automation and workflow enhancement.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_141567c1-532","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/nepean/asic-digital-verification-engineer-senior-staff/44408/91369494800","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["digital design/verification experience","SystemVerilog/UVM","debugging skills","digital circuit design concepts","scripting languages"],"x-skills-preferred":[],"datePosted":"2026-03-06T07:23:30.907Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Nepean, Ontario, Canada"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"digital design/verification experience, SystemVerilog/UVM, debugging skills, digital circuit design concepts, scripting languages"}]}