{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/dft"},"x-facet":{"type":"skill","slug":"dft","display":"DFT","count":8},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_93eda4db-c71"},"title":"Analog Design, Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>As a highly skilled A&amp;MS Design Staff Engineer, you will lead the design of analog and mixed-signal circuits, blocks, and subsystems. You will develop architecture proposals and evaluate design tradeoffs for performance, power, area, and cost. You will perform circuit simulation, verification, and optimization using industry-standard EDA tools. You will support tape-out activities, silicon bring-up, debug, and characterization. You will collaborate with layout engineers to ensure design intent, robustness, and manufacturability. You will define and execute validation plans to meet product requirements. You will review design specifications, schematics, and test results. You will mentor junior engineers and contribute technical leadership across projects. You will work closely with system, digital, validation, and product teams to resolve technical issues. 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Touch device users, explore by touch or with swipe gestures.</p>\n<p><strong>Staff DFT Applications Engineer</strong></p>\n<p>Bengaluru, Karnataka, India</p>\n<p>Save</p>\n<p><strong>Hire Type</strong> Employee<strong>Job ID</strong> 16891<strong>Date posted</strong> 04/12/2026</p>\n<p>A peek inside our office</p>\n<p>Po Popal</p>\n<p>Workplace Resources, Sr Director</p>\n<p><strong><strong>We Are:</strong></strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong><strong>You Are:</strong></strong></p>\n<p>You are an inventive and detail-oriented engineer with a strong foundation in Computer Science or Electronics, and a passion for advancing the frontiers of Design for Test (DFT) technology. With 3+ years of hands-on experience in DFT, scripting, and software automation, you are eager to take on complex challenges in the rapidly evolving semiconductor industry. You excel in both independent and collaborative environments, thriving in project-oriented settings where you can develop, automate, and validate sophisticated DFT flows and methodologies. Your curiosity and drive for continuous learning make you adept at keeping up with the latest advancements in Autonomous Transportation, Mission Critical AI, High Performance Computing, and Mobile Networking.</p>\n<p>As a candidate, you possess a keen analytical mindset and enjoy problem solving, particularly when it comes to troubleshooting and root cause analysis. You are comfortable working closely with cross-functional teams, providing valuable feedback, and contributing to product readiness. Your experience with scripting languages, RTL coding, and a variety of DFT technologies enables you to deliver scalable solutions tailored to customer architectures and methodologies. You embrace the opportunity to work with cutting-edge tools, including AI-enabled agents, and take pride in producing high-quality documentation and pragmatic solutions. Your exceptional communication and networking skills allow you to bridge gaps between engineering and R&amp;D, ensuring the highest standards in test solutions.</p>\n<p><strong><strong>What You’ll Be Doing:</strong></strong></p>\n<ul>\n<li>Developing detailed test plans, incorporating new features into test cases, and executing/automating these test cases using Verilog, System Verilog, or VHDL.</li>\n</ul>\n<ul>\n<li>Reviewing specifications and test plans from other teams, offering feedback to ensure feature completeness and product readiness.</li>\n</ul>\n<ul>\n<li>Collaborating with Product Engineering and R&amp;D teams to create in-house test cases and implement scalable DFT solutions based on customer requirements.</li>\n</ul>\n<ul>\n<li>Performing Quality of Results (QOR) analysis, troubleshooting, and root cause analysis to resolve complex technical issues across multiple aspects of the ASIC flow.</li>\n</ul>\n<ul>\n<li>Focusing on tool features such as DFT compression, ATPG for various fault models (SSAF, Transition Delay Fault, Cell-aware faults), and architecting solutions for Memory and Logic BIST.</li>\n</ul>\n<ul>\n<li>Conducting diagnostics analysis and debugging to enhance tool reliability and performance.</li>\n</ul>\n<ul>\n<li>Working with AI agents to review and create assistive or generative AI documentation for test products.</li>\n</ul>\n<ul>\n<li>Managing performance, installation, and license testing to ensure seamless customer experience.</li>\n</ul>\n<p><strong><strong>The Impact You Will Have:</strong></strong></p>\n<ul>\n<li>Elevate the quality and performance of Synopsys’ industry-leading DFT tools, directly contributing to customer success and business growth.</li>\n</ul>\n<ul>\n<li>Enable customers to implement robust test methodologies that improve silicon quality and accelerate time-to-market for advanced chips.</li>\n</ul>\n<ul>\n<li>Drive innovation in DFT automation, making cutting-edge solutions accessible across diverse industry segments, from AI to mobile networking.</li>\n</ul>\n<ul>\n<li>Strengthen Synopsys’ reputation as a trusted partner in delivering scalable, reliable, and high-performance test solutions.</li>\n</ul>\n<ul>\n<li>Facilitate cross-team knowledge sharing by providing actionable feedback and creating comprehensive documentation.</li>\n</ul>\n<ul>\n<li>Advance the adoption of AI-driven testing and automation, keeping Synopsys at the forefront of technological advancement.</li>\n</ul>\n<ul>\n<li>Support the seamless integration of new features and methodologies, ensuring Synopsys products remain competitive and future-ready.</li>\n</ul>\n<p><strong><strong>What You’ll Need:</strong></strong></p>\n<ul>\n<li>Bachelor’s, Master’s, or MTech in Electrical/Electronics Engineering, Computer Science, or a related field with 3+ years of relevant experience.</li>\n</ul>\n<ul>\n<li>Hands-on expertise in DFT technologies such as JTAG, MBIST, Scan, and related test architectures.</li>\n</ul>\n<ul>\n<li>Proficiency in RTL coding using Verilog, System Verilog, and/or VHDL.</li>\n</ul>\n<ul>\n<li>Advanced scripting skills in Perl, Tcl/Tk, Python, or similar languages for automation and tool integration.</li>\n</ul>\n<ul>\n<li>Familiarity with change management tools (e.g., Perforce) for collaborative development and version control.</li>\n</ul>\n<ul>\n<li>Solid understanding of ASIC design flow, including design planning, synthesis, physical design, and sign-off verification tools.</li>\n</ul>\n<p><strong><strong>Who You Are:</strong></strong></p>\n<ul>\n<li>Analytical thinker with exceptional problem-solving skills and a passion for troubleshooting complex technical challenges.</li>\n</ul>\n<ul>\n<li>Effective communicator who excels in cross-functional team environments and can articulate technical concepts to varied audiences.</li>\n</ul>\n<ul>\n<li>Collaborative team player who values diverse perspectives and actively contributes to group success.</li>\n</ul>\n<ul>\n<li>Proactive and adaptable, with a strong desire to learn and innovate in a fast-paced, evolving technological landscape.</li>\n</ul>\n<ul>\n<li>Detail-oriented and organized, able to manage multiple priorities and deliver high-quality results on schedule.</li>\n</ul>\n<p><strong><strong>The Team You’ll Be A Part Of:</strong></strong></p>\n<p>You’ll join the Synopsys Test Group, a dynamic team focused on developing cutting-edge Design for Test (DFT) solutions. The team is composed of passionate engineers and innovators who collaborate across product engineering and R&amp;D to create industry-leading methodologies and tools. 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They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development.</p>\n<p>You are an inventive and detail-oriented engineer with a strong foundation in Computer Science or Electronics, and a passion for advancing the frontiers of Design for Test (DFT) technology. With 3+ years of hands-on experience in DFT, scripting, and software automation, you are eager to take on complex challenges in the rapidly evolving semiconductor industry. You excel in both independent and collaborative environments, thriving in project-oriented settings where you can develop, automate, and validate sophisticated DFT flows and methodologies. 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Your exceptional communication and networking skills allow you to bridge gaps between engineering and R&amp;D, ensuring the highest standards in test solutions.</p>\n<p>Developing detailed test plans, incorporating new features into test cases, and executing/automating these test cases using Verilog, System Verilog, or VHDL. Reviewing specifications and test plans from other teams, offering feedback to ensure feature completeness and product readiness. Collaborating with Product Engineering and R&amp;D teams to create in-house test cases and implement scalable DFT solutions based on customer requirements. Performing Quality of Results (QOR) analysis, troubleshooting, and root cause analysis to resolve complex technical issues across multiple aspects of the ASIC flow. Focusing on tool features such as DFT compression, ATPG for various fault models (SSAF, Transition Delay Fault, Cell-aware faults), and architecting solutions for Memory and Logic BIST. Conducting diagnostics analysis and debugging to enhance tool reliability and performance. Working with AI agents to review and create assistive or generative AI documentation for test products. Managing performance, installation, and license testing to ensure seamless customer experience.</p>\n<p>Elevate the quality and performance of Synopsys&#39; industry-leading DFT tools, directly contributing to customer success and business growth. Enable customers to implement robust test methodologies that improve silicon quality and accelerate time-to-market for advanced chips. Drive innovation in DFT automation, making cutting-edge solutions accessible across diverse industry segments, from AI to mobile networking. Strengthen Synopsys&#39; reputation as a trusted partner in delivering scalable, reliable, and high-performance test solutions. Facilitate cross-team knowledge sharing by providing actionable feedback and creating comprehensive documentation. Advance the adoption of AI-driven testing and automation, keeping Synopsys at the forefront of technological advancement. Support the seamless integration of new features and methodologies, ensuring Synopsys products remain competitive and future-ready.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_a96c027a-289","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/staff-dft-solutions-engineer/44408/93979726384?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["DFT","Scripting","Software Automation","Verilog","System Verilog","VHDL","RTL Coding","AI/ML","GenAI","Cloud","Autonomous Transportation","Mission Critical AI","High Performance Computing","Mobile Networking"],"x-skills-preferred":[],"datePosted":"2026-04-24T14:08:12.463Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"DFT, Scripting, Software Automation, Verilog, System Verilog, VHDL, RTL Coding, AI/ML, GenAI, Cloud, Autonomous Transportation, Mission Critical AI, High Performance Computing, Mobile Networking"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_683d0330-14c"},"title":"Senior Staff R&D Engineer (DFT Engineer)","description":"<p>Synopsys is looking for a Senior Staff R&amp;D Engineer to join our advanced DFT team and contribute to the evolution of our Streaming Fabric (SF) and SEQ technologies within the TestMAX product family.</p>\n<p>This role is ideal for an engineer who enjoys deep technical work , analysing complex logic simulations, working across hardware and software, and driving improvements in test efficiency and overall QoR. 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Your contributions will directly strengthen the Streaming Fabric and SEQ solution and support their integration into the TestMAX ecosystem , enabling improved scalability, test efficiency, and product quality.</p>\n<p>If you’re excited by deep technical challenges and want to work on impactful DFT innovation, we’d love to hear from you.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_683d0330-14c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/senior-staff-r-and-d-engineer-dft-engineer/44408/92296851888?utm_source=yubhub.co&utm_medium=jobs_feed&utm_campaign=apply","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["Verilog","C/C++","DFT","scan architectures","test-generation concepts","logic-simulation debug","AI-based tools"],"x-skills-preferred":["TestMAX","Tessent","Modus","pattern compression","hierarchical DFT","test scheduling","automation","performance-oriented C/C++ code"],"datePosted":"2026-04-05T13:20:11.211Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"Verilog, C/C++, DFT, scan architectures, test-generation concepts, logic-simulation debug, AI-based tools, TestMAX, Tessent, Modus, pattern compression, hierarchical DFT, test scheduling, automation, performance-oriented C/C++ code"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_46cf12da-6c5"},"title":"ASIC Digital Design, Principal","description":"<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You Are:</p>\n<p>You are a skilled and passionate engineer with deep expertise in system design, embedded firmware, digital design, and verification with over 15 years of impactful experience. You are a highly accomplished engineer with technical leadership, strategic thinking, and ability to model, architect, and validate mixed-signal SoC development, seeking to make a tangible impact in the semiconductor industry.</p>\n<p>A technical powerhouse as well as subject matter expert in latest DDR, LPDDR, MRDIMM and DFI protocols, with a proven track record in working successfully in IP product developments while focused on verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Work hands-on, having a collaborative mindset, thinking clearly and concisely when capturing requirements, and maintaining a proactive attitude to achieve results.</p>\n<p>You bring a deep understanding of system, digital, firmware design, high-speed memory interface architectures. Your experience includes leading multi-disciplinary teams, driving technical roadmaps, and mentoring engineers to deliver best-in-class solutions for protocols like DDR, LPDDR, and HBM. You are highly proficient in creating and using robust verification environments using UVM methodology and System Verilog, and you leverage system level modeling using advanced tools such as MATLAB and scripting languages, Perl, Python, and C++ to automate design and validation flows.</p>\n<p>What You&#39;ll Be Doing:</p>\n<ul>\n<li>Developing and optimizing embedded firmware for advanced DDR/LPDDR/HBM memory interface PHYs</li>\n<li>Contributing and collaborating with hardware teams to analyze and debug embedded firmware</li>\n<li>Optimizing and developing new PHY training algorithms using system level modeling tools</li>\n<li>Collaborating closely with analog, digital, and hardware teams to ensure overall system integrity</li>\n<li>Bridging the gap between pre- and post-silicon verification to ensure best-in-class customer support</li>\n<li>Developing and deploying tests on silicon as part of bring up plan with extensive knowledge of the design internals</li>\n<li>Reproducing silicon failures on FPGA/Emulation to identify root causes</li>\n<li>Mentoring and coaching engineering teams, fostering technical excellence and knowledge sharing across the organization.</li>\n<li>Collaborating with cross-functional groups and customers to resolve challenges, ensure quality design, and meet aggressive project milestones.</li>\n<li>Driving continuous improvement in functional and performance testing on hardware and test-chips, and leading architectural refinements based on analysis.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Enhancing cross-functional collaboration to improve product quality and end customer satisfaction.</li>\n<li>Evolving/adopting and integrating best-in-class methodologies within the organization for fast silicon bring-up</li>\n<li>Standardizing and optimizing workflows to increase efficiency and compliance.</li>\n<li>Accelerating product innovation and time-to-market by establishing best practices to bridge the gap between architecture and physical implementation using system modeling, functional simulation emulation, and system integration.</li>\n<li>Driving cross-team synergy, technical mentorship, and a culture of continuous learning and inclusivity.</li>\n<li>Directly impact customer success by providing expert guidance, technical support, and innovative solutions.</li>\n<li>Champion diversity and inclusion, ensuring a respectful and opportunity-rich workplace for all team members.</li>\n</ul>\n<p>What You&#39;ll Need:</p>\n<ul>\n<li><p>15+ years of experience in Firmware, ASIC design, verification, system validation, and technical leadership roles.</p>\n</li>\n<li><p>Be results driven</p>\n</li>\n<li><p>Proven leadership in developing, optimizing, and verifying SW/HW using UVM-based co-verification environment.</p>\n</li>\n<li><p>Advanced scripting proficiency in Shell, Perl, Python, and C++ for workflow automation and process improvement.</p>\n</li>\n<li><p>In-depth knowledge of system-level validation for high-speed interface PHY</p>\n</li>\n<li><p>Proven track record of working cross-functionally and driving issues to closure</p>\n</li>\n<li><p>Knowledge of mixed-signal design</p>\n</li>\n<li><p>Experience in working in cross-functional collaborations</p>\n</li>\n<li><p>Be an excellent communicator and a beacon for change</p>\n</li>\n<li><p>Excellent debugging, analytical, and problem-solving skills</p>\n</li>\n<li><p>Working knowledge of scripting in languages such as Python and/or Perl</p>\n</li>\n<li><p>Good understanding of DFT, ATPG, and design for debug techniques and their application in testing of silicon</p>\n</li>\n<li><p>Good interpersonal skills, ability &amp; desire to work as a standout colleague</p>\n</li>\n</ul>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>Inclusion and Diversity:</p>\n<p>Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.</p>\n<p>#LI-DP1</p>\n<p>Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access &amp; opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact <a href=\"mailto:hr-help-canada@synopsys.com\">hr-help-canada@synopsys.com</a>.</p>\n<p>Benefits:</p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. 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