At Synopsys, we value diversity and inclusion. We are committed to creating a workplace where everyone feels valued and supported to do their best work.

Responsibilities: Assist SiCADA instructor in developing VDM (Verilog Design Methodology) & ADV (Advanced Design Verification) homework specifications. Assist in reviewing ADV course materials, including SVTB (SystemVerilog Testbench) and UVM (Universal Verification Methodology), and update the course content. Serve as a teaching assistant for the VDM and ADV courses, helping to answer student questions and grade assignments. Support SoC implementation course especially STA and UPF teaching assistance if possible.

Benefits: Professional development opportunities Collaborative and dynamic work environment Flexible work arrangements

Hiring Journey at Synopsys: Apply Phone Screen Interview Offer Onboarding Welcome!

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big_They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Staff Engineer in our Analog Design team, you will be responsible for designing and developing full custom analog circuit macros for high-speed SERDES PHY IP.

Your responsibilities will include designing and developing full custom analog circuit macros for high-speed SERDES PHY IP, including transceivers, voltage/current-mode drivers, PLLs, DLLs, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, and clock data recovery circuits.

You will also collaborate with cross-functional teams locally and globally to refine circuit implementations and achieve optimal power, area, and performance targets.

In addition, you will ensure analog sub-block performance adheres to SerDes standards and architecture specification documents.

You will lead verification strategies using advanced simulator features to guarantee the highest quality design outcomes.

You will oversee physical layout processes to minimize parasitic effects, device stress, and process variations.

You will present simulation data for peer and customer reviews, and document design features and test plans.

You will consult on electrical characterization and support the integration of your circuit within the SerDes IP product.

You will handcraft high-performance clock and data paths using digital/CMOS logic cells and verify timing margins with SPICE and STA tools.

You will address ESD and latch-up design verification, crosstalk coupling impacts, and ensure robust mixed-signal analog design.

The impact you will have includes accelerating development of high-performance silicon chips critical to emerging technologies like AI, IoT, and 5G.

You will optimize chip designs for power, cost, and performance, helping customers reduce project schedules by months.

You will advance Synopsys' leadership in high-speed interface IP and mixed-signal design innovation.

You will contribute to the creation of next-generation processes and models for manufacturing advanced chips.

You will support global collaboration, knowledge sharing, and technical excellence across teams and sites.

You will enhance customer satisfaction by delivering reliable, scalable, and high-quality analog IP solutions.

You will drive technical best practices and mentor junior engineers, strengthening the team's capabilities.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We are seeking a highly skilled engineer with a strong background in system-on-chip (SOC) architecture and development.

With significant experience in advanced nodes and complex SOC projects, you excel at translating technical requirements into innovative, robust solutions.

You are comfortable navigating all stages of SOC design—from architecture and RTL development through to tapeout and post-silicon validation.

Your technical expertise is matched by your collaborative spirit, allowing you to work effectively within cross-functional teams and mentor junior engineers.

You’re adept at engaging directly with customers, understanding their needs, and delivering tailored solutions that drive their success.

Responsibilities

• Lead SOC development projects from architectural definition through post-silicon validation and customer delivery.

• Provide technical guidance and mentorship to engineering teams, supporting micro-architecture and RTL development.

• Collaborate directly with customers to address their specific requirements and deliver tailored solutions.

• Manage key stages of SOC development, including design verification, DFT, physical design, and tapeout management.

• Work closely with partners on software, firmware, and packaging to ensure seamless integration of solutions.

• Participate in occasional travel and on-site engagements at customer premises to support project execution.

Impact

• Drive the successful delivery of advanced SOC projects across automotive, aerospace, and high-performance computing sectors.

• Enhance Synopsys’ reputation as an industry leader in SOC design and innovation.

• Mentor and support engineering talent, fostering a culture of continuous improvement and technical excellence.

• Increase customer satisfaction by providing high-quality, high-performance SOC solutions.

• Contribute to successful tapeouts and product launches, expanding Synopsys’ impact in the semiconductor industry.

• Shape the development of smart, connected devices through your technical expertise and collaborative approach.

Requirements

• BSEE, MSEE, or Ph.D. in Electrical and/or Computer Engineering.

• At least 8 years of experience in SOC-level architecture and RTL development.

• Strong proficiency in SOC system architecture, micro-architecture, RTL development, design verification, DFT, and tapeout management.

• Solid understanding of high-performance computing architectures for mobile, data center, automotive, and edge computing SOCs.

• Experience with interconnect options (Arteris NOC, AMBA AXI, CXL, etc.) and SOC standard interfaces (PCIe, DDR, HBM, MIPI CSI/DSI, SPI, I2C).

• Implementation knowledge of CPU architectures (RISCV, ARC, X86, ARM).

• Hands-on experience with workflow tools (git, gitlab, github)

• Ability to travel and work on-site as needed; eligibility for government security clearances is a plus.

Team

You will join the System Solutions team, a group of passionate engineers dedicated to enabling customers with end-to-end SOC designs in advanced technologies.

The team delivers comprehensive tool flows, develops innovative design methodologies, and provides customer-specific assistance.

Our collaborative environment encourages continuous learning, knowledge sharing, and technical excellence, supporting customers from start-ups to industry leaders across a wide range of applications.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include:

• Managing the full SOC development lifecycle, including micro-architecture, RTL design, verification, DFT, physical design, and tapeout management.
• Collaborating with partners on software, firmware, and packaged part solutions, ensuring seamless integration and delivery.
• Occasionally traveling and working on-site at customer premises to support project execution and strengthen customer relationships.

As a Principal Engineer, you will shape Synopsys' role as a trusted partner for advanced SOC design across multiple industries, including automotive, aerospace, and high-performance computing. You will advance the adoption of cutting-edge technologies and design methodologies in customer projects. You will mentor and develop engineering talent, fostering technical excellence and innovation within the team.

To succeed in this role, you will need:

• BSEE, MSEE, or Ph.D. in Electrical and/or Computer Engineering.
• Minimum 10 years of experience in SOC-level architecture and RTL development.
• Proficiency in SOC system architecture, micro-architecture, RTL development, design verification, DFT, and tapeout management.
• Expertise in high-performance computing architectures for mobile, data center, automotive, and edge computing SOCs.
• In-depth knowledge of interconnect options (Arteris NOC, AMBA AXI, CXL, etc.) and SOC standard interfaces (PCIe, DDR, HBM, MIPI CSI/DSI, SPI, I2C).
• Implementation experience with CPU architectures (RISCV, ARC, X86, ARM).
• Hands-on experience with workflow tools (git, gitlab, github).
• Ability to travel and work on-site as needed; eligibility for government security clearances is a plus.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15391

Remote Eligible

No

Date Posted

02/23/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a seasoned analog design professional with a passion for pushing technology boundaries. With over a decade of hands-on experience in analog IC design, you thrive in fast-paced, collaborative environments and are motivated by technical challenges. Your expertise in Multi-Gbps NRZ & PAM4 SERDES IP and familiarity with the latest FinFET and gate-all-around process nodes set you apart as a leader in the field. You are adept at translating complex SerDes standards into innovative, high-performance circuit architectures and are comfortable navigating the intricacies of transistor-level design, system-level budgeting, and analog/digital co-design.

You excel at mentoring peers, sharing knowledge, and advocating for design excellence. Your strong analytical skills allow you to quickly identify architectural bottlenecks and propose effective solutions. You are detail-oriented, balancing deep technical focus with a strategic view of project goals and timelines. Communication is one of your strengths—whether presenting simulation data, documenting design features, or collaborating across multidisciplinary teams, you articulate complex ideas clearly to both technical and non-technical audiences.

Beyond your technical expertise, you are committed to continuous learning and growth, staying abreast of industry trends and emerging technologies. You value diversity and inclusion, recognizing that great ideas come from a variety of perspectives. Your proactive and adaptable approach ensures you thrive in dynamic, innovative environments where your contributions drive meaningful impact.

What You’ll Be Doing:

• Reviewing SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.

• Investigating and architecting circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.

• Collaborating with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.

• Overseeing and guiding the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.

• Presenting and reviewing simulation data with internal teams and external stakeholders, including industry panels and customer reviews.

• Documenting design features, test plans, and results, and consulting on electrical characterization and post-silicon analysis for product enhancements.

• Analyzing customer silicon data to identify design improvement opportunities and proposing solutions for post-silicon updates.

The Impact You Will Have:

• Drive innovation in high-speed analog/mixed-signal design, enabling next-generation connectivity solutions.

• Shape the architectural direction of SERDES IP, influencing industry standards and future product offerings.

• Enhance the performance, power efficiency, and reliability of Synopsys’ silicon IP portfolio.

• Mentor and elevate the technical capabilities of team members, fostering a culture of excellence and continuous learning.

• Directly contribute to successful customer deployments by addressing post-silicon challenges and ensuring robust field performance.

• Strengthen Synopsys’ market leadership in advanced process nodes and high-speed communication technologies.

What You’ll Need:

• MTech/MS with 4+ years or BTech/BS with 5+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).

• Proven expertise with FinFET technologies and CMOS tape-outs.

• Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.

• Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).

• Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.

• Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).

• Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.

• Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.

• Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).

• Excellent communication and documentation skills.

Who You Are:

• Collaborative and open-minded, eager to share knowledge and learn from others.

• Detail-oriented and thorough, with a commitment to delivering high-quality results.

• Analytical thinker with strong problem-solving abilities and a proactive approach.

• Excellent communicator, able to convey complex technical concepts clearly.

• Adaptable and resilient in fast-paced, dynamic environments.

• Committed to fostering an inclusive, innovative, and supportive workplace.

The Team You’ll Be A Part Of:

You’ll join a world-class analog and mixed-signal R&D team at Synopsys, working alongside experts in high-speed IC design, verification, and CAD tool development. The team is collaborative, diverse, and passionate about innovation, with a focus on developing cutting-edge SERDES IP for advanced process nodes. You’ll have access to best-in-class design tools, mentorship, and opportunities for professional growth as you help shape the future of connectivity technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

What is it like to be an Analog Design Engineer at Synopsys?

Arman Shahmuradyan

Analog Design, Manager

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and patern

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What you'll do

Review SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.

Investigate and architect circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.

Collaborate with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.

Oversee and guide the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.

Present and review simulation data with internal teams and external stakeholders, including industry panels and customer reviews.

Document design features, test plans, and results, and consult on electrical characterization and post-silicon analysis for product enhancements.

Analyze customer silicon data to identify design improvement opportunities and propose solutions for post-silicon updates.

What you need

MTech/MS with 7+ years or BTech/BS with 8+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).

Proven expertise with FinFET technologies and CMOS tape-outs.

Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.

Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).

Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.

Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).

Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.

Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.

Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).

Excellent communication and documentation skills.

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What you'll do

You are an accomplished analog and mixed-signal design engineer, passionate about pushing the boundaries of high-speed interface technology. With a strong foundation in Electrical, Electronics, or VLSI Engineering, you have hands-on expertise in custom analog circuit design, particularly in the nanometer CMOS domain.

• Designing and developing high-speed analog and mixed-signal (AMS) circuit macros, including analog front-end transceivers, voltage/current-mode drivers, PLLs, DLLs, regulators, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, CDR circuits, and injection-locked loops for High-Speed PHY IP in planar and FinFET CMOS technologies.

What you need

• Bachelor’s degree (BE) plus 3+ years or Master’s degree (MTech) plus 2+ years of relevant experience in mixed-signal analog/custom circuit design, preferably in Electrical/Electronics/VLSI Engineering.

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