Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nWe are seeking a highly skilled and passionate engineer with a keen interest in advancing cutting-edge technology. With at least six years of experience in Physical Implementation (RTL-GDS), you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges. Your proficiency in scripting languages such as Tcl, Python, Unix, and Perl complements your in-depth knowledge of Synopsys implementation tools and flows.
\nYou will drive global customer adoption of Synopsys Implementation products, with a strong focus on RTL to GDS flows. You will deliver world-class customer service by providing enabling solutions and expert support for complex design implementation challenges. You will deeply analyze customer designs, debug issues, and deliver solutions through remote interface, in-house collaboration, or expert onsite visits for critical situations.
\nYou will participate in and lead technical campaigns, including benchmarks, deployments, and solution enablement, to improve usability and drive adoption of new flows and technologies. You will advocate for customers by communicating their needs and feedback to product development teams, influencing the product roadmap and future technologies.
\nYou will contribute technical articles to the Knowledge Base, offering front-line support and self-help guidance for common customer challenges. You will roll out new product methodologies by providing training, hands-on guidance, and ongoing technical support to customers.
\nThe impact you will have is delivering comprehensive technical solutions and support in key customer flagship projects, ensuring successful tape-outs and project milestones. You will lead the deployment of new flows to achieve better PPA (Power, Performance, Area) and improve block-level ownership activities for enhanced QoR (Quality of Results). You will play a pivotal role in enabling new technology nodes and advancing customer design methodologies.
\nYou will drive innovation by addressing design challenges, improving product performance based on customer feedback, and collaborating with R&D on future technologies. You will promote Synopsys tools and solutions to grow market presence and ensure seamless transitions for customers adopting EDA solutions. You will strengthen Synopsys' reputation as a trusted partner and thought leader in the semiconductor industry.
\nWhat You'll Need:
\nWho You Are:
\nThe Team You’ll Be A Part Of:
\nYou will join a dynamic, expert team within the Silicon Design & Verification business at Synopsys, based in Hyderabad. The team is dedicated to driving customer success in high-impact projects, deploying advanced implementation flows, and shaping the future of silicon design. Collaboration, technical excellence, and a commitment to innovation are at the core of our culture. You’ll work closely with customers, R&D, and field teams to deliver transformative solutions and advance industry-leading technologies.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_b4b33752-a69","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/application-engineering-staff-engineer/44408/92113189648","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Implementation Methodologies","Physical Design","Synopsys tools","RTL to GDS flows","Synthesis","Place & Route","Timing analysis","Scripting (TCL, Python, Unix, Perl)","Automation","Tool integration","Debugging"],"x-skills-preferred":["STA","Low Power Flows","Design Planning","Customer-facing roles"],"datePosted":"2026-03-09T11:05:14.988Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Implementation Methodologies, Physical Design, Synopsys tools, RTL to GDS flows, Synthesis, Place & Route, Timing analysis, Scripting (TCL, Python, Unix, Perl), Automation, Tool integration, Debugging, STA, Low Power Flows, Design Planning, Customer-facing roles"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_dd411e27-67e"},"title":"Application Engineering, Sr Engineer","description":"We are seeking a highly skilled and passionate engineer to join our Application Engineering team. As a Sr Engineer, you will be responsible for driving global customer adoption of Synopsys Implementation products by providing expert technical guidance and support throughout the RTL-to-GDS flow.
\nWhat you'll do
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_dd411e27-67e","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/application-engineering-sr-engineer/44408/90746783920","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["implementation methodologies","Synopsys Fusion Compiler","RTL-to-GDS flows","synthesis","place & route","timing analysis"],"x-skills-preferred":["low-power flows","design planning","static timing analysis (STA)"],"datePosted":"2026-03-06T07:23:30.570Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru, Karnataka, India"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"implementation methodologies, Synopsys Fusion Compiler, RTL-to-GDS flows, synthesis, place & route, timing analysis, low-power flows, design planning, static timing analysis (STA)"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_a0da71f6-801"},"title":"Application Engineering, Staff Engineer","description":"We are seeking a highly skilled and passionate engineer with a talent for tackling complex problems and a strong desire to advance cutting-edge technology. With over five years of experience in Physical Implementation RTL-GDS, you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges.
\nWhat you'll do
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_a0da71f6-801","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/application-engineering-staff-engineer/44408/91292167760","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"employee","x-salary-range":null,"x-skills-required":["implementation methodologies","Synopsys Fusion Compiler","RTL-to-GDS flows and methodologies"],"x-skills-preferred":["low-power flows","design planning","static timing analysis (STA)"],"datePosted":"2026-03-06T07:23:18.352Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"implementation methodologies, Synopsys Fusion Compiler, RTL-to-GDS flows and methodologies, low-power flows, design planning, static timing analysis (STA)"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_d67eb356-ada"},"title":"Sr Staff SoC Engineer(Backend)","description":"We are seeking a Sr Staff SoC Engineer(Backend) to assist our customers successfully tape out from Netlist to GDS by using Synopsys EDA tools. The successful candidate will focus on design planning, floorplanning, place and route, parasitic extraction, signal integrity analysis and prevention, IR drop/EM analysis and physical verification (DRC/LVS).
\nWhat you'll do
\nAs a Sr Staff SoC Engineer(Backend), you will be working as a member of the customer's IC design team, leveraging their experience and Synopsys' best practices to have immediate impact on their current project while transferring valuable knowledge for future projects.
\nWhat you need
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_d67eb356-ada","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/shanghai/sr-staff-soc-engineer-backend/44408/91182619008","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"employee","x-salary-range":null,"x-skills-required":["physical design implementation","EDA tools","design planning","floorplanning","place and route","parasitic extraction","signal integrity analysis","IR drop/EM analysis","physical verification"],"x-skills-preferred":["STA","Formal Verification","Synthesis"],"datePosted":"2026-03-06T07:22:10.304Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Shanghai"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"physical design implementation, EDA tools, design planning, floorplanning, place and route, parasitic extraction, signal integrity analysis, IR drop/EM analysis, physical verification, STA, Formal Verification, Synthesis"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_97deabd5-0f0"},"title":"Senior Physical Design Engineer","description":"You are an accomplished engineer with a passion for physical design and a drive to solve complex challenges in advanced semiconductor technology.
\nWhat you'll do
\nEngaging directly with Synopsys customers to understand their design goals, challenges, and requirements, building tailored solutions that maximize their productivity and success.
\nWhat you need
\nBachelor's and/or Master's degree in Electrical Engineering or a related field.
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_97deabd5-0f0","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/sunnyvale/applications-engineering-sr-staff-engineer-rtl-to-gds-fusion-compiler/44408/89670252864","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$157,000-$235,000","x-skills-required":["8-10 years of experience with the complete RTL-to-GDS physical design flow","Proficiency with industry-standard EDA tools: Fusion Compiler, PrimeTime, PrimeClosure, Formality, DSO.ai, FusionAI, ICV, StarRC, RTLA, and familiarity with Innovus, Genus, Tempus, Quantus, Cerebrus","In-depth understanding of synthesis, design planning, place & route, timing closure, power reduction, DRC rules, static timing analysis, and ECO methodologies"],"x-skills-preferred":["Innovative, resourceful, and proactive in driving technical solutions and continuous improvement.","Excellent communicator, able to clearly articulate technical concepts to diverse audiences."],"datePosted":"2025-12-22T11:58:13.476Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Brackley"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"8-10 years of experience with the complete RTL-to-GDS physical design flow, Proficiency with industry-standard EDA tools: Fusion Compiler, PrimeTime, PrimeClosure, Formality, DSO.ai, FusionAI, ICV, StarRC, RTLA, and familiarity with Innovus, Genus, Tempus, Quantus, Cerebrus, In-depth understanding of synthesis, design planning, place & route, timing closure, power reduction, DRC rules, static timing analysis, and ECO methodologies, Innovative, resourceful, and proactive in driving technical solutions and continuous improvement., Excellent communicator, able to clearly articulate technical concepts to diverse audiences.","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":157000,"maxValue":235000,"unitText":"YEAR"}}}]}