Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.
\nAs an Analog Design Engineer at Synopsys, you will be designing DDR I/O circuits for high-performance silicon IP, ensuring compliance with industry standards and customer requirements. You will also develop and optimize analog/mixed-signal circuit architectures, focusing on performance, power, and area efficiency.
\nKey responsibilities include:
\nThe ideal candidate will have a BTech/MTech in Electrical Engineering or related field, with strong knowledge of CMOS processes and deep submicron technology challenges. You should also have hands-on experience with analog/mixed-signal circuit design and layout methodologies, as well as familiarity with ASIC design flow and integration of analog blocks.
\nAt Synopsys, we offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.
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","url":"https://yubhub.co/jobs/job_aeb3214c-459","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/bengaluru/analog-design-engineer-ddr-i-o/44408/93181375136","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["CMOS processes","deep submicron technology challenges","analog/mixed-signal circuit design","layout methodologies","ASIC design flow","integration of analog blocks"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:08.209Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Bengaluru"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"CMOS processes, deep submicron technology challenges, analog/mixed-signal circuit design, layout methodologies, ASIC design flow, integration of analog blocks"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_69e68deb-ea5"},"title":"R&D Engineering, Manager","description":"Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA). They develop and maintain software used in chip design, verification, and manufacturing. The Embedded Memory and Logic Team is responsible for standard and custom embedded SRAMs/ROMs/TCAMs development. As a Manager, you will lead a team and develop SRAM/Register file /TCAM /ROM architectures and circuit implementation techniques. You will also design and implement optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures.
\nResponsibilities:
\nAs a Manager, the individual will be involved in challenging projects and drive it to completion in record time.
\nYou will quickly ramp on the existing flow, understand the challenges, and produce the work plan.
\nYour expertise in deep submicron technology and Finfet, SRAM design, processor design, Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.
\nYou will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.
\nSkills/Experience:
\nFundamentals:
\nAt Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
\nBenefits:
\nXML job scraping automation by YubHub
","url":"https://yubhub.co/jobs/job_69e68deb-ea5","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/r-and-d-engineering-manager/44408/93189758016","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Embedded Memory Design","SRAM/Register File Architectures","Advanced Custom Circuit Implementations","Deep Submicron Technology","Finfet","Perl","Python","Scripting","Automation"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:20:29.675Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Embedded Memory Design, SRAM/Register File Architectures, Advanced Custom Circuit Implementations, Deep Submicron Technology, Finfet, Perl, Python, Scripting, Automation"}]}