<?xml version="1.0" encoding="UTF-8"?>
<source>
  <jobs>
    <job>
      <externalid>6eb810f3-99d</externalid>
      <Title>Layout Design, Staff Engineer-16003</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>As a Layout Design Engineer, you will be designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces. You will collaborate with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.</p>
<p>Responsibilities:</p>
<ul>
<li>Designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces.</li>
<li>Collaborating with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.</li>
<li>Performing floor planning, layout entry, and comprehensive verification to ensure design quality and compliance with foundry rules.</li>
<li>Applying advanced techniques to mitigate signal integrity issues, ESD, and latch-up risks, including differential routing, shielding, and substrate biasing.</li>
<li>Optimizing layouts for reliability, matching, and minimizing parasitic effects such as EM and IR drop.</li>
<li>Supporting design porting activities to enable seamless migration of layouts across multiple foundry nodes and technology platforms.</li>
<li>Documenting layout methodologies, best practices, and validation results to support knowledge sharing and continuous improvement.</li>
</ul>
<p>Requirements:</p>
<ul>
<li>Bachelor or advanced degree in Electrical or Computer Engineering (or equivalent) with a solid background in transistor-level design.</li>
<li>5+ years of experience in analog and mixed-signal CMOS layout design, including complex integrated circuits.</li>
<li>Expertise in deep submicron CMOS technologies and layout effects (matching, reliability, proximity, EM, IR, etc.).</li>
<li>Proficiency in layout floor planning, verification, and quality validation using industry-standard EDA tools.</li>
<li>Strong knowledge of signal integrity, ESD, and latch-up mitigation techniques.</li>
<li>Familiarity with UNIX operating systems and scripting languages (TCL, Python) is a plus.</li>
<li>Experience with Synopsys EDA tools is highly desirable.</li>
</ul>
<p>Who You Are:</p>
<ul>
<li>Detail-oriented and quality-focused, with a commitment to delivering robust and reliable designs.</li>
<li>Excellent communicator, able to articulate technical concepts clearly to diverse audiences.</li>
<li>Collaborative team player who builds productive relationships and networks effectively.</li>
<li>Self-motivated, organized, and able to manage multiple priorities in a dynamic environment.</li>
<li>Strong problem-solving skills and critical judgment, with a proactive approach to overcoming challenges.</li>
<li>Adaptable and eager to learn new technologies and methodologies.</li>
</ul>
<p>The Impact You Will Have:</p>
<ul>
<li>Accelerate the development of cutting-edge silicon IP, enabling faster integration of advanced capabilities into SoCs.</li>
<li>Enhance the performance, reliability, and manufacturability of high-speed interface solutions for next-generation applications.</li>
<li>Reduce time-to-market and risk for customers by delivering high-quality, validated layout designs.</li>
<li>Contribute to the innovation of analog and mixed-signal design methodologies within a global team.</li>
<li>Support the creation of differentiated products that power the Era of Smart Everything, from AI to IoT and beyond.</li>
<li>Foster a culture of collaboration, knowledge sharing, and technical excellence within the team and across the organization.</li>
</ul>
<p>The Team You&#39;ll Be A Part Of:</p>
<p>You will join a dynamic, international team focused on developing high-speed SerDes physical interfaces and supporting analog blocks for advanced SoC solutions. Our team values innovation, collaboration, and technical excellence, working closely with circuit designers, verification engineers, and global partners to deliver industry-leading silicon IP. We foster a supportive environment where knowledge sharing and continuous learning are encouraged, and where your contributions will directly impact the success of our products and customers.</p>
<p>Rewards and Benefits:</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>CMOS circuit layout, high-speed SerDes physical interfaces, deep submicron CMOS technologies, layout effects, signal integrity, ESD, latch-up mitigation, UNIX operating systems, scripting languages, Synopsys EDA tools</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a leading provider of electronic design automation (EDA) software and intellectual property (IP) solutions.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/ottawa/layout-design-staff-engineer-16003/44408/92625958368</Applyto>
      <Location>Ottawa</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
    <job>
      <externalid>cc76d9ba-dc2</externalid>
      <Title>Staff Layout Design Engineer</Title>
      <Description><![CDATA[<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>
<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>
<p><strong>We Are:</strong></p>
<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>
<p><strong>You Are:</strong></p>
<p>You are a passionate and detail-oriented engineer who thrives in the fast-paced world of advanced semiconductor layout. You possess a deep understanding of analog and mixed-signal CMOS design principles, with a particular focus on high-speed SerDes interfaces. Your expertise is backed by a solid academic foundation and practical experience, enabling you to tackle complex layout challenges with confidence.</p>
<p><strong>What You’ll Be Doing:</strong></p>
<ul>
<li>Drive layout development for high-speed SerDes physical interfaces and complex analog/mixed-signal CMOS blocks.</li>
</ul>
<ul>
<li>Lead the complete layout design process, including floorplanning, verification, and quality assurance, with a strong emphasis on reliability and manufacturability.</li>
</ul>
<ul>
<li>Port designs across multiple foundry nodes, ensuring optimal performance and compliance with technology-specific requirements.</li>
</ul>
<ul>
<li>Implement advanced techniques for signal integrity, ESD, and latch-up mitigation, such as differential routing, shielding, and biasing.</li>
</ul>
<ul>
<li>Collaborate closely with design, verification, and manufacturing teams to deliver robust and scalable layout solutions.</li>
</ul>
<ul>
<li>Utilize Synopsys EDA tools and scripting languages (TCL, Python) to automate layout tasks and optimize workflow efficiency.</li>
</ul>
<p><strong>The Impact You Will Have:</strong></p>
<ul>
<li>Enable Synopsys customers to achieve higher performance and reliability in their silicon designs.</li>
</ul>
<ul>
<li>Accelerate the time-to-market for cutting-edge semiconductor products by delivering high-quality, manufacturable layouts.</li>
</ul>
<ul>
<li>Enhance the robustness and scalability of Synopsys IP through meticulous attention to detail and innovative design solutions.</li>
</ul>
<ul>
<li>Drive advancements in deep submicron CMOS technology adoption and integration.</li>
</ul>
<ul>
<li>Foster a collaborative environment that supports knowledge sharing, mentorship, and professional growth.</li>
</ul>
<ul>
<li>Support Synopsys’ leadership in chip design and verification by contributing to the development of industry-leading IP blocks.</li>
</ul>
<p><strong>What You’ll Need:</strong></p>
<ul>
<li>MSc in Electrical/Computer Engineering (or equivalent).</li>
</ul>
<ul>
<li>Minimum 3 years hands-on experience in analog and mixed-signal CMOS layout, including high-speed SerDes interfaces.</li>
</ul>
<ul>
<li>Deep knowledge of deep submicron CMOS technologies and design for reliability (EM/IR, matching, proximity effects).</li>
</ul>
<ul>
<li>Proficiency in layout floorplanning, porting designs across foundry nodes, and implementing signal integrity and ESD mitigation strategies.</li>
</ul>
<ul>
<li>Experience with custom digital and high-speed digital layout, as well as Synopsys EDA tools.</li>
</ul>
<ul>
<li>Strong skills in UNIX environments, including shell scripting and command-line operations.</li>
</ul>
<ul>
<li>Familiarity with scripting languages such as TCL and Python.</li>
</ul>
<p><strong>Who You Are:</strong></p>
<ul>
<li>Excellent problem-solving, organizational, and communication skills.</li>
</ul>
<ul>
<li>Self-motivated and proactive, with the ability to work independently and as part of a team.</li>
</ul>
<ul>
<li>Effective collaborator who values diverse perspectives and fosters inclusive teamwork.</li>
</ul>
<ul>
<li>Adaptable and open to new challenges, with a commitment to continuous improvement.</li>
</ul>
<ul>
<li>Detail-oriented with a strong sense of ownership and pride in delivering high-quality work.</li>
</ul>
<p><strong>The Team You’ll Be A Part Of:</strong></p>
<p>You will join a dynamic, highly skilled team dedicated to developing world-class analog and mixed-signal IP for Synopsys’ global customer base. The team is focused on pushing the boundaries of high-speed interface design, reliability, and manufacturability, working together to solve complex challenges and deliver industry-leading solutions.</p>
<p><strong>Rewards and Benefits:</strong></p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>MSc in Electrical/Computer Engineering, Analog and mixed-signal CMOS layout, High-speed SerDes interfaces, Deep submicron CMOS technologies, Design for reliability, Layout floorplanning, Porting designs across foundry nodes, Signal integrity and ESD mitigation strategies, Custom digital and high-speed digital layout, Synopsys EDA tools, UNIX environments, Shell scripting and command-line operations, Scripting languages such as TCL and Python</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys provides electronic design automation (EDA) software and intellectual property (IP) to the semiconductor and electronics industries.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/moreira/staff-layout-design-engineer/44408/93269033040</Applyto>
      <Location>Moreira</Location>
      <Country></Country>
      <Postedate>2026-04-05</Postedate>
    </job>
  </jobs>
</source>