At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, powering self-driving cars, cloud infrastructure, and learning machines.

You Are:

A Staff-level analog/MS engineer who owns complex designs end-to-end, influences architecture, and mentors others. You balance performance, reliability, and schedule in advanced CMOS and communicate clearly across teams.

If you are excited by the prospect of shaping high-speed connectivity in AI, cloud, automotive, and beyond - and you seek to empower some of the world's most advanced systems - this role is your opportunity to make a meaningful impact.

What You'll Be Doing:

• Taking end-to-end ownership of critical analog and mixed-signal blocks in high-speed SERDES designs
• Making architectural and circuit-level tradeoffs to optimize power, performance, area, and reliability
• Defining, verifying, and documenting testbenches for rigorous pre-silicon validation
• Leading custom analog layout coordination, ensuring parasitic awareness and post-layout optimization
• Driving robustness and quality sign-off processes, including PVT, mismatch, aging, reliability, and yield analysis
• Aligning system-level interfaces and usability considerations for seamless integration
• Executing silicon bring-up, characterization, and correlation against design specifications
• Providing technical leadership, mentorship, and guidance within a collaborative, multidisciplinary team

What You'll Need:

• MS/PhD in Electronics/Computer Engineer or equivalent; typically 7+ years or equivalent Staff-level impact
• Deep analog/MS in deep sub-micron CMOS; signal integrity/noise/jitter
• Proven architecture tradeoffs and production silicon experience
• Strong custom analog layout collaboration; post-layout optimization
• Excellent communication; ability to influence across teams

The Team You'll Be A Part Of:

You will join the IP and System Solutions Group, a cornerstone of Synopsys' mission to enable the industry's most advanced silicon. The SERDES team is renowned for developing high-speed interface IP, deployed across a wide range of applications and technology nodes. This multidisciplinary group collaborates closely to deliver high-performance, power-efficient chips, optimizing power, performance, and area (PPA) while accelerating time-to-market. You'll work alongside experts in architecture, circuit design, layout, and system integration, fostering innovation and excellence in every project.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

XML job scraping automation by YubHub