{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/data-converters"},"x-facet":{"type":"skill","slug":"data-converters","display":"Data Converters","count":2},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_2d03187e-307"},"title":"Principal Analog Design Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>You are an expert in high-speed analog design, with hands-on experience in wireline or optical SerDes above 200GBaud. You excel with PLLs, ILOs, DLLs, and phase mixers, as well as transmitters, serializers, optical drivers, receiver analog front ends, TIAs, and data converters.</p>\n<p>Designing advanced SerDes and clocking circuits for ultra-high-speed data.\nDeveloping transmitters, serializers, and optical drivers.\nCreating receiver analog front ends and TIAs.\nOptimizing signal integrity and power usage.\nCollaborating across global teams.\nMentoring junior engineers.</p>\n<p>Enable next-gen connectivity solutions.\nStrengthen Synopsys&#39; technology leadership.\nAccelerate product innovation and time-to-market.\nImprove reliability and performance of industry-leading chips.\nFoster technical growth across teams.\nInfluence industry standards.</p>\n<p>Our ideal candidate has a BSEE with at least 8+ years of direct industry experience. They must have extensive analog/SerDes IC design experience above 200GBaud, expertise with PLLs, DLLs, ILOs, phase mixers, and related circuits, proficiency in EDA tools and advanced process technologies, strong signal integrity and layout skills, and lab validation and debugging experience.</p>\n<p>Collaborative and proactive leader.\nDetail-oriented problem solver.\nEffective technical communicator.\nInnovative and curious.\nSupportive mentor.</p>\n<p>Join an elite analog design team focused on high-speed connectivity and SerDes IP, collaborating globally to deliver breakthrough solutions.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_2d03187e-307","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hillsboro/principal-analog-design-engineer/44408/90398128160","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":"$165000-$247000","x-skills-required":["high-speed analog design","wireline or optical SerDes above 200GBaud","PLLs","ILOs","DLLs","phase mixers","transmitters","serializers","optical drivers","receiver analog front ends","TIAs","data converters","EDA tools","advanced process technologies","signal integrity","layout skills","lab validation","debugging"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:19:38.572Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hillsboro"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"high-speed analog design, wireline or optical SerDes above 200GBaud, PLLs, ILOs, DLLs, phase mixers, transmitters, serializers, optical drivers, receiver analog front ends, TIAs, data converters, EDA tools, advanced process technologies, signal integrity, layout skills, lab validation, debugging","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":165000,"maxValue":247000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_de112d07-e65"},"title":"Analog Design, Principal Engineer","description":"<p><strong>Overview</strong></p>\n<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15231</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/15/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<ul>\n<li>An experienced and passionate Analog and Mixed-Signal (A&amp;MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.</li>\n</ul>\n<ul>\n<li>You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<ul>\n<li>Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.</li>\n</ul>\n<ul>\n<li>You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.</li>\n</ul>\n<ul>\n<li>You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.</li>\n</ul>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Leading NRZ/PAM4 Serdes analog design transceiver solutions.</li>\n</ul>\n<ul>\n<li>Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.</li>\n</ul>\n<ul>\n<li>Collaborating with silicon test and debug experts for Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Driving innovation in mixed-signal advanced analog serdes design.</li>\n</ul>\n<ul>\n<li>Enhancing the performance and efficiency of high-speed physical interfaces.</li>\n</ul>\n<ul>\n<li>Contributing to the development of cutting-edge technology in High Speed PHY IP.</li>\n</ul>\n<ul>\n<li>Improving quality and robustness of design through collaboration and Sim2Sil correlation.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.</li>\n</ul>\n<ul>\n<li>Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.</li>\n</ul>\n<ul>\n<li>Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .</li>\n</ul>\n<ul>\n<li>Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.</li>\n</ul>\n<ul>\n<li>Experience with PLL designs and high-speed digital circuit design.</li>\n</ul>\n<ul>\n<li>Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.</li>\n</ul>\n<ul>\n<li>Familiarity with digitally assisted analog circuit techniques.</li>\n</ul>\n<ul>\n<li>Capable to drive technical decision and tradeoff with customer focus</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.</p>\n<p>You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p><strong>Get an idea of what your daily routine <strong>around the office</strong> can be like</strong></p>\n<p>\\ Explore <strong>Noida</strong></p>\n<p>View Map</p>\n<p>---</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_de112d07-e65","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/analog-design-principal-engineer/44408/91802916768","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert","PLL , data converters and SERDES design","mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction","circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes","Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology","silicon test and debug experts to advance quality through Sim2Sil correlation","Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits","Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity ","RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:06:28.077Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert, PLL , data converters and SERDES design, mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction, circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes, Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology, silicon test and debug experts to advance quality through Sim2Sil correlation, Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits, Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity , RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"}]}