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You will work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>Collaborating with local and international teams to develop layouts for complex analog and mixed-signal designs in advanced technology nodes (3nm, 2nm, and beyond).</p>\n<p>Utilizing Synopsys suite of tools and full custom analog layout design tools (e.g., Custom Compiler) to create and optimize circuit layouts.</p>\n<p>Implementing and verifying designs using industry-leading verification tools such as ICV, Calibre and Star-RCXT...</p>\n<p>Developing SERDES sub-circuit layouts (RX, TX, PLL, etc.) and optimizing for signal integrity, including clock/data routes, differential routing, and shielding.</p>\n<p>Applying scripting techniques (TCL, Python, etc.) to automate layout processes and improve workflow efficiency.</p>\n<p>Ensuring designs meet ESD constraints, mitigate latch-up risks, and optimize for reliability issues such as EM and IR drop.</p>\n<p>Designing custom digital logic cell layouts and associated logic path routing for mixed-signal integration.</p>\n<p>Refining layouts to minimize parasitic effects and enhance matching, reliability, and performance.</p>\n<p>Delivering high-quality IP that powers next-generation semiconductor products for global customers.</p>\n<p>Enabling Synopsys to maintain leadership in advanced technology node design and IP development.</p>\n<p>Contributing to the creation of reliable, high-performance silicon chips used in communications.</p>\n<p>Driving innovation in analog and mixed-signal layout methodologies and tools.</p>\n<p>Enhancing cross-team collaboration and knowledge sharing to accelerate project timelines and improve outcomes.</p>\n<p>Ensuring robust design practices that minimize risk and maximize reliability, meeting stringent industry standards.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_1f955980-d4b","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/porto-salvo/analog-and-mixed-signal-layout-designer/44408/93465071552","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog and mixed-signal layout design","full custom analog layout tools","verification tools","scripting languages","custom digital layout and associated routing techniques"],"x-skills-preferred":["TCL","Python","ICV","Calibre","Star-RCXT"],"datePosted":"2026-04-05T13:16:48.393Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Porto Salvo"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog and mixed-signal layout design, full custom analog layout tools, verification tools, scripting languages, custom digital layout and associated routing techniques, TCL, Python, ICV, Calibre, Star-RCXT"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_c572da30-7d1"},"title":"Staff Analog & Mixed Signal Layout Engineer","description":"<p>We are seeking a highly skilled and collaborative engineer with a deep passion for analog and mixed-signal design. Your expertise spans advanced CMOS layout techniques, and you thrive in environments where technical complexity and innovation intersect. You bring hands-on experience in layout design, and you’re comfortable working both independently and as part of diverse, global teams.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<ul>\n<li>Collaborating with local and global teams to develop advanced analog and mixed-signal CMOS circuit layouts using Synopsys’ industry-leading tools.</li>\n<li>Designing layout for SERDES subcircuits (RX, TX, PLL, etc.) with optimization for signal integrity and reliability.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>Knowledge in layout of analog and mixed signal CMOS circuits, including SERDES subcircuits.</li>\n<li>Expertise in signal integrity optimization, ESD constraints, latch-up mitigation, and reliability-focused layout techniques.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_c572da30-7d1","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/mississauga/staff-analog-and-mixed-signal-layout-engineer-15471/44408/92433698128","x-work-arrangement":"onsite","x-experience-level":"staff","x-job-type":"employee","x-salary-range":null,"x-skills-required":["layout of analog and mixed signal CMOS circuits","signal integrity optimization","ESD constraints","latch-up mitigation","reliability-focused layout techniques"],"x-skills-preferred":["custom digital layout","parasitic layout effect optimization"],"datePosted":"2026-03-06T07:36:12.913Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Mississauga, Ontario, Canada"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"layout of analog and mixed signal CMOS circuits, signal integrity optimization, ESD constraints, latch-up mitigation, reliability-focused layout techniques, custom digital layout, parasitic layout effect optimization"}]}