Key responsibilities include:

• Driving customer success on RTL-to-GDSII implementation flows with focus on PPA (performance, power, area)
• Owning/leading technical execution on key topics: physical synthesis, timing closure, CTS, routing
• Troubleshooting complex design/tool issues, reproducing, isolating, and driving resolution with R&D
• Building/standardizing methodologies; automating workflows using Tcl and Python (or Perl/Tcl where applicable)
• Delivering technical trainings, best practices, application notes, and customer-facing presentations
• Collaborating cross-functionally with R&D, Product, and worldwide AE teams to influence features and improve product quality

Requirements include:

• BS/MS in Electrical Engineering, Computer Engineering, or related field, with 5+ years relevant experience
• Strong hands-on knowledge of RTL-to-GDSII and backend implementation
• Experience with Fusion Compiler, IC Compiler II (ICC2) or similar P&R tools
• Solid understanding of timing analysis/closure, CTS, routing, and advanced nodes
• Scripting skills in Tcl and Python for automation and productivity
• Strong communication skills in English; comfortable working with global customers/teams

You'll be successful if you're analytical, structured, and calm under pressure when debugging complex issues, proactive in driving alignment across customers, AE peers, and R&D, comfortable juggling multiple priorities while maintaining high execution quality, and curious and continuously learning new flows, nodes, and AI-enabled productivity approaches.

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You are a highly motivated Principal Engagement Applications Engineer with over 15 years of hands-on experience in synthesis or place and route (P&R). You have a robust understanding of the most advanced CPU/GPU/NPU designs and are eager to work closely with R&D on driving product development and developing advanced HPC reference flow.

What You’ll Be Doing: Collaborating with R&D teams to drive product development and advanced HPC reference flow development for wide deployment. Demonstrating differentiated PPA results on CPU/GPU/NPU designs to showcase our technology’s superiority. Providing technical support to key global customers to address PPA bottlenecks and design challenges on the most advanced HPC designs. Aggressively engaging in worldwide critical benchmarks and deployments to ensure the highest quality and performance of designs. Utilizing scripting languages such as Perl and Tcl for automation and optimization tasks. Staying updated with the latest advancements in ASIC design flow, VLSI, and CAD development to continually improve processes.

The Impact You Will Have: Enhancing the performance and efficiency of advanced CPU, GPU, and NPU designs. Driving innovations that contribute to the success of Synopsys’ cutting-edge technologies. Providing critical support that helps key customers overcome their PPA challenges. Contributing to the development of new features that keep Synopsys at the forefront of the industry. Improving the overall quality and reliability of our products through meticulous design and optimization. Fostering strong relationships with global customers, reinforcing Synopsys’ reputation as a leader in chip design and software security.

What You’ll Need: Application Engineer working with customer on project enablement. PD Engineer with 5+ Yrs of experience worked on Synopsys tools in Placement, CTS and Route areas. Good communication and presentation skills as this is a customer facing role

Who You Are: Excellent communicator with strong command of English. Highly motivated and self-driven. Detail-oriented with a focus on quality and performance. A team player who thrives in collaborative environments. Adaptable and eager to learn new technologies and methodologies.

The Team You’ll Be A Part Of: You will join a dynamic and innovative team focused on developing and optimizing advanced HPC designs. Our team collaborates closely with R&D to drive technological advancements and provide top-tier support to our global customers. We are passionate about pushing the boundaries of what’s possible in chip design and software security, and we are looking for like-minded individuals to join us on this exciting journey.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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