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This role emphasizes technical leadership, architectural ownership, and cross-team coordination rather than people management.</p>\n<p>Principal Responsibilities:</p>\n<ul>\n<li>Act as the technical owner for a major market data workstream, setting technical direction, defining architecture, and driving execution across the full lifecycle.</li>\n<li>Collaborate with hardware and software teams across divisions to design and build real-time market data processing and distribution systems.</li>\n<li>Lead and drive new technical initiatives for the team, including evaluating technologies, defining standards, and establishing best practices.</li>\n<li>Design and develop systems, interfaces, and tools for historical market data and trading simulations that increase research productivity.</li>\n<li>Architect and implement components of an enterprise market data platform, including components for caching, aggregation, conflation and value-added data enrichment.</li>\n<li>Optimise platform performance using network and systems programming, and advanced low-latency techniques (CPU, NIC, kernel, and application-level tuning).</li>\n<li>Lead the design and maintenance of automated test and benchmark frameworks, and tools for risk management, performance tracking, and system validation.</li>\n<li>Provide technical leadership for the support and operation of both enterprise real-time market data environments, including coordinating internal, vendor, and exchange-driven changes.</li>\n<li>Design and engineer components to automate support and management of the market data platform, including monitoring, real-time and historical metrics collection/visualisation, and self-service administrative/user tools.</li>\n<li>Serve as a primary technical liaison for users of the market data environment (Portfolio Managers, trading desks, and core technology teams), translating requirements into robust technical solutions.</li>\n<li>Lead the enhancement of processes and workflows for operating the market data platform (release/deployment, incident management and remediation, exchange notification handling, defining and enforcing SLAs).</li>\n<li>Mentor and influence other engineers through code reviews, design reviews, and hands-on guidance, fostering a culture of technical excellence and accountability.</li>\n</ul>\n<p>Qualifications / Skills Required:</p>\n<ul>\n<li>Degree in Computer Science or a related field with a strong background in data structures, algorithms, and object-oriented programming in modern C++.</li>\n<li>Deep understanding of Linux system internals and networking, especially in low-latency and high-throughput environments.</li>\n<li>Strong knowledge of CPU architecture and the ability to leverage CPU capabilities for performance optimisation.</li>\n<li>Demonstrated experience acting as a technical lead or senior engineer owning complex systems or workstreams end-to-end (design, delivery, and operations).</li>\n<li>Able to prioritise and make trade-offs in a fast-moving, high-pressure, constantly changing environment; strong sense of urgency, ownership, and follow-through.</li>\n<li>Strong belief in and practice of extreme ownership, with a track record of taking accountability for systems in production.</li>\n<li>Effective communication and stakeholder management skills: able to work closely with business and technology users, understand their needs, and drive appropriate technical solutions.</li>\n<li>Experience building solutions on cloud environments such as GCP and AWS.</li>\n<li>Knowledge of additional programming languages such as Java, Python, or scripting (Perl, shell).</li>\n<li>Technical background in application development on complex market data systems (e.g., Bloomberg, Thomson Reuters, etc.).</li>\n<li>Experience supporting market data environments within a global organisation, including internally developed DMA feed handlers and distribution infrastructure.</li>\n<li>Strong understanding of market data concepts and functionality, including data models (fields/messages), protocols (e.g., snapshot + delta), order book representations (L1/L2/L3), recovery, and reliability.</li>\n<li>Hands-on Site Reliability Engineering or DevOps experience, including system administration, automation, measurement, and release/deployment management.</li>\n<li>Experience with monitoring, metrics, and command/control tooling for distributed market data platforms, with the ability to evaluate existing solutions and drive enhancements across development and operations.</li>\n<li>Ability to operate with a high level of thoroughness and attention to detail, demonstrating strong ownership of deliverables and production systems.</li>\n</ul>\n<p>Millennium pays a total compensation package which includes a base salary, discretionary performance bonus, and a comprehensive benefits package. The estimated base salary range for this position is $175,000 to $250,000, which is specific to New York and may change in the future. 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impact in the semiconductor industry.</li>\n</ul>\n<ul>\n<li>Shape the development of smart, connected devices through your technical expertise and collaborative approach.</li>\n</ul>\n<p><strong>Requirements</strong></p>\n<ul>\n<li>BSEE, MSEE, or Ph.D. in Electrical and/or Computer Engineering.</li>\n</ul>\n<ul>\n<li>At least 8 years of experience in SOC-level architecture and RTL development.</li>\n</ul>\n<ul>\n<li>Strong proficiency in SOC system architecture, micro-architecture, RTL development, design verification, DFT, and tapeout management.</li>\n</ul>\n<ul>\n<li>Solid understanding of high-performance computing architectures for mobile, data center, automotive, and edge computing SOCs.</li>\n</ul>\n<ul>\n<li>Experience with interconnect options (Arteris NOC, AMBA AXI, CXL, etc.) and SOC standard interfaces (PCIe, DDR, HBM, MIPI CSI/DSI, SPI, I2C).</li>\n</ul>\n<ul>\n<li>Implementation knowledge of CPU architectures (RISCV, ARC, X86, ARM).</li>\n</ul>\n<ul>\n<li>Hands-on experience with workflow tools (git, gitlab, github)</li>\n</ul>\n<ul>\n<li>Ability to travel and work on-site as needed; eligibility for government security clearances is a plus.</li>\n</ul>\n<p><strong>Team</strong></p>\n<p>You will join the System Solutions team, a group of passionate engineers dedicated to enabling customers with end-to-end SOC designs in advanced technologies.</p>\n<p>The team delivers comprehensive tool flows, develops innovative design methodologies, and provides customer-specific assistance.</p>\n<p>Our collaborative environment encourages continuous learning, knowledge sharing, and technical excellence, supporting customers from start-ups to industry leaders across a wide range of applications.</p>\n<p><strong>Rewards and Benefits</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.</p>\n<p>Our total rewards include both monetary and non-monetary offerings.</p>\n<p>Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7a8bb995-8f1","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/tokyo/soc-engineering-sr-staff-engineer/44408/92568976544","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["SOC system architecture","micro-architecture","RTL development","design verification","DFT","tapeout management","high-performance computing architectures","interconnect options","SOC standard interfaces","CPU architectures","workflow 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This role exists to drive the development of industry-leading prototyping systems, enabling faster time-to-market for cutting-edge ASIC designs.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<p>As a Sr Staff Engineer, you will be responsible for designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.</p>\n<ul>\n<li>Designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.</li>\n<li>Leading the digital design process for Xilinx and Altera FPGAs, utilizing tools such as Xilinx Vivado to optimize workflows.</li>\n<li>Driving all phases of the project lifecycle, including requirements gathering, development, implementation, and test case creation.</li>\n</ul>\n<p><strong>What you need</strong></p>\n<ul>\n<li>MS/PhD in Computer Science, Electrical Engineering, or related field from a reputed institute, with 10+ years of relevant experience.</li>\n<li>Expertise in RTL development using Verilog or System Verilog, with a strong background in digital design principles.</li>\n<li>Hands-on experience with Xilinx and Altera FPGA platforms, including familiarity with Xilinx Vivado and related tools.</li>\n<li>Advanced problem-solving and debugging skills, especially in digital verification, emulation, and prototyping environments.</li>\n<li>Experience with scripting languages such as Tcl, Python, Perl, and a solid understanding of system and CPU architecture (DMA, interrupts, etc.).</li>\n<li>Exposure to embedded system development and interface protocols (USB, PCIe, DDR, AXI).</li>\n</ul>\n<p><strong>Why this matters</strong></p>\n<ul>\n<li>Accelerate the development of industry-leading prototyping systems, enabling faster time-to-market for cutting-edge ASIC designs.</li>\n<li>Enhance the functionality and reliability of Synopsys&#39; HAPS and ProtoCompiler products through innovative hardware and software solutions.</li>\n<li>Drive customer satisfaction by delivering robust, scalable, and user-friendly prototyping tools that meet diverse engineering needs.</li>\n<li>Contribute to Synopsys&#39; reputation as a leader in verification and prototyping technology, influencing industry standards and practices.</li>\n</ul>\n<p><strong>What you&#39;ll be doing</strong></p>\n<ul>\n<li>Designing and developing advanced FPGA-based prototyping solutions, integrating both hardware and software components.</li>\n<li>Leading the digital design process for Xilinx and Altera FPGAs, utilizing tools such as Xilinx Vivado to optimize workflows.</li>\n<li>Driving all phases of the project lifecycle, including requirements gathering, development, implementation, and test case creation.</li>\n<li>Developing and maintaining complex EDA software for high-performance prototyping systems.</li>\n<li>Implementing digital debug, verification, emulation, and prototyping strategies to ensure robust and reliable designs.</li>\n<li>Creating RTL for interfaces such as USB, PCIe, DDR, and AXI, and overseeing full design flow including verification and lab bring-up.</li>\n<li>Supporting and enhancing existing products and features, responding to evolving customer needs with innovative solutions.</li>\n<li>Exploring and implementing new approaches to address current and future challenges, continuously learning and applying new technologies.</li>\n<li>Mentoring junior engineers, providing guidance and support to foster growth and technical excellence within the team.</li>\n<li>Collaborating independently and within cross-functional teams, networking with senior internal and external stakeholders.</li>\n</ul>\n<p><strong>Why you&#39;ll love this role</strong></p>\n<ul>\n<li>Opportunity to work on cutting-edge projects and technologies.</li>\n<li>Collaborative and dynamic work environment.</li>\n<li>Professional growth and development opportunities.</li>\n<li>Recognition and rewards for outstanding performance.</li>\n<li>Comprehensive benefits and compensation package.</li>\n</ul>\n<p><strong>What you&#39;ll need to succeed</strong></p>\n<ul>\n<li>Strong technical skills and knowledge in digital design, verification, and prototyping.</li>\n<li>Excellent problem-solving and debugging skills.</li>\n<li>Strong communication and collaboration skills.</li>\n<li>Ability to work independently and as part of a team.</li>\n<li>Adaptability and flexibility in a fast-paced environment.</li>\n</ul>\n<p><strong>How to apply</strong></p>\n<ul>\n<li>If you&#39;re ready to make a meaningful impact and help shape the next generation of prototyping systems, Synopsys is the place for you.</li>\n<li>Apply now to join our team of talented engineers and contribute to the development of industry-leading prototyping solutions.</li>\n</ul>\n<p><strong>Benefits</strong></p>\n<ul>\n<li>Comprehensive medical and healthcare plans that work for you and your family.</li>\n<li>Time away, including company holidays, ETO, and FTO programs.</li>\n<li>Family support, including maternity and paternity leave, parenting resources, adoption and surrogacy assistance.</li>\n<li>ESPP, with a 15% discount on Synopsys common stock.</li>\n<li>Retirement plans, varying by region and country.</li>\n<li>Competitive salaries.</li>\n</ul>\n<p><strong>How we hire</strong></p>\n<ul>\n<li>We&#39;re proud to be an equal opportunities employer and welcome applications from diverse candidates.</li>\n<li>Our hiring process typically involves a phone screen, followed by an interview with the hiring team.</li>\n<li>We&#39;re committed to providing a supportive and inclusive work environment, where everyone has the opportunity to grow and succeed.</li>\n</ul>\n<p><strong>Join our team</strong></p>\n<ul>\n<li>If you&#39;re passionate about innovation and technology, and want to be part of a dynamic and collaborative team, apply now to join Synopsys.</li>\n<li>We can&#39;t wait to hear from you!</li>\n</ul>\n<p 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