<?xml version="1.0" encoding="UTF-8"?>
<source>
  <jobs>
    <job>
      <externalid>9d8d91da-52f</externalid>
      <Title>Enterprise Risk Management Lead</Title>
      <Description><![CDATA[<p>About Gusto</p>
<p>At Gusto, we&#39;re on a mission to grow the small business economy. We handle the hard stuff , payroll, health insurance, 401(k)s, and HR , so owners can focus on their craft and their customers.</p>
<p>With teams in Denver, San Francisco, and New York, we support more than 400,000 small businesses nationwide and are building a workplace that reflects the people we serve.</p>
<p>All full-time employees receive competitive base pay, benefits, and equity (RSUs) , because everyone who helps build Gusto should share in its success. Offer amounts are determined by role, level, and location. Learn more about our Total Rewards philosophy.</p>
<p>AI is a fundamental part of how work gets done at Gusto. We expect all team members to actively engage with AI tools relevant to their role and grow their fluency as the technology evolves. AI experience requirements vary by role and will be assessed during the interview process.</p>
<p>About the Role:</p>
<p>Gusto is scaling our AI-powered risk function to support a complex, multi-entity business operating in highly regulated environments. As the Enterprise Risk Management Lead, you will own and operate Gusto&#39;s Enterprise Risk and Third Party Risk Management programs , built AI-first, designed to scale, and built to enable the business to move fast without breaking things.</p>
<p>This is a People Empowerer (manager) role. You balance hands-on program leadership with managing and developing a team of compliance professionals. You navigate the tension between &quot;doing the work&quot; and &quot;leading the work&quot; , contributing directly to complex, high-impact programs while ensuring your team delivers with excellence.</p>
<p>You are a change agent who influences how automated risk management gets done at Gusto, models AI-enabled ways of working, and helps others grow their own capabilities in the process.</p>
<p>You will champion the adoption of AI, machine learning, and process automation across risk monitoring, control testing, incident management, and reporting , and you will partner with Product, Data Science, and Engineering to make it explainable, adopted, compliant, and scalable.</p>
<p>Here’s what you’ll do day-to-day:</p>
<p>You manage initiatives that are complex in both scope and impact, influencing the strategic direction of Gusto&#39;s compliance risk management framework.</p>
<p>You apply a deep understanding of the regulatory landscape and how it intersects with Gusto&#39;s business model to proactively design and lead cross-functional risk programs.</p>
<p>You translate complex risk topics into clear, actionable guidance that senior leaders can immediately understand and operationalize.</p>
<p>You lead cross-functional working groups, align divergent perspectives, and drive cohesive progress toward shared goals , with minimal oversight.</p>
<p>As a PE, you balance individual risk and compliance contribution with team leadership.</p>
<p>You manage operations, professional development, resource allocation, and performance , while staying close enough to the work to be a credible, hands-on partner to your team and stakeholders.</p>
<p>You model responsible AI use, and act as a source of knowledge and mentorship , supporting your team&#39;s AI journey and helping others apply it responsibly and effectively.</p>
<p>AI-Enabled Risk Operations, Innovation &amp; Transformation</p>
<p>This is how you and your team operate , not a side project.</p>
<ul>
<li>Champion the adoption of AI, machine learning, process automation, and advanced analytics to improve risk monitoring, control testing, and reporting across ERM, TPRM, and broader compliance functions</li>
</ul>
<ul>
<li>Lead the integration of AI and automation into every phase of the risk lifecycle: vendor assessments, document ingestion and analysis, continuous monitoring and alerting, risk scoring, prioritization, and trend analysis</li>
</ul>
<ul>
<li>Build intelligent risk monitoring and evaluation systems , including auto-tagging for risk issues, audit requests, and regulatory changes , that improve real-time visibility and eliminate manual effort across the enterprise risk portfolio</li>
</ul>
<ul>
<li>Drive the digitalization of risk tools including RCSAs, KRIs, incident reporting, and audit tracking , transforming periodic, reactive processes into continuous intelligence systems with live leading and lagging indicators that enable real-time decision-making</li>
</ul>
<ul>
<li>Partner with Product, Data Science, and Engineering to define requirements for AI-driven workflows, decisioning engines, and dashboards , ensuring explainability, auditability, and regulatory defensibility of all AI-enabled risk decisions</li>
</ul>
<ul>
<li>Design and build intelligent dashboards and reporting tools that deliver real-time risk visibility and decision-quality insights to senior leadership and cross-functional stakeholders</li>
</ul>
<ul>
<li>Design AI workflows with appropriate validation loops, human-in-the-loop checkpoints, and guardrails , ensuring outputs are reliable, governable, and meet regulatory standards before being used to frame risks, recommendations, or decisions</li>
</ul>
<ul>
<li>Stay current on AI advancements and emerging technologies and proactively integrate new capabilities into team operations to increase velocity and scale</li>
</ul>
<ul>
<li>Model responsible AI use , supporting ICs in their AI journeys and fostering a culture of intentional experimentation, accountability, and continuous improvement</li>
</ul>
<p>Enterprise Risk Management</p>
<ul>
<li>Design, implement, and continuously improve Gusto&#39;s ERM framework, ensuring alignment with best practices and Gusto&#39;s stage of growth and strategic priorities across all entities</li>
</ul>
<ul>
<li>Define and maintain Gusto&#39;s enterprise risk taxonomy, risk appetite statement, and key risk indicators spanning operational, regulatory, technology, financial, and reputational risk domains</li>
</ul>
<ul>
<li>Lead Gusto&#39;s Enterprise Risk Management process , driving integration of risk practices across business functions, promoting a proactive risk culture, and ensuring incident management, root cause analysis, and lessons learned are systematically captured in an automated, AI forward way.</li>
</ul>
<ul>
<li>Apply AI-assisted insights to enterprise risk datasets to surface systemic patterns, validate assumptions, prioritize risks, and deliver proactive, data-driven advisory to senior leadership</li>
</ul>
<ul>
<li>Monitor the regulatory landscape (OCC, FDIC, CFPB, SEC, FINRA, GDPR, NIST, ISO, SOC) and leverage AI to proactively incorporate changes before they become compliance gaps</li>
</ul>
<ul>
<li>Act as a key advisor to senior compliance leadership , translating complex risk findings into clear, actionable recommendations with minimal oversight</li>
</ul>
<p>Third Party Risk Management (TPRM)</p>
<ul>
<li>Design, implement, and independently manage a high-impact, AI-first TPRM program with clear milestones, progress tracking, and measurable outcomes across all Gusto entities</li>
</ul>
<ul>
<li>Manage the full third-party risk lifecycle , onboarding and risk profiling, periodic assessments, issue management, corrective action tracking, and offboarding , across suppliers, product partners, contractors, service providers, and cloud service providers , and do so in an AI and automated way.</li>
</ul>
<ul>
<li>Maintain a centralized, authoritative vendor risk inventory and risk register, ensuring real-time visibility into Gusto&#39;s third-party risk posture</li>
</ul>
<ul>
<li>Conduct periodic AI-driven audits and reviews of third-party compliance with contractual obligations and regulatory standards, identifying patterns that inform continuous program improvement</li>
</ul>
<ul>
<li>Serve as the central orchestrator across Compliance, Security, Legal, Procurement, IT, and GRC for proactive and reactive third-party incident management</li>
</ul>
<ul>
<li>Own Gusto&#39;s TPRM policy and maintain comprehensive documentation , risk assessments, audit findings, corrective actions , ensuring full accountability and traceability</li>
</ul>
<p>People Leadership &amp; Team Development</p>
<ul>
<li>Balance individual compliance contribution with team leadership , managing operations, professional development, resource allocation, and performance while staying close to the work</li>
</ul>
<ul>
<li>Coach and develop ICs toward next</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>hybrid</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>Risk Management, Compliance, AI, Machine Learning, Process Automation, Advanced Analytics, Risk Monitoring, Control Testing, Incident Management, Reporting, Vendor Assessments, Document Ingestion, Analysis, Continuous Monitoring, Alerting, Risk Scoring, Prioritization, Trend Analysis, RCSAs, KRIs, Incident Reporting, Audit Tracking, AI-Driven Workflows, Decisioning Engines, Dashboards, Explainability, Auditability, Regulatory Defensibility, Intelligent Dashboards, Reporting Tools, Real-Time Risk Visibility, Decision-Quality Insights, Senior Leadership, Cross-Functional Stakeholders, Validation Loops, Human-in-the-Loop Checkpoints, Guardrails, Reliable Outputs, Governable Outputs, Regulatory Standards, AI Advancements, Emerging Technologies, Velocity, Scale, Responsible AI Use, ICs, AI Journeys, Accountability, Continuous Improvement, ERM Framework, Best Practices, Gusto&apos;s Stage of Growth, Strategic Priorities, Enterprise Risk Taxonomy, Risk Appetite Statement, Key Risk Indicators, Operational Risk, Regulatory Risk, Technology Risk, Financial Risk, Reputational Risk, Root Cause Analysis, Lessons Learned, Automated AI Forward Way, AI-Assisted Insights, Systemic Patterns, Assumptions, Proactive Advisory, Regulatory Landscape, OCC, FDIC, CFPB, SEC, FINRA, GDPR, NIST, ISO, SOC, Proactive Incorporation, Compliance Gaps, Key Advisor, Senior Compliance Leadership, Complex Risk Findings, Clear Actionable Recommendations, Minimally Supervised, High-Impact AI-First TPRM Program, Clear Milestones, Progress Tracking, Measurable Outcomes, Third-Party Risk Lifecycle, Onboarding, Risk Profiling, Periodic Assessments, Issue Management, Corrective Action Tracking, Offboarding, Suppliers, Product Partners, Contractors, Service Providers, Cloud Service Providers, AI and Automated Way, Centralized Vendor Risk Inventory, Risk Register, Real-Time Visibility, Third-Party Risk Posture, Periodic Audits, Reviews, Contractual Obligations, Patterns, Continuous Program Improvement, Central Orchestrator, Security, Legal, Procurement, IT, GRC, Proactive Incident Management, Reactive Incident Management, TPRM Policy, Comprehensive Documentation, Risk Assessments, Audit Findings, Corrective Actions, Traceability, Balance Individual Contribution, Team Leadership, Operations, Professional Development, Resource Allocation, Performance, Close to the Work, Coach and Develop ICs, Next Level</Skills>
      <Category>Legal</Category>
      <Industry>Finance</Industry>
      <Employername>Gusto</Employername>
      <Employerlogo>https://logos.yubhub.co/gusto.com.png</Employerlogo>
      <Employerdescription>Gusto is a company that provides payroll, health insurance, 401(k)s, and HR services to small businesses.</Employerdescription>
      <Employerwebsite>https://www.gusto.com/</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://job-boards.greenhouse.io/gusto/jobs/7746997</Applyto>
      <Location>Denver, CO;San Francisco, CA;New York, NY</Location>
      <Country></Country>
      <Postedate>2026-04-18</Postedate>
    </job>
    <job>
      <externalid>5f6e02d7-438</externalid>
      <Title>Protection Relay Engineer</Title>
      <Description><![CDATA[<p>We&#39;re seeking an experienced Protection Relay Engineer/Specialist to join our Memphis team. This role will focus on the design, configuration, commissioning, and support of SEL-based protection and automation systems for high-reliability power infrastructure supporting our AI compute facilities.</p>
<p>Responsibilities:</p>
<ul>
<li>Perform detailed configuration and programming of SEL protective relays (e.g., SEL-751, SEL-787, SEL-700G, etc.) using acSELerator QuickSet and SEL Grid Configurator.</li>
<li>Develop and implement custom automation logic in SEL RTAC platforms using acSELerator Architect, IEC 61131-3 languages (Structured Text, Ladder Logic), and SEL Logic Engine.</li>
<li>Design and test SCADA communication protocols including DNP3, Modbus, IEC 61850 GOOSE/MMS, and SEL protocols over Ethernet and serial interfaces.</li>
<li>Conduct factory acceptance testing (FAT), site acceptance testing (SAT), relay setting validation, and end-to-end functional verification.</li>
<li>Generate comprehensive documentation: one-line diagrams, logic diagrams, setting files, HMI screens, and commissioning reports.</li>
<li>Provide technical support during system energization, troubleshooting, and post-commissioning maintenance.</li>
<li>Collaborate with project managers, SCADA engineers, and field crews to ensure seamless integration and schedule compliance.</li>
<li>Remain current with SEL firmware updates, NERC CIP cybersecurity requirements, and industry best practices.</li>
</ul>
<p>Basic Qualifications:</p>
<ul>
<li>Advanced proficiency in acSELerator QuickSet, Architect, and RTAC Web Interface.</li>
<li>Demonstrated ability to develop complex automation sequences, synchrophasor applications, and remedial action schemes.</li>
<li>Expertise in relay event analysis using SEL SynchroWAVE and Event Reporter.</li>
<li>Familiarity with IEC 61850 configuration via SCL files (SCD, ICD, CID).</li>
<li>SEL Authorized Training (e.g., SEL-5030, SEL-5033) preferred; PE license a plus but not required.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>acSELerator QuickSet, SEL Grid Configurator, acSELerator Architect, IEC 61131-3 languages, SEL Logic Engine, DNP3, Modbus, IEC 61850 GOOSE/MMS, SEL protocols, Ethernet, serial interfaces, factory acceptance testing, site acceptance testing, relay setting validation, end-to-end functional verification, comprehensive documentation, one-line diagrams, logic diagrams, setting files, HMI screens, commissioning reports, technical support, system energization, troubleshooting, post-commissioning maintenance, project managers, SCADA engineers, field crews, schedule compliance, SEL firmware updates, NERC CIP cybersecurity requirements, industry best practices</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>xAI</Employername>
      <Employerlogo>https://logos.yubhub.co/xai.com.png</Employerlogo>
      <Employerdescription>xAI creates AI systems to understand the universe and aid humanity in its pursuit of knowledge.</Employerdescription>
      <Employerwebsite>https://www.xai.com/</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://job-boards.greenhouse.io/xai/jobs/4965890007</Applyto>
      <Location>Memphis, TN</Location>
      <Country></Country>
      <Postedate>2026-04-18</Postedate>
    </job>
    <job>
      <externalid>d3007d70-703</externalid>
      <Title>R&amp;D Engineering, Staff Engineer</Title>
      <Description><![CDATA[<p>You are a seasoned engineering leader with a passion for advancing semiconductor technology. Your expertise in analog and mixed-signal layout—especially in advanced CMOS, FinFET, and GAA nodes—sets you apart. You thrive in environments where innovation, collaboration, and precision are valued, and you are driven by the challenge of defining scalable methodologies that empower global engineering teams. Your strategic mindset enables you to translate complex technical challenges into actionable workflows, ensuring the highest standards of quality and efficiency. You are skilled at bridging communication between interdisciplinary teams and stakeholders, delivering clarity and aligning objectives. Mentoring is part of your DNA; you take pride in fostering growth in junior engineers and sharing knowledge across the organization. You are comfortable managing multiple priorities, adapting to fast-paced changes, and driving collective excellence. Your technical insight is matched by your organizational skills and your ability to inspire teams to embrace new methodologies and innovative solutions. If you’re committed to pushing the boundaries of analog/mixed-signal IP development and are ready to make a meaningful impact at a global leader in semiconductor technology, Synopsys is your next destination.</p>
<p>Defining and deploying advanced layout methodologies that accelerate execution, enhance quality, and promote standardized best practices across global teams.</p>
<p>Gathering customer requirements, translating them into clear technical specifications, and ensuring these specifications drive methodology and workflow development.</p>
<p>Developing end-to-end workflows that enhance quality, consistency, and efficiency across Synopsys IP development.</p>
<p>Collaborating closely with cross-functional teams—including Circuit Design, Physical Design, CAD, Product Engineering, and Quality—to enable adoption of methodologies for advanced technology nodes.</p>
<p>Providing technical leadership across distributed teams, aligning planning and execution to meet project goals.</p>
<p>Defining, tracking, and analyzing performance metrics to drive continuous improvement and influence future methodology strategy.</p>
<p>Creating and maintaining comprehensive documentation to ensure clarity, scalability, and long-term usability.</p>
<p>Engaging with internal partners and external customers as a trusted technical representative of the Methodology Team.</p>
<p>Leading innovation in analog/mixed-signal layout flows, combining industry-standard tools and internal automation to validate and evolve methodologies.</p>
<p>Mentoring and supporting junior engineers, enabling skill growth and knowledge sharing across the organization.</p>
<p>Accelerating and improving the reliability of analog/mixed-signal IP development at advanced nodes.</p>
<p>Driving alignment and quality across global design teams through standardized workflows and strong technical leadership.</p>
<p>Strengthening collaboration and knowledge transfer across engineering disciplines.</p>
<p>Influencing organizational and product strategy through methodology innovation and customer insights.</p>
<p>Increasing transparency and maintainability of workflows through high-quality documentation.</p>
<p>Contributing to reinforcing Synopsys’ position as a leader in semiconductor design technology.</p>
<p>5+ years in analog/mixed-signal layout or ASIC physical design, with experience in FinFET and advanced nodes strongly preferred.</p>
<p>Deep knowledge of analog and mixed-signal CMOS layout, device-level considerations, and chip-level integration.</p>
<p>Strong expertise with industry tools such as Synopsys Custom Compiler, Cadence Virtuoso, ICV, Calibre, and related verification flows.</p>
<p>Proven ability to gather customer requirements and convert them into technical specifications.</p>
<p>Demonstrated experience building workflows that improve IP quality, efficiency, and consistency.</p>
<p>Strong organizational skills, attention to detail, and ability to manage multiple complex initiatives simultaneously.</p>
<p>Excellent communication, leadership, and mentoring abilities.</p>
<p>Innovative and proactive in solving complex engineering challenges.</p>
<p>Collaborative, with a talent for working across interdisciplinary teams.</p>
<p>Strategic thinker who balances technical depth with big-picture vision.</p>
<p>Effective communicator, able to convey technical concepts to diverse audiences.</p>
<p>Mentor and coach, dedicated to supporting the growth of others.</p>
<p>Adaptable and resilient in fast-paced and evolving environments.</p>
<p>You will join the Mixed Signal IP Technology and Methodology Team—an advanced physical design group focused on developing full-custom analog and ASIC layout solutions for high-speed integrated circuits. The team is known for its collaborative culture, cutting-edge tool ecosystem, and strong commitment to innovation. As a Staff Engineer, you’ll work closely with experienced layout engineers, CAD specialists, and circuit designers to help define best-in-class methodologies and deliver high-quality solutions for Synopsys’ global customers.</p>
<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>
<p>Synopsys Canada ULC values the diversity of our workforce. We are committed to provide access &amp; opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact <a href="mailto:hr-help-canada@synopsys.com">hr-help-canada@synopsys.com</a>.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>staff</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>analog and mixed-signal layout, FinFET and advanced nodes, Synopsys Custom Compiler, Cadence Virtuoso, ICV, Calibre, verification flows, customer requirements, technical specifications, methodology and workflow development, cross-functional teams, distributed teams, performance metrics, comprehensive documentation, innovation in analog/mixed-signal layout flows</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a global leader in semiconductor design technology, providing software and IP solutions for chip design, verification, and manufacturing.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/mississauga/r-and-d-engineering-staff-engineer-15233/44408/91711017792</Applyto>
      <Location>Mississauga</Location>
      <Country></Country>
      <Postedate>2026-03-09</Postedate>
    </job>
    <job>
      <externalid>3bbd064e-4be</externalid>
      <Title>Senior Firmware Design Engineer</Title>
      <Description><![CDATA[<p>We are seeking a Senior Firmware Design Engineer to join our team. As a Senior Firmware Design Engineer, you will be responsible for designing, developing, and debugging bare metal firmware for advanced mixed-signal and high-speed SerDes products.</p>
<p><strong>What you&#39;ll do</strong></p>
<ul>
<li>Design, develop, and debug bare metal firmware for advanced mixed-signal and high-speed SerDes products.</li>
<li>Collaborate with digital and mixed-signal design teams to define firmware requirements and system integration strategies.</li>
</ul>
<p><strong>What you need</strong></p>
<ul>
<li>BSEE or MSEE with a minimum of 5 years of experience in bare metal firmware development and silicon testing.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>full-time</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>bare metal firmware development, silicon testing, digital design principles, structured firmware development, verification, comprehensive documentation processes</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys is a technology company that drives the innovations that shape the way we live and connect. They lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/bengaluru/staff-firmware-design-engineer/44408/92139734464</Applyto>
      <Location>Bengaluru, Karnataka, India</Location>
      <Country></Country>
      <Postedate>2026-03-06</Postedate>
    </job>
  </jobs>
</source>