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    <job>
      <externalid>73267a26-22d</externalid>
      <Title>Sr Staff R&amp;D Software Engineer - Mixed Signal Simulation</Title>
      <Description><![CDATA[<p>You are a seasoned engineer with a passion for pushing the boundaries of technology. With 6 - 15 years of experience, you bring a wealth of knowledge in software architecture. You excel in C/C++ software development, digital simulation, compiler optimizations and your strong background in design patterns, data structures, and algorithms sets you apart. Your expertise in Verilog, SystemVerilog, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success.</p>
<p>You will be designing, developing, and troubleshooting core algorithms for simulation. You will collaborate with local and global teams to enhance performance for GLS, AMS simulation. You will engage in pure technical roles focused on software development and architecture. You will utilize your knowledge of digital simulation flows and EDA tools to drive innovation. You will leverage your expertise in Verilog, SystemVerilog, and VHDL to develop cutting-edge solutions.</p>
<p>You will drive technological innovation in chip design and verification. You will enhance the performance and quality of simulation tools used globally. You will solve complex compiler optimizations problems to improve simulation performance. You will collaborate with cross-functional teams to achieve project milestones. You will pioneer new software architectures that set industry standards.</p>
<p style="margin-top:24px;font-size:13px;color:#666;">XML job scraping automation by <a href="https://yubhub.co">YubHub</a></p>]]></Description>
      <Jobtype>employee</Jobtype>
      <Experiencelevel>senior</Experiencelevel>
      <Workarrangement>onsite</Workarrangement>
      <Salaryrange></Salaryrange>
      <Skills>C/C++, digital simulation, compiler optimizations, Verilog, SystemVerilog, Unix/Linux, gdb, Valgrind</Skills>
      <Category>Engineering</Category>
      <Industry>Technology</Industry>
      <Employername>Synopsys</Employername>
      <Employerlogo>https://logos.yubhub.co/careers.synopsys.com.png</Employerlogo>
      <Employerdescription>Synopsys develops and maintains software used in chip design, verification, and manufacturing.</Employerdescription>
      <Employerwebsite>https://careers.synopsys.com</Employerwebsite>
      <Compensationcurrency></Compensationcurrency>
      <Compensationmin></Compensationmin>
      <Compensationmax></Compensationmax>
      <Applyto>https://careers.synopsys.com/job/noida/sr-staff-r-and-d-software-engineer-mixed-signal-simulation/44408/93988432800</Applyto>
      <Location>Noida</Location>
      <Country></Country>
      <Postedate>2026-04-24</Postedate>
    </job>
  </jobs>
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