Our internship programs offer real-world projects, hands-on experience, and opportunities to collaborate with passionate teams globally. At Synopsys, interns dive into real-world projects, gaining hands-on experience while collaborating with our teams worldwide,and having fun in the process! You'll have the freedom to share your ideas, unleash your creativity, and explore your interests. This is your opportunity to bring your solutions to life and work with cutting-edge technology that shapes not only the future of innovation but also your own career path.
\nJob Description:
\nAs an intern in the Analog Design Engineering team, you will design, verify, and validate high-performance, high-speed analog circuits, focusing on next-generation Phase Lock Loops (PLLs) and related blocks for world-leading SOCs in advanced CMOS technologies. You will participate in the design of Delay Locked Loops (DLL), phase mixers, and custom digital blocks used in SERDES interfaces. You will contribute to test bench creation, specification generation, analog circuit design, and layout optimization. You will assist with documentation, design debugging, and silicon evaluation to ensure robust and reliable circuit performance. You will engage with cross-functional teams, sharing ideas and collaborating to solve complex engineering challenges.
\nRequirements:
\nProgram Facts:
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\nOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nYou will be a part of a fast-growing analog and mixed-signal R&D team, dedicated to developing high-speed analog integrated circuits in the most advanced FinFET/GAA process nodes. You'll interact with a global, dynamic, multi-cultural, and cross-functional design team, collaborating with experts in various fields to create innovative solutions for high-speed communications.
\nAs a Staff Engineer, you will be responsible for:
\nDeveloping and/or validating analog circuits considering electrical specifications and reliability constraints.\nDocumenting simulation results and analyzing performance.\nEvaluating the impact of parasitic effects related to layout implementations and working with the layout team to minimize such effects, improving performance, power, and area.\nDefining and planning analog design activities for high-speed SerDes products.\nCollaborating with a global team of engineers to integrate and verify design solutions.\nContinuously learning and applying the latest advancements in FinFET/GAA process nodes to enhance design efficiency.
\nYou will contribute to the development of high-speed SerDes products that enable high-performance chip-to-chip communications. You will enhance the performance, power efficiency, and reliability of analog integrated circuits in advanced CMOS technologies. You will support the integration of more capabilities into System-on-Chip (SoC) designs, accelerating time-to-market for innovative products.
\nYou will be a part of a dynamic, multicultural, and cross-functional design team, collaborating with experts in various fields to create innovative solutions for high-speed communications.
\nThe ideal candidate will have a good understanding of CMOS technologies and analog circuit design principles. They will have strong analysis, problem-solving, and organizational skills. They will have experience in analog and mixed-signal block design, with a focus on high-speed SERDES. They will be proficient in documenting and analyzing simulation results. They will be familiar with IC design packages and UNIX operating systems.
\nYou will be a collaborative team player who thrives in a global, multicultural environment. You will be an effective communicator with strong written and verbal skills in English. You will be a proactive and self-motivated individual with a passion for innovation and continuous learning. You will be an analytical thinker with the ability to tackle complex design challenges and find creative solutions. You will be a detail-oriented engineer who values precision and accuracy in their work.
\nYou will be rewarded with a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
\nInclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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\nAs a Layout Design Engineer, you will be designing and implementing complex analog and mixed-signal CMOS circuit layouts, with a focus on high-speed SerDes physical interfaces. You will collaborate with circuit designers to translate schematics into robust, manufacturable layouts that meet performance, power, and area requirements.
\nResponsibilities:
\nRequirements:
\nWho You Are:
\nThe Impact You Will Have:
\nThe Team You'll Be A Part Of:
\nYou will join a dynamic, international team focused on developing high-speed SerDes physical interfaces and supporting analog blocks for advanced SoC solutions. Our team values innovation, collaboration, and technical excellence, working closely with circuit designers, verification engineers, and global partners to deliver industry-leading silicon IP. We foster a supportive environment where knowledge sharing and continuous learning are encouraged, and where your contributions will directly impact the success of our products and customers.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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\nThese engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nWe Are:
\nAt Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
\nYou Are:
\nYou are a passionate and detail-oriented engineer who thrives in the fast-paced world of advanced semiconductor layout. You possess a deep understanding of analog and mixed-signal CMOS design principles, with a particular focus on high-speed SerDes interfaces. Your expertise is backed by a solid academic foundation and practical experience, enabling you to tackle complex layout challenges with confidence.
\nWhat You’ll Be Doing:
\nThe Impact You Will Have:
\nWhat You’ll Need:
\nWho You Are:
\nThe Team You’ll Be A Part Of:
\nYou will join a dynamic, highly skilled team dedicated to developing world-class analog and mixed-signal IP for Synopsys’ global customer base. The team is focused on pushing the boundaries of high-speed interface design, reliability, and manufacturability, working together to solve complex challenges and deliver industry-leading solutions.
\nRewards and Benefits:
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.
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