Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.
\nYou are a passionate analog design engineer eager to make a tangible impact in pioneering semiconductor technologies. You thrive in fast-paced environments and enjoy collaborating with diverse, talented teams. Your expertise in CMOS circuit design and deep submicron process technologies makes you a valuable contributor to high-performance chip solutions. You are detail-oriented, analytical, and consistently deliver quality results. Your curiosity drives you to explore industry standards such as JEDEC DDR interfaces, and you are comfortable navigating the complexities of ASIC design flows. You communicate clearly and effectively, bridging technical discussions between cross-functional teams. You embrace continuous learning and are always ready to tackle new challenges, leveraging your experience in analog/mixed signal circuitry and ESD concepts. You are motivated by the opportunity to influence the next generation of silicon products and are committed to excellence in every aspect of your work. Your collaborative spirit, adaptability, and drive for innovation make you a perfect fit for Synopsys' world-class engineering community.
\nDesigning DDR I/O circuits for advanced semiconductor products, ensuring alignment with JEDEC interface standards. Implementing CMOS circuit design and layout methodologies to optimize performance and reliability. Collaborating with internal development teams to integrate analog/mixed signal circuitry into ASIC designs. Analyzing and resolving issues related to deep submicron process technologies. Executing assigned circuit design tasks with a focus on product quality and efficiency. Documenting design solutions and communicating technical details clearly to cross-functional stakeholders. Participating in design reviews and contributing to continuous improvement of design flows and practices.
\nAdvance Synopsys' leadership in high-performance DDR interface design for cutting-edge chips. Enhance product reliability and scalability through robust analog design methodologies. Drive innovation in deep submicron process technology applications. Strengthen integration of mixed signal and analog circuitry in ASIC products. Support cross-team collaboration to accelerate product development and delivery. Contribute to Synopsys' reputation for technical excellence and quality in semiconductor solutions.
\nBTech/MTech in Electrical Engineering or related field (MTech+3 years / BTech+5 years experience). Strong knowledge of CMOS processes and deep submicron process technology issues. Expertise in CMOS circuit design and layout methodology; familiarity with analog/mixed signal circuitry. Understanding of basic ESD concepts (a plus). Experience with ASIC design flow and integration. Knowledge of JEDEC DDR interface requirements, DDR timing, ODT, and SDRAM functionality (preferred).
\nAnalytical thinker with strong problem-solving skills. Effective communicator, both written and verbal, for internal team interactions. Collaborative team player, eager to learn and share knowledge. Detail-oriented and quality-focused in all aspects of design. Adaptable and resilient in dynamic project environments.
\nYou will join a highly skilled Analog/Mixed Signal Design team in Bangalore, focused on delivering innovative DDR I/O circuit solutions for ASIC products. The team values creativity, technical rigor, and collaborative problem-solving, working closely with cross-functional groups to drive product excellence and meet industry standards.
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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\nJob Description
\nAs an Analog Mixed-Signal Engineer at Synopsys, you will be responsible for designing and developing high-performance memory interface solutions that power next-generation technologies. You will work closely with cross-functional teams to meet complex design specifications and project goals.
\nResponsibilities
\nImpact
\nRequirements
\nTeam
\nYou will join a world-class engineering team focused on analog and mixed-signal IP development for cutting-edge memory interfaces. Our team thrives on innovation, collaboration, and technical excellence, working closely with global experts to deliver industry-leading solutions for top-tier semiconductor clients. We foster an inclusive and supportive culture where every member's contributions are valued and professional growth is encouraged.
\nRewards and Benefits
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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\nYou Are: You are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a tangible impact in the world of semiconductor innovation. You thrive in collaborative environments, working alongside diverse teams to solve complex technical challenges. With 2+yrs experience and a solid academic background in Electronics or Electrical Engineering, you bring a keen understanding of CMOS processes and are adept at navigating deep submicron technologies.
\nWhat You'll Be Doing: Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability. Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals. Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards. Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies. Contributing to the ASIC design flow, from concept to implementation, including verification and documentation. Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process. Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.
\nThe Impact You Will Have: Accelerate the development of high-performance memory interfaces, integral to next-generation computing platforms. Enhance product quality and reliability by applying best practices in analog circuit design and layout. Drive innovation in deep submicron CMOS technologies, enabling advanced chip functionalities. Contribute to Synopsys' leadership in DDR/HBM IP solutions, helping customers achieve breakthrough results. Foster a culture of collaboration and technical excellence across multidisciplinary teams. Support the delivery of robust, standards-compliant IP that powers industry-leading silicon solutions. Enable seamless integration and performance optimization for customers worldwide.
\nWhat You'll Need: B.Tech/M.Tech degree in Electronics or Electrical Engineering. 2+ years of hands-on experience in CMOS circuit design, preferably with exposure to deep submicron process technologies. Proficiency in analog/mixed signal design methodologies and layout flows. Familiarity with JEDEC DDR interface requirements, DDR Timing, ODT, and SDRAM functionality is a strong plus. Basic understanding of ESD concepts and ASIC design flow. Demonstrated ability to execute assigned circuit design tasks with high quality and efficiency. Strong written and verbal communication skills for effective team interactions.
\nWho You Are: Analytical thinker with strong problem-solving skills. Collaborative and adaptable, thriving in dynamic team settings. Detail-oriented and quality-driven, with a commitment to excellence. Proactive, self-motivated, and eager to learn new technologies. Effective communicator, capable of conveying technical concepts clearly. Resilient and resourceful, able to navigate complex challenges.
\nThe Team You'll Be A Part Of: You will join a highly skilled engineering team specializing in DR I/O circuit design for memory interfaces. The team is focused on developing innovative DDR/HBM solutions, collaborating closely with PHY, package, and system engineers. Together, you will drive advancements in chip performance, reliability, and integration, shaping the future of semiconductor technology.
\nRewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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\nOur team is focused on developing innovative DDR/HBM solutions, collaborating closely with PHY, package, and system engineers. Together, you will drive advancements in chip performance, reliability, and integration, shaping the future of semiconductor technology.
\nKey Responsibilities:
\nRequirements:
\nBenefits:
\nExperience Level: Senior Employment Type: Full-time Workplace Type: Onsite Category: Engineering Industry: Technology Salary Range: Not stated Salary Min: Not stated Salary Max: Not stated Salary Currency: USD Salary Period: Year Required Skills: CMOS circuit design, analog/mixed signal design methodologies, layout flows, JEDEC DDR interface requirements, DDR Timing, ODT, SDRAM functionality, ESD concepts, ASIC design flow Preferred Skills: Not stated
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\nYou are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a meaningful impact through your expertise. With a BTech or MTech and substantial hands-on experience (BTech+5 years / MTech+3 years), you have mastered the nuances of CMOS processes and deep submicron technologies. You enjoy solving complex challenges in DDR I/O circuit design and thrive in collaborative environments where your technical insights drive innovation.
\nDesigning and developing DDR I/O circuits, ensuring robust performance and compliance with industry standards. Collaborating with cross-functional teams on analog and mixed-signal circuit architecture and implementation. Performing circuit simulations, layout reviews, and post-layout analysis to optimize designs for performance and reliability. Integrating ESD protection and addressing deep submicron process challenges in circuit development. Contributing to ASIC design flows and participating in design reviews to ensure quality and manufacturability. Documenting design methodologies, results, and communicating effectively with internal development teams. Interfacing with verification and validation teams to support the testing and debugging of DDR I/O circuits.
\nDeliver innovative DDR I/O circuit designs that enable high-speed, reliable data transfer in advanced silicon products. Enhance product quality and efficiency through rigorous design practices and attention to detail. Drive the adoption of best practices in CMOS and mixed-signal design across teams. Support Synopsys' leadership in chip design by contributing to differentiated IP solutions. Facilitate faster time-to-market for cutting-edge semiconductor products by ensuring robust design and integration. Mentor and collaborate with junior engineers, fostering a culture of excellence and continuous improvement. Strengthen Synopsys' reputation for technical innovation and reliability in the semiconductor industry.
\nBTech+5 years or MTech+3 years in Electrical/Electronics Engineering or related discipline. Expertise in CMOS circuit design and layout methodology, with experience in deep submicron process technologies. Understanding of analog/mixed signal circuitry and basic ESD concepts. Familiarity with ASIC design flow and JEDEC DDR interface standards, including DDR Timing, ODT, and SDRAM functionality. Strong skills in executing assigned circuit design tasks efficiently and to the highest quality standards. Proficiency in circuit simulation tools and layout review processes.
\nDetail-oriented, methodical, and committed to delivering high-quality results. Collaborative and effective in cross-team communication. Adaptable and able to manage multiple priorities in a fast-paced environment. Curious and eager to learn about new technologies and industry trends. Proactive problem-solver with strong analytical skills. Clear communicator, both verbally and in writing.
\nYou will join a dynamic team of analog and mixed-signal engineers focused on developing industry-leading DDR I/O solutions. The team fosters an inclusive culture, values diverse perspectives, and collaborates closely with digital, verification, and layout experts to deliver world-class products. Together, you'll push the boundaries of semiconductor innovation, leveraging collective expertise to solve complex challenges and achieve technical excellence.
\nWe offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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\nWhat you'll do
\nYou are an accomplished analog and mixed-signal design engineer, passionate about pushing the boundaries of high-speed interface technology. With a strong foundation in Electrical, Electronics, or VLSI Engineering, you have hands-on expertise in custom analog circuit design, particularly in the nanometer CMOS domain.
\nWhat you need
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