You are a dedicated engineer with a passion for analog and mixed-signal IC design, eager to push the boundaries of semiconductor technology. You thrive in environments where innovation, precision, and collaboration are key. Your technical expertise is matched by your curiosity and willingness to continuously learn, adapting to new challenges and technologies. You enjoy working hands-on, taking ownership of the design process from conception to silicon validation. With a keen eye for detail and a strong analytical mindset, you excel at optimizing performance and robustness in high-speed interfaces. You are comfortable navigating complex circuit architectures, and your experience allows you to anticipate issues and implement creative solutions. You value open communication and teamwork, working effectively with layout and lab teams in a multicultural setting. Your documentation skills ensure clarity and reproducibility throughout the design cycle. You are motivated by the opportunity to make a tangible impact on industry-leading products, and you seek growth not only in technical depth but also in architectural responsibility. Ultimately, you are a proactive contributor, ready to help Synopsys shape the next generation of high-speed analog solutions.

Design, analyze, and optimize high-speed analog and mixed-signal circuits such as voltage regulators, DACs, AFE/DFE, TX drivers, serializers, and supporting blocks. Conduct detailed circuit behavior analysis, tuning performance and proposing improvements for power, speed, and robustness. Perform timing closure for small digital blocks using NanoTime, ensuring accurate integration with analog designs. Lead technical interactions with layout teams, guiding floorplanning, matching, and parasitic-aware design to achieve block specifications. Participate actively in design reviews, layout reviews, and silicon bring-up processes to ensure quality and reliability. Support lab characterization and debug, correlating simulation results with silicon measurements for optimal validation. Document architectures, design decisions, testbenches, simulation results, and silicon learnings to maintain clarity and foster knowledge sharing.

Advance Synopsys' leadership in high-speed SerDes IP and analog interface technology. Enable the development of state-of-the-art products used across diverse industries, from data centers to automotive. Drive innovation in design methodologies, influencing future product architectures and performance standards. Enhance cross-functional collaboration, ensuring seamless integration between design, layout, and validation teams. Improve product robustness and yield through meticulous analysis, testing, and documentation. Accelerate time-to-market for cutting-edge chips by optimizing design cycles and validation processes. Contribute to a culture of continuous improvement and technical excellence within Synopsys' engineering community.

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As a Staff Engineer in Analog Design, you will be part of a fast-growing team dedicated to developing the highest data rate SerDes IP in advanced FinFET/GAA process nodes. You will design and develop medium complexity analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.

Key Responsibilities:

• Design and develop medium complexity analog circuits for high-speed SerDes products supporting Ethernet and PCIe standards.
• Define and plan analog design activities, setting clear milestones and deliverables for project success.
• Prepare and conduct technical design reviews, identifying improvements, tracking actions, and ensuring best practices are followed.
• Evaluate and minimize the impact of layout parasitic effects by collaborating closely with layout teams, optimizing circuit performance, power, and area.
• Perform silicon correlation with simulation results, analyzing discrepancies and driving design refinements.

Impact:

• Accelerate the development of industry-leading SerDes IP products, supporting diverse markets such as mobile, automotive, cloud computing, HPC, AI, IoT, 5G, and storage, enabling high-speed chip-to-chip communications in next-generation devices.
• Enhance Synopsys' reputation as a provider of silicon-proven IP by delivering reliable, high-performance analog designs.
• Reduce risk for customers by ensuring robust correlation between simulation and silicon, leading to differentiated products in the marketplace.
• Foster innovation and continuous improvement within the analog and mixed-signal R&D team, setting benchmarks for technical excellence.

Requirements:

• M.Sc. degree in Electrical Engineering with 3+ years of experience, or Ph.D. in Electrical Engineering with 1.5+ years of experience.
• Background in CMOS analog circuit design, preferably including ADC, DAC, PLL, Rx, Tx, References, or related areas.
• Familiarity with industry-standard IC design packages and EDA tools.
• Experience working in UNIX operating systems.
• Good written and verbal communication skills in English.
• System-level knowledge of SerDes architecture is a plus.

Team:

You will join Synopsys' fast-growing analog and mixed-signal R&D team, dedicated to developing the highest data rate SerDes IP in advanced FinFET/GAA process nodes. The team is global, dynamic, and cross-functional, working collaboratively to deliver world-class products that power innovations across multiple industries.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You will be comfortable conducting technical reviews, planning design activities, and ensuring that silicon results correlate closely with simulation predictions. Your communication skills will enable you to interact effectively within a global and multi-cultural team, and your organizational abilities will ensure timely delivery of milestones. You will be proactive in problem-solving and continuous improvement, and you will value mentorship, sometimes guiding junior engineers.

You will join Synopsys' fast-growing analog and mixed-signal R&D team, dedicated to developing the highest data rate SerDes IP in advanced FinFET/GAA process nodes. The team is global, dynamic, and cross-functional, working collaboratively to deliver world-class products that power innovations across multiple industries.

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