Key responsibilities include:

• Design Implementation experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing)
• RTL to GDSII full flow experience or knowledge is preferable
• Strong interest and understanding of Advanced Node & Design methodologies are required.
• In-depth Synopsys Back end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced Node, Static Timing Analysis, including noise analysis) experience and knowledge are required.
• Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred
• Back end P&R tools (Fusion Compiler, ICC2, Innovus)
• Excellent verbal and written presentation/communication skills are mandatory.

Requirements include:

• BSEE or equivalent, required with 7+ years of experience, or MSEE, or equivalent with 5+ years of experience.
• Tool knowledge: front end Synthesis and back end PnR tools (Fusion Compiler, ICC2, Design Compiler, Genus),
• Tool knowledge: STA (Primetime, Tempus)

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

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Your primary focus will be on supporting customers in enjoing Synopsys products, specifically in the areas of Place & Route (physical), Synthesis (logical and physical), STA experience and knowledge. Additionally, you will be knowledgeable in multiple domains of design implementation and understand codependency of flow and methodology such as Macro & Standard Cell Placement, Clock Tree Synthesis, Routing, Advanced Timing Optimization techniques.

You will also articulate design methodologies involving Synopsys tools at a very advanced Node (Sub 5nm) using Synopsys Full RTL-to-GDSII solution (Fusion Compiler / IC Compiler II/ICC2).

As a member of our high-performing Customer Application Services team, you will collaborate closely with R&D, sales, and product groups to ensure that Synopsys customers achieve their design goals efficiently and effectively.

Responsibilities:

• Support customers in enjoying Synopsys products, specifically in the areas of Place & Route (physical), Synthesis (logical and physical), STA experience and knowledge.
• Articulate design methodologies involving Synopsys tools at a very advanced Node (Sub 5nm) using Synopsys Full RTL-to-GDSII solution (Fusion Compiler / IC Compiler II/ICC2).
• Collaborate closely with R&D, sales, and product groups to ensure that Synopsys customers achieve their design goals efficiently and effectively.
• Manage multiple customer activities concurrently, and work with Account Managers and AC management to set their priorities.
• Sales support roles include product demonstrations, evaluations, and competitive benchmarking. Customer support roles include training, problem resolution, and technical account management.

Key Qualifications:

• Design Implementation experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing)
• RTL to GDSII full flow experience or knowledge is preferable
• Strong interest and understanding of Advanced Node & Design methodologies are required.
• In-depth Synopsys Back end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced Node, Static Timing Analysis, including noise analysis) experience and knowledge are required.
• Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred
• Excellent verbal and written presentation/communication skills are mandatory.
• Customer sensitivity, the ability to multiplex many issues & set priorities, and the desire to help customers exploit new technologies are essential for success in the position.

Preferred Experience:

• BSEE or equivalent, required with 7+ years of experience, or MSEE, or equivalent with 5+ years of experience.
• Tool knowledge expected: Back end P&R tools (Fusion Compiler, ICC2, Innovus)
• Tool knowledge (preferred): front end Synthesis tools (Fusion Compiler, Design Compiler, Genus),
• Tool knowledge (preferred): STA (Primetime, Tempus)

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What you'll do

• The primary focus of the Physical Design Specialist (PDS) is to support the sale and adoption of Synopsys products to help customers achieve tangible and lasting performance improvements in the cost, quality, and development time for projects.
• In addition, PDS AEs will articulate design methodologies involving Synopsys tools at a very advanced Node (Sub 5nm) using Synopsys Full RTL-to-GDSII solution (Fusion Compiler / IC Compiler II/ICC2).

What you need

• Design Implementation experience should include ASIC design using industry-standard tools (Placement, Optimization, CTS, Routing)
• RTL to GDSII full flow experience or knowledge is preferable
• Strong interest and understanding of Advanced Node & Design methodologies are required.
• In-depth Synopsys Back end tool (Logical and Physical Synthesis, AI methodologies, Timing Closure techniques, Macro Placement, Routing at advanced Node, Static Timing Analysis, including noise analysis) experience and knowledge are required.
• Knowledge of several Clock Tree Synthesis methodologies like H-Tree, MS-CTS is preferred
• Excellent verbal and written presentation/communication skills are mandatory.
• Customer sensitivity, the ability to multiplex many issues & set priorities, and the desire to help customers exploit new technologies are essential for success in the position.

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