{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/circuits"},"x-facet":{"type":"skill","slug":"circuits","display":"Circuits","count":21},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_6f42d71f-a38"},"title":"Electrical Engineer, Intelligence Systems","description":"<p>We are seeking a skilled Electrical Engineer to join our rapidly growing team in Reston, Virginia. As an Electrical Engineer, you will be responsible for Full Cycle PCB design, including collecting requirements, schematic design, component selection, supervision or completion of layout, bring-up, test, debug, and integration with the system.</p>\n<p>Key responsibilities include:</p>\n<ul>\n<li>Working with a cross-functional team to design market-leading hardware products.</li>\n<li>Full cycle PCB design, including collecting requirements, schematic design, component selection, supervision or completion of layout, bring-up, test, debug, and integration with the system.</li>\n<li>Driving product maturity through rapid prototyping, design verification, and qualification activities.</li>\n<li>Applying modern design standards and guidelines to create high-reliability, highly manufacturable assemblies.</li>\n<li>Implementing combinations of high-speed digital, precision analog, RF, and high-power designs.</li>\n<li>Leading the team in establishing internal guidelines for design for manufacturing (DFM) and quality fabrication and assembly outputs.</li>\n<li>Conducting peer-level and cross-discipline design reviews.</li>\n<li>Low-level firmware development for bring-up and test.</li>\n<li>Root cause analysis in support of production operations.</li>\n</ul>\n<p>Requirements include:</p>\n<ul>\n<li>4+ years of professional experience in hardware product development.</li>\n<li>Full understanding of PCB Layout techniques to meet mechanical, electrical, and manufacturing requirements.</li>\n<li>Ability to read and interpret schematics and apply best practices appropriate for each design.</li>\n<li>Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.</li>\n<li>Familiarity with common MCU, CPU, FPGA devices and technologies.</li>\n<li>Knowledge of modern analog and digital electronics and electronic circuits.</li>\n<li>Ability to determine work priorities based on broad direction from management.</li>\n<li>Experience using Altium Designer or equivalent E-CAD tools.</li>\n<li>Excellent communication skills and ability to work effectively with others.</li>\n<li>Ability to work within our company and team culture.</li>\n<li>Must have an active U.S. Secret security clearance.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_6f42d71f-a38","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anduril Intelligence Systems","sameAs":"https://www.anduril.com/","logo":"https://logos.yubhub.co/anduril.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/andurilindustries/jobs/4591126007","x-work-arrangement":"onsite","x-experience-level":"mid","x-job-type":"full-time","x-salary-range":"$129,000-$171,000 USD","x-skills-required":["PCB Design","Altium Designer","E-CAD Tools","Modern Analog and Digital Electronics","Electronic Circuits","High-Speed Digital Design","Precision Analog Design","RF Design","High-Power Design","Design for Manufacturing","Quality Fabrication and Assembly Outputs"],"x-skills-preferred":["MIL-STD-810","MIL-STD-461","Military Environmental Qualification Standards","Military Electromagnetic Compatibility Standards"],"datePosted":"2026-04-18T15:58:36.662Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Reston, Virginia, United States"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"PCB Design, Altium Designer, E-CAD Tools, Modern Analog and Digital Electronics, Electronic Circuits, High-Speed Digital Design, Precision Analog Design, RF Design, High-Power Design, Design for Manufacturing, Quality Fabrication and Assembly Outputs, MIL-STD-810, MIL-STD-461, Military Environmental Qualification Standards, Military Electromagnetic Compatibility Standards","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":129000,"maxValue":171000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_90501834-de5"},"title":"Network Engineer - Planning & Procurement","description":"<p>As a Network Engineer dismantle the complexities of network planning and procurement. Your role will be pivotal in driving the company&#39;s strategy, roadmap, and approval to leadership for peering, transit, backbone circuits, dark fiber, IP space, and vendor relationships. You will work closely with the finance team to create CAPEX/OPEX models with forecasting, unit costs to track cost efficiencies over time.</p>\n<p>Responsibilities include securing the company&#39;s future with your deep understanding of technical aspects of technologies, current market trends, and future capacity exhaustion points. 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How can we trust them?&quot; The Interpretability team at Anthropic is working to reverse-engineer how trained models work because we believe that a mechanistic understanding is the most robust way to make advanced systems safe.</p>\n<p>We&#39;re looking for researchers and engineers to join our efforts. People mean many different things by &quot;interpretability&quot;. We&#39;re focused on mechanistic interpretability, which aims to discover how neural network parameters map to meaningful algorithms.</p>\n<p>A few places to learn more about our work and team at a high level are this introduction to Interpretability from our research lead, Chris Olah; a discussion of our work on the Hard Fork podcast produced by the New York Times, and this blog post (and accompanying video) sharing more about some of the engineering challenges we’d had to solve to get these results.</p>\n<p>Some of our team&#39;s notable publications include A Mathematical Framework for Transformer Circuits, In-context Learning and Induction Heads, Toy Models of Superposition, Scaling Monosemanticity, and our Circuits’ Methods and Biology papers.</p>\n<p>This work builds on ideas from members&#39; work prior to Anthropic such as the original circuits thread, Multimodal Neurons, Activation Atlases, and Building Blocks.</p>\n<p>We aim to create a solid foundation for mechanistically understanding neural networks and making them safe (see our vision post).</p>\n<p>In the short term, we have focused on resolving the issue of &quot;superposition&quot; (see Toy Models of Superposition, Superposition, Memorization, and Double Descent, and our May 2023 update), which causes the computational units of the models, like neurons and attention heads, to be individually uninterpretable, and on finding ways to decompose models into more interpretable components.</p>\n<p>Our subsequent work found millions of features in Sonnet, one of our production language models, represents progress in this direction.</p>\n<p>In our most recent work, we develop methods that allow us to build circuits using features and use this circuits to understand the mechanisms associated with a model&#39;s computation and study specific examples of multi-hop reasoning, planning, and chain-of-thought faithfulness on Haiku 3.5, one of our production models.</p>\n<p>This is a stepping stone towards our overall goal of mechanistically understanding neural networks.</p>\n<p>We often collaborate with teams across Anthropic, such as Alignment Science and Societal Impacts to use our work to make Anthropic’s models safer.</p>\n<p>We also have an Interpretability Architectures project that involves collaborating with Pretraining.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Develop methods for understanding LLMs by reverse engineering algorithms learned in their weights</li>\n<li>Design and run robust experiments, both quickly in toy scenarios and at scale in large models</li>\n<li>Create and analyze new interpretability features and circuits to better understand how models work.</li>\n<li>Build infrastructure for running experiments and visualizing results</li>\n<li>Work with colleagues to communicate results internally and publicly</li>\n</ul>\n<p><strong>You may be a good fit if you:</strong></p>\n<ul>\n<li>Have a strong track record of scientific research (in any field), and have done some work on Interpretability</li>\n<li>Enjoy team science – working collaboratively to make big discoveries</li>\n<li>Are comfortable with messy experimental science. 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For sales roles, the range provided is the role’s On Target Earnings (&quot;OTE&quot;) range, meaning that the range includes both the sales commissions/sales bonuses target and annual base salary for the role.</p>\n<p>Annual Salary: $350,000-$850,000 USD</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_60da952d-d37","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Anthropic","sameAs":"https://www.anthropic.com/","logo":"https://logos.yubhub.co/anthropic.com.png"},"x-apply-url":"https://job-boards.greenhouse.io/anthropic/jobs/4980427008","x-work-arrangement":"hybrid","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":"$350,000-$850,000 USD","x-skills-required":["Python","Mechanistic Interpretability","LLMs","Neural Networks","Circuits","Features","Model Computation"],"x-skills-preferred":[],"datePosted":"2026-04-18T15:44:56.628Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"San Francisco, CA"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Python, Mechanistic Interpretability, LLMs, Neural Networks, Circuits, Features, Model Computation","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":350000,"maxValue":850000,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_b65a3549-3eb"},"title":"Power Electronics - Electrical Engineer I","description":"<p>Shield AI is redefining autonomous aviation with cutting-edge AI and GPS/RF-denied navigation technologies. We&#39;re building our next-generation aircraft, X-BAT, like no other,one that will push the boundaries of innovation and performance.</p>\n<p>We&#39;re looking for an entry-level Power Electronics Engineer who is excited to help bring X-BAT&#39;s next-generation power systems to first flight. In this role, you will own a meaningful project directly tied to our power architecture critical path, while receiving direct mentorship from senior power and electrical engineers.</p>\n<p><strong>Responsibilities:</strong></p>\n<ul>\n<li>Own a power electronics design that directly impacts X-BAT system performance and major flight test milestones, supported by a senior engineer who provides technical guidance and review.</li>\n<li>Contribute to the full hardware lifecycle including concept development, modeling, worst-case analysis, schematic capture, simulation, prototyping, bring-up, verification, integration, and flight test support.</li>\n<li>Design and analyze low-voltage and high-voltage power systems including DC-DC converters, inverters, motor controllers, battery systems, power distribution, and protection circuits.</li>\n<li>Design systems across power ranges from &lt; kW low-power loads to &gt;10 kW high-power applications while balancing efficiency, thermal constraints, EMI/EMC performance, and reliability.</li>\n<li>Partner with ECAD engineers on PCB layout for power density, thermal performance, EMI mitigation, and manufacturability.</li>\n<li>Execute hands-on board bring-up, debug, root-cause analysis, and validation using oscilloscopes, power supplies, electronic loads, and other test equipment.</li>\n<li>Support environmental, stress, and qualification testing (HALT, vibration, temperature cycling) for aerospace-grade reliability.</li>\n<li>Collaborate closely with Mechanical, Embedded, Software, Production, and Aircraft teams to ensure robust system integration and clear interface ownership.</li>\n<li>Drive disciplined engineering practices including documentation, risk reduction, and closing the loop between analysis and test results.</li>\n</ul>\n<p><strong>Requirements:</strong></p>\n<ul>\n<li>B.S. in Electrical Engineering or equivalent.</li>\n<li>Strong technical fundamentals in circuits, electronics, and power systems.</li>\n<li>Hands-on experience (coursework, labs, clubs, or internships) with power electronics such as converters, motor drivers, batteries, or high-power systems.</li>\n<li>Familiarity with electrical design tools (Altium, KiCad, etc.).</li>\n<li>Experience using lab equipment such as oscilloscopes, power supplies, e-loads, and multimeters.</li>\n<li>Participation in an engineering team/club or hands-on project experience.</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_b65a3549-3eb","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Shield AI","sameAs":"https://www.shield.ai","logo":"https://logos.yubhub.co/shield.ai.png"},"x-apply-url":"https://jobs.lever.co/shieldai/0af53b2b-e1ba-4e73-9e94-a4a689cabab9","x-work-arrangement":"onsite","x-experience-level":"entry","x-job-type":"full-time","x-salary-range":"$81,456 - $122,184 a year","x-skills-required":["Power Electronics","Electrical Engineering","Circuits","Electronics","Power Systems","Altium","KiCad","Oscilloscopes","Power Supplies","Electronic Loads","Multimeters"],"x-skills-preferred":[],"datePosted":"2026-04-17T13:04:07.810Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Dallas, Texas / Boston, MA / San Diego, California"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Power Electronics, Electrical Engineering, Circuits, Electronics, Power Systems, Altium, KiCad, Oscilloscopes, Power Supplies, Electronic Loads, Multimeters","baseSalary":{"@type":"MonetaryAmount","currency":"USD","value":{"@type":"QuantitativeValue","minValue":81456,"maxValue":122184,"unitText":"YEAR"}}},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_4815342e-ce8"},"title":"Analog Design Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p>You Are:</p>\n<p>You are a seasoned analog design engineer with deep expertise in high-speed SERDES IP. You thrive on solving complex circuit challenges, leading technical initiatives, and collaborating across multidisciplinary teams. Your track record in advanced CMOS design, effective communication skills, and passion for innovation make you a trusted mentor and a key contributor to project and team success.</p>\n<p>What You’ll Be Doing:</p>\n<ul>\n<li>Develop and specify SERDES transceiver architectures and sub-blocks based on standards.</li>\n<li>Design, simulate, and verify high-speed analog circuits for optimal power and performance.</li>\n<li>Collaborate with analog, digital, and CAD teams to ensure design quality and efficiency.</li>\n<li>Present technical results internally and externally to customers and industry groups.</li>\n<li>Oversee physical layout to address parasitics and reliability concerns.</li>\n<li>Document features and test plans, and support post-silicon analysis and updates.</li>\n</ul>\n<p>The Impact You Will Have:</p>\n<ul>\n<li>Advance industry-leading SERDES IP for next-generation SoCs.</li>\n<li>Enhance product differentiation and customer value.</li>\n<li>Streamline design processes for quality and time-to-market.</li>\n<li>Mentor junior team members and share best practices.</li>\n<li>Influence technical direction and innovation at Synopsys.</li>\n<li>Support customer success and product reliability.</li>\n</ul>\n<p>What You’ll Need:</p>\n<ul>\n<li>Ph.D. with 6+ years or M.Sc. with 8+ years of analog IC design experience.</li>\n<li>Expertise in transistor-level CMOS design and SERDES sub-circuits.</li>\n<li>Proficiency with schematic, layout, and verification tools; SPICE simulators.</li>\n<li>Experience with scripting languages (Verilog-A, TCL, Python, etc.).</li>\n<li>Strong communication and documentation skills.</li>\n</ul>\n<p>Who You Are:</p>\n<ul>\n<li>Technical leader and mentor</li>\n<li>Collaborative and proactive</li>\n<li>Analytical and detail-oriented</li>\n<li>Adaptable and innovative</li>\n</ul>\n<p>The Team You’ll Be A Part Of:</p>\n<p>A collaborative, high-performing analog and mixed-signal design group focused on developing advanced SERDES IP for leading-edge applications. The core purpose of the team is the development of 224-Gb/s Ethernet SerDes Transceivers for network infrastructure ICs, driving the future of high-speed connectivity in data centers and communications networks for the world.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_4815342e-ce8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/kanata/analog-design-engineer/44408/93286401584","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["High-speed SERDES IP","Transistor-level CMOS design","SERDES sub-circuits","Schematic, layout, and verification tools","SPICE simulators","Scripting languages (Verilog-A, TCL, Python, etc.)"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:21:26.629Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Kanata"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"High-speed SERDES IP, Transistor-level CMOS design, SERDES sub-circuits, Schematic, layout, and verification tools, SPICE simulators, Scripting languages (Verilog-A, TCL, Python, etc.)"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_0b3b891d-187"},"title":"Analog Design, Principal Engineer","description":"<p>We Are:</p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.</p>\n<p>You Are:</p>\n<p>You are an experienced Analog Design Manager with a passion for high-speed SerDes technology. You have a proven track record in leading teams to develop cutting-edge analog integrated circuits. Your expertise in Multi-Gbps NRZ &amp; PAM4 SERDES IP, combined with your strong leadership skills, enables you to guide a team through complex design challenges. You thrive in a collaborative environment, working alongside analog and digital designers from diverse backgrounds. Your technical proficiency is complemented by your ability to develop schedules and action plans that ensure project success. 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You are committed to fostering an environment of continuous improvement and operational excellence.</p>\n<p>What You’ll Be Doing:</p>\n<p>Directing and guiding the activities of a team of analog designers developing high-speed SERDES IP.\nConducting design reviews and evaluating the final results of simulation and electrical characterization reports.\nPresenting the results of design activities, technology assessments, or critical issue investigations and making recommendations for actions necessary to achieve desired results.\nSelecting, developing, and evaluating personnel to ensure the efficient operation of the team.\nDeveloping schedules and action plans to meet overall project timelines.\nReviewing documented design features and test plans.\nEnsuring that the team follows processes and operational policies for maximum design quality.\nConsulting on the electrical characterization of the SerDes IP product and proposing solutions for post-silicon design updates.</p>\n<p>What You’ll Need:</p>\n<p>B.Tech/BE/M.Tech/MS in Electronics Engineering.\n8+ years of experience in Analog Design for High-Speed SerDes applications.\n3-5 years of experience in a management or supervisory role.\nIn-depth familiarity with transistor level circuit design and sound CMOS design fundamentals.\nDetailed design experience with SerDes sub-circuits such as receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers,voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, and DAC, DSP, Signal Integrity\nFamiliarity with both analog and digital circuits and issues related to interfacing and timing between them.\nAware of ESD issues (i.e. circuit techniques, layout).\nFamiliarity with custom digital design (i.e. highspeed logic paths).\nKnowledge of design for reliability (i.e. EM, IR, aging, etc.).\nKnowledge of layout effects (i.e. matching, reliability, proximity effects, etc.).\nGood communication and documentation skills.</p>\n<p>The Impact You Will Have:</p>\n<p>Driving the development of high-speed SerDes IP that meets industry standards and customer requirements.\nFostering innovation and excellence within the analog design team.\nEnsuring the delivery of high-quality, reliable analog integrated circuits.\nContributing to the advancement of Synopsys&#39; technology portfolio in the analog and mixed-signal domains.\nEnhancing the performance and efficiency of our high-speed communication products.\nSupporting the growth and development of team members through effective leadership and mentorship.</p>\n<p>Who You Are:</p>\n<p>You are a proactive leader with a strong technical background in analog design. You possess excellent problem-solving skills and the ability to make sound decisions under pressure. Your collaborative nature allows you to work effectively with cross-functional teams. You are detail-oriented and have a keen eye for quality. Your passion for continuous learning and improvement drives you to stay updated with the latest industry trends and technologies. You are committed to fostering a positive and inclusive team culture, encouraging innovation and excellence.</p>\n<p>The Team You’ll Be A Part Of:</p>\n<p>You will be part of a fast-growing analog and mixed-signal R&amp;D team developing high-speed analog integrated circuits in the latest FinFET process nodes. The team is composed of talented analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.</p>\n<p>Rewards and Benefits:</p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. 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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p><strong>Category</strong></p>\n<p>Engineering</p>\n<p><strong>Hire Type</strong></p>\n<p>Employee</p>\n<p><strong>Job ID</strong></p>\n<p>15231</p>\n<p><strong>Remote Eligible</strong></p>\n<p>No</p>\n<p><strong>Date Posted</strong></p>\n<p>02/15/2026</p>\n<p><strong>We Are:</strong></p>\n<p>At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.</p>\n<p><strong>You Are:</strong></p>\n<ul>\n<li>An experienced and passionate Analog and Mixed-Signal (A&amp;MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.</li>\n</ul>\n<ul>\n<li>You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<ul>\n<li>Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.</li>\n</ul>\n<ul>\n<li>You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.</li>\n</ul>\n<ul>\n<li>You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.</li>\n</ul>\n<p><strong>What You’ll Be Doing:</strong></p>\n<ul>\n<li>Leading NRZ/PAM4 Serdes analog design transceiver solutions.</li>\n</ul>\n<ul>\n<li>Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.</li>\n</ul>\n<ul>\n<li>Collaborating with silicon test and debug experts for Sim2Sil correlation.</li>\n</ul>\n<ul>\n<li>Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.</li>\n</ul>\n<p><strong>The Impact You Will Have:</strong></p>\n<ul>\n<li>Driving innovation in mixed-signal advanced analog serdes design.</li>\n</ul>\n<ul>\n<li>Enhancing the performance and efficiency of high-speed physical interfaces.</li>\n</ul>\n<ul>\n<li>Contributing to the development of cutting-edge technology in High Speed PHY IP.</li>\n</ul>\n<ul>\n<li>Improving quality and robustness of design through collaboration and Sim2Sil correlation.</li>\n</ul>\n<p><strong>What You’ll Need:</strong></p>\n<ul>\n<li>BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.</li>\n</ul>\n<ul>\n<li>Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.</li>\n</ul>\n<ul>\n<li>Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .</li>\n</ul>\n<ul>\n<li>Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters</li>\n</ul>\n<p><strong>Who You Are:</strong></p>\n<ul>\n<li>Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.</li>\n</ul>\n<ul>\n<li>Experience with PLL designs and high-speed digital circuit design.</li>\n</ul>\n<ul>\n<li>Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.</li>\n</ul>\n<ul>\n<li>Familiarity with digitally assisted analog circuit techniques.</li>\n</ul>\n<ul>\n<li>Capable to drive technical decision and tradeoff with customer focus</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of:</strong></p>\n<p>Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.</p>\n<p>You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.</p>\n<p><strong>Rewards and Benefits:</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.</p>\n<p>At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.</p>\n<p><strong>Benefits</strong></p>\n<p>At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We&#39;re proud to provide the comprehensive benefits and rewards that our team truly deserves.</p>\n<p>Visit Benefits Page</p>\n<ul>\n<li>### Health &amp; Wellness</li>\n</ul>\n<p>Comprehensive medical and healthcare plans that work for you and your family.</p>\n<ul>\n<li>### Time Away</li>\n</ul>\n<p>In addition to company holidays, we have ETO and FTO Programs.</p>\n<ul>\n<li>### Family Support</li>\n</ul>\n<p>Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.</p>\n<ul>\n<li>### ESPP</li>\n</ul>\n<p>Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.</p>\n<ul>\n<li>### Retirement Plans</li>\n</ul>\n<p>Save for your future with our retirement plans that vary by region and country.</p>\n<ul>\n<li>### Compensation</li>\n</ul>\n<p>Competitive salaries.</p>\n<p>\\<em>\\</em> Benefits vary by country and region - check with your recruiter to confirm</p>\n<p><strong>Get an idea of what your daily routine <strong>around the office</strong> can be like</strong></p>\n<p>\\ Explore <strong>Noida</strong></p>\n<p>View Map</p>\n<p>---</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_de112d07-e65","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/noida/analog-design-principal-engineer/44408/91802916768","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert","PLL , data converters and SERDES design","mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction","circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes","Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology","silicon test and debug experts to advance quality through Sim2Sil correlation","Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits","Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity ","RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"],"x-skills-preferred":[],"datePosted":"2026-03-09T11:06:28.077Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Noida"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert, PLL , data converters and SERDES design, mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction, circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes, Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology, silicon test and debug experts to advance quality through Sim2Sil correlation, Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits, Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity , RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_11ba092a-814"},"title":"Field Installation and Service Technician","description":"<p>We are seeking a highly motivated and customer-focused Field Service Installation &amp; Support Technician to deliver professional installation, commissioning, and service support for AVL hardware and software systems.</p>\n<p>This role is responsible for ensuring successful on-site delivery, product and system unpacking, setup, installation, debugging, configuration, calibration troubleshooting, and maintenance of advanced test automation and test bed equipment while representing the company with the highest level of professionalism.</p>\n<p>Responsibilities:</p>\n<ul>\n<li><p>Act as Liaison and company representative with customers. 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The new team has three locations. The Motorsport Competence Center of Audi in Neuburg (Germany) is considered one of the most modern of its kind in Europe. The Formula 1 factory of Audi Motorsport AG in Hinwil (Switzerland) is known for its innovative technologies and passion for racing. The Audi Motorsport Technology Center, UK, is in its launch phase and growing continuously. Our Power Unit comes from Neuburg, while Hinwil is responsible for the development of the chassis and race operations.</p>\n<p><strong>What you need?</strong></p>\n<p>The mindset of an athlete. If you are someone for whom giving up isn’t an option and limits are just something to be overcome, you can bring Vorsprung durch Technik to Formula 1 with us. Become part of this unique project and make motorsport history.</p>\n<p><strong>The position</strong></p>\n<p>The position is to be filled at Audi Formula Racing GmbH in Neuburg (Germany).</p>\n<p><strong>Your Mission</strong></p>\n<ul>\n<li>Contributing and representing all quality-relevant aspects during the design phase in collaboration with engineering</li>\n<li>Selecting suitable suppliers in cooperation with Purchasing and Engineering, including supplier qualification</li>\n<li>Defining appropriate measurement and testing methods for component inspection</li>\n<li>Performing, evaluating, approving, and documenting component tests</li>\n<li>Handling complaints with external suppliers</li>\n<li>Conducting component analyses and participating in the failure analysis and problem-solving process</li>\n<li>Creating acceptance criteria, test instructions, and incorporating lessons learned</li>\n</ul>\n<p><strong>Your Profile</strong></p>\n<ul>\n<li>Degree in mechanical engineering or a comparable technical field</li>\n<li>In-depth knowledge of combustion engines, hydraulics, oil circuits, and cooling systems</li>\n<li>Ideally, experience with composite materials (carbon)</li>\n<li>Holistic and analytical mindset combined with strong system-level understanding of combustion engines and engine peripherals</li>\n<li>Experience in quality assurance and in working with external suppliers</li>\n<li>Solid IT skills (MS Office, SAP)</li>\n<li>Assertiveness, high motivation, and strong initiative as part of a small team with direct communication and a high level of personal responsibility</li>\n<li>Good command of English and experience collaborating with internationally operating suppliers</li>\n<li>Several years of professional experience in the automotive or motorsport sector</li>\n</ul>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a 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The successful candidate will be a seasoned analog design professional with a passion for pushing technology boundaries.</p>\n<p><strong>What you&#39;ll do</strong></p>\n<p>Review SerDes standards to develop novel transceiver architectures and detailed sub-block specifications.</p>\n<p>Investigate and architect circuit solutions that address performance bottlenecks, enabling significant improvements in power, area, and speed.</p>\n<p>Collaborate with cross-functional analog and digital design teams to streamline design and verification processes for optimal efficiency and quality.</p>\n<p>Oversee and guide the physical layout to minimize parasitics, device stress, and process variations, ensuring robust silicon performance.</p>\n<p>Present and review simulation data with internal teams and external stakeholders, including industry panels and customer reviews.</p>\n<p>Document design features, test plans, and results, and consult on electrical characterization and post-silicon analysis for product enhancements.</p>\n<p>Analyze customer silicon data to identify design improvement opportunities and propose solutions for post-silicon updates.</p>\n<p><strong>What you need</strong></p>\n<p>MTech/MS with 7+ years or BTech/BS with 8+ years of practical analog IC design experience in Electrical or Computer Engineering (or related field).</p>\n<p>Proven expertise with FinFET technologies and CMOS tape-outs.</p>\n<p>Deep understanding of Multi-Gbps high-speed designs (PAM4, NRZ) and SERDES architectures.</p>\n<p>Extensive design experience with SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, BGR, regulators, oscillators, ADC/DAC).</p>\n<p>Skilled in analog/digital co-design, calibration, adaptation, and timing handoff for optimized circuit performance.</p>\n<p>Familiarity with ESD protection, custom digital design, and design for reliability (EM, IR, aging, self-heating).</p>\n<p>Proficient with schematic entry, physical layout, design verification tools, and SPICE simulators.</p>\n<p>Experience with scripting languages (TCL, PERL, MATLAB) for post-processing simulation results.</p>\n<p>Understanding of system-level budgeting (jitter, amplitude, noise) and signal integrity (packaging, parasitics, crosstalk).</p>\n<p>Excellent communication and documentation skills.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_83f45538-d2c","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/hyderabad/analog-design-sr-staff-engineer/44408/91089467936","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"full-time","x-salary-range":null,"x-skills-required":["analog IC design","FinFET technologies","CMOS tape-outs","Multi-Gbps high-speed designs","SERDES architectures","SERDES sub-circuits","analog/digital co-design","calibration","adaptation","timing handoff","ESD protection","custom digital design","design for reliability"],"x-skills-preferred":["scripting languages","schematic entry","physical layout","design verification tools","SPICE simulators"],"datePosted":"2026-01-28T15:10:19.833Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Hyderabad"}},"employmentType":"FULL_TIME","occupationalCategory":"Engineering","industry":"Technology","skills":"analog IC design, FinFET technologies, CMOS tape-outs, Multi-Gbps high-speed designs, SERDES architectures, SERDES sub-circuits, analog/digital co-design, calibration, adaptation, timing handoff, ESD protection, custom digital design, design for reliability, scripting languages, schematic entry, physical layout, design verification tools, SPICE simulators"}]}