Key Responsibilities:

• Drive end-to-end energy storage system (ESS) development on extremely accelerated timelines
• Collaborate with program teams to define actionable ESS requirements from user story/CONOPs
• Execute and/or deliver the following ESS development artifacts/steps:
• ESS requirements, battery cell selection and validation
• Familiarity with ESS architecture and design concepts
• Battery management system (BMS) requirements, BMS HW and FW/SW design, BMS SW feature plan/roadmap, BMS validation plan at bench and HIL level
• Cell, module, and pack level validation plan. Support bring-up, test, debug, and vehicle integration
• Ramp plan from development units to production
• Sustain fielded ESSs with root cause analysis and data processing, drive countermeasures/design updates as needed

Requirements:

• Bachelor’s Degree in Electrical Engineering, Mechanical Engineering or fundamental Physical Sciences with applied application focus on energy storage technologies, with 5+ years of experience designing, testing, and troubleshooting energy storage systems.
• Competence with battery test equipment such as cell and pack cyclers, thermal chambers, battery health testers (EIS, ACIR, hi-pot, megger, etc)
• One of the following: 1) Experience BMS programming cell modeling tools 2) Electrical circuit design/integrations experience.
• Familiarity with common electrochemical energy storage materials, technologies and boundaries of operation
• Knowledge of modern battery management system capabilities and requirements in HW and SW/FW
• Experience in battery characterization methods: mission profile validation, equivalent-circuit model characterization, cycle/calendar life assessment, safety features, etc.
• Understanding of UN38.3, NAVSEA S9310 and/or equivalent (UL, IEC) battery safety standards
• Must be a U.S. Person due to required access to U.S. export controlled information or facilities

Preferred Qualifications:

• Graduate Degree in Electrical Engineering, Mechanical Engineering or fundamental Physical Sciences with a focus on energy storage technologies
• Understanding and familiarity with MIL-STD-882, MIL-STD-810, MIL-STD-704, MIL-STD-461, MIL-STD-464
• Demonstrated experience in delivering robust, high-performance, energy storage systems with substantial technical ownership/contributions
• Demonstrated experience in battery testing, modeling, controls, and BMS integration/operation

Salary Range: $132,000 - $213,000 USD

Benefits:

• Comprehensive medical, dental, and vision plans at little to no cost to you
• Generous time off: Highly competitive PTO plans with a holiday hiatus in December. Caregiver & Wellness Leave is available to care for family members, bond with a new baby, or address your own medical needs.
• Family Planning & Parenting Support: Coverage for fertility treatments (e.g., IVF, preservation), adoption, and gestational carriers, along with resources to support you and your partner from planning to parenting.
• Mental Health Resources: Access free mental health resources 24/7, including therapy and life coaching. Additional work-life services, such as legal and financial support, are also available.
• Professional Development: Annual reimbursement for professional development
• Commuter Benefits: Company-funded commuter benefits based on your region.
• Relocation Assistance: Available depending on role eligibility.
• Retirement Savings Plan: Traditional 401(k), Roth, and after-tax (mega backdoor Roth) options.

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Key Responsibilities:

• Hands-on Engineering: Actively participate in the design, testing, and troubleshooting of circuits, PCB layouts, and other electronic systems.
• Collaboration: Work closely with cross-functional teams, including software, firmware, and mechanical engineers, to ensure seamless integration of electrical systems.
• Mentorship: Provide technical guidance and mentorship to junior engineers, helping to develop the team's capabilities.
• System Testing and Validation: Oversee system-level testing and validation to ensure designs meet performance, safety, and reliability standards.
• Vendor Coordination: Interface with vendors to source and select appropriate components for designs, ensuring quality and timely delivery.
• Project Management: Support project timelines and ensure that technical milestones are met, reporting on progress to senior management.

Requirements:

• Experience: 5+ years of experience in electrical engineering, with a focus on avionics, UAV systems, or similar industries.
• Technical Expertise: Strong hands-on knowledge of analog and digital circuit design, PCB design, and avionics systems.
• Project Management: Ability to oversee the technical aspects of projects from concept to delivery, ensuring that deadlines and specifications are met.
• Eligible to obtain and maintain an active U.S. Secret security clearance.

Preferred Qualifications:

• Familiarity with avionics design standards like DO-254, MIL-STD-810, and others.
• Proficiency with Altium Designer or equivalent PCB design tools.
• Strong problem-solving skills with a focus on delivering innovative solutions.

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Your responsibilities will include:

• Owning full product and circuit design for flight critical subsystems, including analog, digital, high-speed, power, compute, sensors, FPGA, and other functional blocks as needed
• Designing for high reliability in challenging environments, including temperature, altitude, radiation, and vibration
• Leading full-cycle hardware development, from concept to testing and validation
• Driving PCB layout and design with ECAD engineers, optimizing for power density, EMI, thermal, and manufacturability
• Designing for Safety, Manufacturability and Reliability, keeping in mind best practices for safety, manufacturing and reliability
• Executing board bring up, verification, validation and HALT testing to meet rigorous aerospace reliability standards
• Collaborating with Mechanical, CAD, Embedded, Software, Production and various aircraft teams throughout the product lifecycle
• Leading and contributing to cross-functional reviews ensuring robust, high-integrity engineering decisions

Required qualifications include:

• A B.S. in Electrical Engineering or equivalent
• 5+ years of experience as an Electrical Engineer
• Experience with circuit design, schematic capture, component selection, circuit testing, circuit debugging, and system integration
• Familiarity with Altium or equivalent

Salary compensation is influenced by a wide array of factors including but not limited to skill set, level of experience, licenses and certifications, and specific work location.

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We're looking for a Power Engineer II to contribute to the design, analysis, and validation of power electronics systems critical to our aircraft. This role is perfect for an engineer with a solid foundation in power systems who is eager to grow, own challenging projects, and see their work move rapidly from concept to flight.

Key responsibilities include:

• Designing power electronics systems, including high-voltage and low-voltage systems, DC-DC converters, inverters, and motor controllers
• Developing embedded safety and protection mechanisms
• Designing across power ranges, from 10 kW high-power applications
• Owning the entire hardware development flow, from concept to testing and validation
• Collaborating with mechanical, CAD, embedded, software, production, and aircraft teams throughout the product lifecycle

Requirements include:

• B.S. in Electrical Engineering or equivalent
• 1+ years of experience as an Electrical Engineer
• Experience with circuit design, schematic capture, component selection, circuit testing, and debugging
• Familiarity with Altium or equivalent
• Experience with lab equipment, such as oscilloscopes, power supplies, E-loads, and multimeters

This is a full-time position with a salary range of $91,660 - $137,490 per year, plus bonus, benefits, and equity.

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Responsibilities:

• Own flight critical power system design for X-BAT
• Design power electronics for the high voltage and low voltage systems. This includes inverters, DC-DC converters, battery management, and other power electronics
• Lead others to execute design, verification, and manufacturing deployment
• Provide mentorship and technical feedback to others on the power team and cross-functionally
• Harden the designs for harsh environments such as shock/vibe, high reliability, radiation, and high-altitude
• Work on power sub-systems and designs for both low power (< kW) and high power (>10 kW)
• Full-cycle hardware development: Own the entire flow , concept, modeling, worst case analysis, schematic capture, simulation, prototyping, design reiteration for improving design maturity, testing and validation
• PCB ownership: Drive PCB layout and design with ECAD engineers, optimizing for power density, EMI, thermal, and manufacturability
• Design for Safety, Manufacturability and Reliability: Design robust systems keeping in mind best practices for safety, manufacturing and reliability
• Cross-functional collaboration: Work closely with Mechanical, CAD, Embedded, Software, Supply Chain, Test Automation, Production and various aircraft teams throughout the product lifecycle
• Design review leadership: Lead and contribute to cross-functional reviews ensuring robust, high-integrity engineering decisions. Mentor junior engineers that support your design
• Program execution: Manage project timelines, deliverables, and technical milestones to drive on-time, high-quality outcomes

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Our team looks for engineers that value first principles engineering and extreme ownership.

Responsibilities:

• Own a design that directly impacts the X-BAT system and major flight test milestones. A senior engineer is assigned as a direct mentor to provide technical review and professional feedback.
• Full lifecycle ownership: concept, design, verification, integration, flight test, and manufacturing
• Design efforts include:
• Circuit design for our embedded system. You will design with analog, digital, power conversion, high-speed, FPGA, MCU, EMI/EMC, etc.
• System integration and verification
• Environmental test, qualification, and automation
• Debug, root cause, and drive resolution
• Systems must be designed for high-reliability, radiation, aggressive temperature changes, and high-magnitude vibration

Qualifications:

• Have a degree in Electrical Engineering or equivalent
• Strong technical fundamentals
• Have been part of an engineering team/club
• Experience with electrical design software, Altium, KiCAD, etc.

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Your responsibilities will include:

• Designing circuitry for our embedded system, incorporating analog, digital, power conversion, high-speed, FPGA, MCU, EMI/EMC, and other components
• System integration and verification
• Environmental testing, qualification, and automation
• Debugging, root cause analysis, and driving resolution

You will be expected to design systems for high-reliability, radiation resistance, aggressive temperature changes, and high-magnitude vibration.

As a member of our team, you will receive direct mentorship and technical review from Senior Electrical Engineers, and have the opportunity to contribute to the development of our X-BAT system.

We are looking for engineers who value first principles engineering and extreme ownership, and are eager to take on new challenges and learn from experienced professionals.

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We're looking for a Staff Power Engineer to provide technical leadership in the design, development, and delivery of high-performance power systems across our aircraft programs. This is a high-ownership role where you will define architectures, mentor junior engineers, and ensure that our power electronics meet the rigorous demands of autonomous aviation.

Key responsibilities include:

• Owning flight critical power sub-system design for X-BAT
• Designing power electronics for high voltage and low voltage systems, including inverters, DC-DC converters, battery management, and other power electronics
• Hardening designs for harsh environments such as shock/vibe, high reliability, radiation, and high-altitude
• Working on power sub-systems and designs for both low power (< kW) and high power (>10 kW)
• Full-cycle hardware development, including concept, modeling, worst case analysis, schematic capture, simulation, prototyping, design reiteration for improving design maturity, testing and validation
• PCB ownership, driving PCB layout and design with ECAD engineers, optimizing for power density, EMI, thermal, and manufacturability
• Designing for Safety, Manufacturability and Reliability, keeping in mind best practices for safety, manufacturing and reliability
• Board Bring Up and Testing, executing board bring up, verification, validation and HALT testing to meet rigorous aerospace reliability standards
• Cross-functional collaboration, working closely with Mechanical, CAD, Embedded, Software, Supply Chain, Test Automation, Production and various aircraft teams throughout the product lifecycle
• Design review leadership, leading and contributing to cross-functional reviews ensuring robust, high-integrity engineering decisions. Mentoring junior engineers that support your design
• Program execution, managing project timelines, deliverables, and technical milestones to drive on-time, high-quality outcomes

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We are looking for an Electrical Engineer to join our team, focused on the design, integration and troubleshooting of electronics systems critical to our aircraft. This role is perfect for an engineer with a solid foundation in power systems, embedded systems who is eager to grow, own challenging projects, and see their work move rapidly from concept to flight. If you thrive in fast-paced environments, enjoy solving complex problems, and want to help build the future of autonomous aviation, we want to hear from you.

Responsibilities:

• Circuit and sub-system design for V-BAT and its support equipment. This includes complex system architectures utilizing custom circuitry (power management, analog, digital, servos, microcontrollers, sensors, radios, etc.)
• Lead avionic systems troubleshooting and root cause analysis
• Support the design and integration of complex power systems, embedded systems and sensors which enable aircraft autonomy and AI
• Lead and mentor teammates working on the same project
• Own circuit part selection, schematic capture, simulation, analysis, verification, debugging, and release to production
• Work closely with cross-functional teams (mechanical, embedded, software, manufacturing, supply chain, etc.)
• Work closely with Firmware to integrate applicable logic designs into the build/release cycle
• Provide feedback to other teams where applicable
• Help develop PCBA and avionics system qualification test and automated test solutions
• Proactively identify opportunities for improvement within hardware development projects, demonstrating initiative to propose and implement innovative solutions that enhance efficiency, quality, and overall project success and aircraft reliability

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Key responsibilities include designing, developing, and testing electronic hardware for drone detection and mitigation systems, working on RF systems including signal detection, jamming, and communication modules, and integrating sensors (radar, EO/IR, acoustic, RF) into defense platforms.

The ideal candidate will have a strong background in electrical engineering, experience with analog and digital circuit design, PCB design tools, embedded systems, and microcontrollers, as well as familiarity with RF systems, antennas, and signal processing.

In addition to technical skills, the successful candidate will be able to work in fast-paced, mission-driven environments, collaborate with cross-functional teams, and communicate effectively with stakeholders.

As an Electrical Engineer at CX2, you will have the opportunity to work on high-priority projects, contribute to the development of cutting-edge technologies, and make a meaningful impact on national security.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

You Are:

You are an accomplished engineering professional with a strong background in analog and mixed-signal circuit design. With over 12 years of industry experience, you have a deep understanding of circuit design fundamentals, device physics, and technology effects. You have successfully managed projects from specifications to silicon, and you are comfortable interfacing with both internal and external stakeholders. You are a proactive team player with excellent problem-solving skills and a knack for managing complex projects. Your high energy and flexible personality allow you to go the extra mile, fostering collaboration and driving projects to successful completion. You are adept at conflict resolution and possess strong customer-facing skills, making you an invaluable asset to any high-performing team.

What You’ll Be Doing:

Managing analog and mixed-signal IP projects from specifications to silicon. Interacting with customers to guide them and help adapt our solutions to their needs. Handling customer queries and debugging problems efficiently. Aligning with and improving established design processes. Interfacing with internal and external stakeholders to ensure high engagement levels. Collaborating with a global team to co-develop Analog Full Custom IPs such as GPIOs, I2C, I3C, SMBUS, eMMC, SVID, Quad SPI, JTAG, and more.

The Impact You Will Have:

Driving the integration of advanced capabilities into System on Chips (SoCs). Enabling customers to meet unique performance, power, and size requirements. Accelerating the time-to-market for differentiated products with reduced risk. Enhancing the design and development of high-performance silicon IP. Improving customer satisfaction through efficient problem-solving and support. Contributing to the continuous innovation and technological advancements at Synopsys.

What You’ll Need:

Bachelor's or Master's degree in Electrical Engineering or a related field from a reputed institution. 12+ years of industry experience in analog and mixed-signal circuit design. Proven experience in managing projects from specifications to silicon. Strong understanding of circuit design fundamentals, device physics, and technology effects. Proficiency in spice simulations and various sub-micron design methodologies.

Who You Are:

A proactive team player with strong written and verbal communication skills. High energy individual with the ability to go the extra mile. Creative and flexible personality with excellent customer-facing skills. Demonstrates good analysis and problem-solving skills. Adept at conflict resolution and fostering collaboration among team members.

The Team You’ll Be A Part Of:

You will be part of a strong development team specializing in GPIOs, Specialty IOs, and General Purpose Analog IPs. The team is distributed globally, bringing together experienced professionals from various sites. Together, you will co-develop high-performance analog full custom IPs and work on projects that push the boundaries of technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Senior Staff Engineer in RTL Design and Verification, you will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects. You will develop comprehensive test cases to ensure robust product functionality and performance.

You will collaborate with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis. You will stay current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.

You will contribute to the improvement of verification methodologies and automation flows. You will document design specifications, verification plans, and results to ensure transparency and repeatability.

You will participate in code reviews and technical discussions to drive innovation and continuous improvement.

You will accelerate the development of industry-leading SLM IPs that power the world's top technology companies. You will enhance product reliability, performance, and user experience for global semiconductor solutions.

You will drive innovation in verification methodologies, setting new standards for efficiency and accuracy. You will enable successful integration of advanced 3D-IC technologies, expanding Synopsys' leadership in the market.

You will foster strong customer relationships through technical expertise and responsive support. You will contribute to a culture of excellence and continuous learning within the engineering team.

To succeed in this role, you will need a BS/MS in Computer Science, Electrical Engineering, or related field. You will require 8+ years of hands-on experience in RTL design and verification.

You will need proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies. You will need experience working in Unix/Linux environments.

You will need strong debugging and problem-solving skills, especially in complex chip design environments. You will need excellent written and verbal communication skills in English.

Knowledge of digital, analog, and mixed-signal IP/circuit design is a plus. Familiarity with 3D-IC standards and semiconductor verification best practices is desirable.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

At Synopsys, we drive the innovations that shape the way we live and connect.

Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Join us to transform the future through continuous technological innovation.

You are a visionary and detail-oriented principal engineer, passionate about pushing the boundaries of analog circuit design in high-speed interfaces.

With a deep technical foundation and proven leadership skills, you thrive in collaborative environments and are eager to mentor the next generation of engineers.

Your expertise in SerDes and analog macros enables you to dissect complex architectural requirements and translate them into robust, scalable designs.

You are adept at balancing power, area, and performance trade-offs, and you proactively seek innovative solutions to technical challenges.

Your experience spans both the theoretical and practical aspects of circuit design,from transistor-level fundamentals to silicon-proven implementations.

You champion rigorous verification methodologies and leverage advanced simulation tools to ensure the highest quality outcomes.

As a communicator, you clearly articulate your ideas to peers, customers, and junior team members, fostering a culture of learning and excellence.

You are motivated by the opportunity to shape industry-leading IP products that power tomorrow’s technology, and you approach every project with a commitment to reliability, efficiency, and continuous improvement.

Your adaptability and curiosity make you a valuable contributor to cross-functional teams, and you are excited to make a lasting impact at Synopsys.

Own the architecture, design, and implementation of analog macro-level circuits for SerDes IP.

Track and review the technical progress of sub-block owners, ensuring alignment with project goals.

Interpret SerDes standards and architecture documents to develop detailed analog specifications.

Identify and refine circuit implementations, optimizing for power, area, and performance targets.

Propose and execute design and verification strategies using advanced simulator features for robust outcomes.

Oversee physical layout to minimize parasitics, device stress, and process variation impacts.

Collaborate closely with digital RTL engineers on calibration, adaptation, and control algorithms for analog circuits.

Present simulation data and technical insights for peer and customer reviews.

Mentor and review the progress of junior engineers, fostering growth and technical excellence.

Document design features, methodologies, and test plans for internal and customer use.

Consult on electrical characterization and testing of circuits within the SerDes IP product portfolio.

Drive innovation and quality in Synopsys’ industry-leading SerDes IP solutions.

Elevate the performance and reliability of analog designs, enabling next-generation connectivity standards.

Contribute to the success of global customers by delivering robust, silicon-proven analog macros.

Enhance cross-functional collaboration across design, layout, and digital teams.

Mentor and develop junior engineers, strengthening Synopsys’ talent pipeline.

Influence the direction of advanced analog design methodologies and verification strategies.

Provide technical leadership in customer engagements and peer reviews.

Support continuous improvement in design processes and documentation practices.

PhD with 7+ years, or MSc with 10+ years of SerDes/high-speed analog design experience.

Expertise in transistor-level circuit design and strong CMOS design fundamentals.

Silicon-proven experience implementing circuits for TX, RX, and Clock paths within SerDes architectures.

Leadership experience in guiding small teams through macro-level design projects.

In-depth knowledge of SerDes sub-circuits such as equalizers, samplers, drivers, serializers, deserializers, VCOs, phase interpolators, DLLs, PLLs, bandgap references, ADCs, and DACs.

Advanced skills in optimizing FinFET CMOS layouts to minimize parasitics and local device mismatches.

Awareness of ESD and reliability issues, including circuit techniques and layout strategies.

Proficiency with EDA tools for schematic entry, physical layout, and design verification.

Experience with SPICE simulators for detailed circuit analysis.

Familiarity with analog behavioral modeling and simulation control using Verilog-A.

Programming experience in TCL, Perl, C, Python, and MATLAB for design automation and data analysis.

Analytical thinker with exceptional problem-solving skills.

Collaborative leader and effective communicator.

Detail-oriented and methodical in approach.

Adaptable and open to learning new technologies.

Mentor and role model for junior engineers.

Self-motivated and proactive in driving project outcomes.

Committed to excellence, reliability, and innovation.

You will join a dynamic and multidisciplinary team of analog, digital, and mixed-signal engineers dedicated to developing industry-leading SerDes IP solutions.

The team is focused on delivering high-performance, reliable, and scalable designs that enable advanced connectivity in semiconductor products.

Collaboration, mentorship, and technical innovation are at the core of the team’s culture, providing an environment where your expertise and leadership will have a direct impact on both product and team success.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

Synopsys Canada ULC values the diversity of our workforce.

We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process.

Should you require an accommodation, please contact hr-help-canada@synopsys.com.

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You will be a part of a fast-growing analog and mixed-signal R&D team, dedicated to developing high-speed analog integrated circuits in the most advanced FinFET/GAA process nodes. You'll interact with a global, dynamic, multi-cultural, and cross-functional design team, collaborating with experts in various fields to create innovative solutions for high-speed communications.

As a Staff Engineer, you will be responsible for:

Developing and/or validating analog circuits considering electrical specifications and reliability constraints. Documenting simulation results and analyzing performance. Evaluating the impact of parasitic effects related to layout implementations and working with the layout team to minimize such effects, improving performance, power, and area. Defining and planning analog design activities for high-speed SerDes products. Collaborating with a global team of engineers to integrate and verify design solutions. Continuously learning and applying the latest advancements in FinFET/GAA process nodes to enhance design efficiency.

You will contribute to the development of high-speed SerDes products that enable high-performance chip-to-chip communications. You will enhance the performance, power efficiency, and reliability of analog integrated circuits in advanced CMOS technologies. You will support the integration of more capabilities into System-on-Chip (SoC) designs, accelerating time-to-market for innovative products.

You will be a part of a dynamic, multicultural, and cross-functional design team, collaborating with experts in various fields to create innovative solutions for high-speed communications.

The ideal candidate will have a good understanding of CMOS technologies and analog circuit design principles. They will have strong analysis, problem-solving, and organizational skills. They will have experience in analog and mixed-signal block design, with a focus on high-speed SERDES. They will be proficient in documenting and analyzing simulation results. They will be familiar with IC design packages and UNIX operating systems.

You will be a collaborative team player who thrives in a global, multicultural environment. You will be an effective communicator with strong written and verbal skills in English. You will be a proactive and self-motivated individual with a passion for innovation and continuous learning. You will be an analytical thinker with the ability to tackle complex design challenges and find creative solutions. You will be a detail-oriented engineer who values precision and accuracy in their work.

You will be rewarded with a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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As an Analog Design Engineer at Synopsys, you will be designing DDR I/O circuits for high-performance silicon IP, ensuring compliance with industry standards and customer requirements. You will also develop and optimize analog/mixed-signal circuit architectures, focusing on performance, power, and area efficiency.

Key responsibilities include:

• Designing DDR I/O circuits for high-performance silicon IP
• Developing and optimizing analog/mixed-signal circuit architectures
• Executing circuit design tasks using advanced CMOS processes and state-of-the-art layout methodologies
• Collaborating with internal development teams to integrate analog blocks into ASIC and SoC designs
• Assessing and resolving issues related to deep submicron process technologies

The ideal candidate will have a BTech/MTech in Electrical Engineering or related field, with strong knowledge of CMOS processes and deep submicron technology challenges. You should also have hands-on experience with analog/mixed-signal circuit design and layout methodologies, as well as familiarity with ASIC design flow and integration of analog blocks.

At Synopsys, we offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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You are a highly skilled engineer with deep expertise in analog design and memory compiler flow. You excel in a dynamic environment, leveraging your proficiency in Circuit design, Memory architecture, Python, and Hspice to deliver innovative, high-quality solutions. Your strategic mindset and technical acumen allow you to solve complex engineering challenges and collaborate effectively across multiple functional areas.

Key Responsibilities:

Designing, developing, and evaluating physical IP - Memory compilers (SRAM/RF/ROM/TCAM etc.). Applying your expertise in Circuit design, Memory architecture, Python, and Hspice to optimize workflows and enhance design efficiency. Collaborating with cross-functional teams to align project deliverables with business objectives. Contributing to the technical direction and problem-solving efforts within the engineering group. Sharing knowledge and supporting the professional growth of team members through technical mentorship.

Impact:

Advance our product portfolio with innovative solutions addressing market demands. Improve the efficiency and effectiveness of engineering development workflows. Solve complex engineering challenges, contributing to successful project outcomes. Support the growth and technical development of colleagues through guidance and collaboration. Contribute to Synopsys' success by delivering high-quality products on schedule. Help foster a culture of innovation and continuous improvement within the engineering team.

Requirements:

Bachelor's or master's degree in Electrical Engineering, Computer Science, or a related field. Significant experience in analog design and memory compiler flow. Proficiency in Python and Hspice. Strong problem-solving and technical skills. Ability to work collaboratively and communicate effectively within and across teams.

Team:

You will be part of a dynamic and innovative engineering team at the forefront of high-performance silicon chip and software development. Our team relentlessly pushes technology boundaries, delivering solutions that drive the Era of Pervasive Intelligence. We collaborate closely to ensure our products meet the highest standards of quality and performance.

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big_They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Staff Engineer in our Analog Design team, you will be responsible for designing and developing full custom analog circuit macros for high-speed SERDES PHY IP.

Your responsibilities will include designing and developing full custom analog circuit macros for high-speed SERDES PHY IP, including transceivers, voltage/current-mode drivers, PLLs, DLLs, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, and clock data recovery circuits.

You will also collaborate with cross-functional teams locally and globally to refine circuit implementations and achieve optimal power, area, and performance targets.

In addition, you will ensure analog sub-block performance adheres to SerDes standards and architecture specification documents.

You will lead verification strategies using advanced simulator features to guarantee the highest quality design outcomes.

You will oversee physical layout processes to minimize parasitic effects, device stress, and process variations.

You will present simulation data for peer and customer reviews, and document design features and test plans.

You will consult on electrical characterization and support the integration of your circuit within the SerDes IP product.

You will handcraft high-performance clock and data paths using digital/CMOS logic cells and verify timing margins with SPICE and STA tools.

You will address ESD and latch-up design verification, crosstalk coupling impacts, and ensure robust mixed-signal analog design.

The impact you will have includes accelerating development of high-performance silicon chips critical to emerging technologies like AI, IoT, and 5G.

You will optimize chip designs for power, cost, and performance, helping customers reduce project schedules by months.

You will advance Synopsys' leadership in high-speed interface IP and mixed-signal design innovation.

You will contribute to the creation of next-generation processes and models for manufacturing advanced chips.

You will support global collaboration, knowledge sharing, and technical excellence across teams and sites.

You will enhance customer satisfaction by delivering reliable, scalable, and high-quality analog IP solutions.

You will drive technical best practices and mentor junior engineers, strengthening the team's capabilities.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a UCIe Analog Design Senior Engineer at Synopsys, you will design circuit for Analog IPs like High Speed IOs, LCDL, Bandgap, High Speed macros for high speed PHY, Clock trees, Calibration circuits...

You will analyze and verify to make sure design meet all requirements of functionality, performance, area and reliability.

You will work closely with layout engineers to make sure layout quality. Perform post layout verifications.

You will perform design characterizations, functionality checks, EMIR analysis, Co-simulations for Logic-Analog full chip operations.

You will design analysis and solve problems of noise, margin, signal integrity, power integrity.

You will complete all design quality checks and data quality checks

You will do design reviews across global team

You will work with digital/system engineer to integrate analog designs into mixed signal system. Perform mixed signal verification which combining both analog and digital blocks.

You will train for fresh engineers and interns

The ideal candidate will have a BS/MS in Electronics Engineering, Electromechanics, Telecommunications.

They should have 0-3 years of experience in Analog, Mixed Signal, Memory or Custom logic Circuit design.

They should have solid knowledge of CMOS Analog design knowledge and techniques

They should have solid skill with circuit design tools: SNSP Custom Designer, Cadence Virtuoso

They should have solid understanding circuit simulation tools: Hspice or Spectre or Custom Sim...

They should have good understanding of layout effects on circuit performance.

They should have experienced with writing design review presentations and circuit verification reports

They should have good English communication both verbally and in writing

They should be a great team player, willing to support others.

They should be highly responsible, result oriented.

They should be self-motivated and highly enthusiasm in technology and solving problems

Leadership skill and experience is a plus

Familiar with high speed analog designs, IO designs, PLL/DLL is a plus

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

Responsibilities:

Define and develop ASIC RTL design and verification at both chip level and block level. Collaborate with cross-functional teams to design, implement, and verify PCIe interfaces. Perform RTL coding, synthesis, and simulation to ensure design functionality and performance. Conduct design reviews and provide technical guidance to junior engineers. Work closely with physical design teams to ensure seamless integration and optimization. Debug and resolve design issues to ensure timely delivery of high-quality products.

Impact:

Contribute to the development of high-performance silicon chips that power next-generation technologies. Enhance the functionality and performance of Synopsys' PCIe solutions. Drive innovation and improve design methodologies within the team. Ensure the successful delivery of complex ASIC projects on time and within budget. Mentor and guide junior engineers, fostering a culture of continuous learning and development. Collaborate with cross-functional teams to deliver integrated and optimized solutions for our customers.

Requirements:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in ASIC digital design and verification. Strong knowledge of PCIe protocols and interfaces. Proficiency in RTL coding (Verilog/SystemVerilog) and simulation tools. Experience with synthesis, timing analysis, and formal verification.

Team:

Join a dynamic and collaborative team of engineers dedicated to designing and delivering high-performance silicon solutions. Our team focuses on innovation, quality, and continuous improvement, working together to solve complex technical challenges and deliver industry-leading products.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are an experienced Analog Design Manager with a passion for high-speed SerDes technology. You have a proven track record in leading teams to develop cutting-edge analog integrated circuits. Your expertise in Multi-Gbps NRZ & PAM4 SERDES IP, combined with your strong leadership skills, enables you to guide a team through complex design challenges. You thrive in a collaborative environment, working alongside analog and digital designers from diverse backgrounds. Your technical proficiency is complemented by your ability to develop schedules and action plans that ensure project success. With excellent communication and documentation skills, you effectively present design activities and solutions to critical issues. You are committed to fostering an environment of continuous improvement and operational excellence.

What You’ll Be Doing:

Directing and guiding the activities of a team of analog designers developing high-speed SERDES IP. Conducting design reviews and evaluating the final results of simulation and electrical characterization reports. Presenting the results of design activities, technology assessments, or critical issue investigations and making recommendations for actions necessary to achieve desired results. Selecting, developing, and evaluating personnel to ensure the efficient operation of the team. Developing schedules and action plans to meet overall project timelines. Reviewing documented design features and test plans. Ensuring that the team follows processes and operational policies for maximum design quality. Consulting on the electrical characterization of the SerDes IP product and proposing solutions for post-silicon design updates.

What You’ll Need:

B.Tech/BE/M.Tech/MS in Electronics Engineering. 8+ years of experience in Analog Design for High-Speed SerDes applications. 3-5 years of experience in a management or supervisory role. In-depth familiarity with transistor level circuit design and sound CMOS design fundamentals. Detailed design experience with SerDes sub-circuits such as receive equalizers, samplers, voltage/current-mode drivers, serializers, deserializers,voltage-controlled oscillator, phase mixer, delay-locked loop, phase locked loop, bandgap reference, ADC, and DAC, DSP, Signal Integrity Familiarity with both analog and digital circuits and issues related to interfacing and timing between them. Aware of ESD issues (i.e. circuit techniques, layout). Familiarity with custom digital design (i.e. highspeed logic paths). Knowledge of design for reliability (i.e. EM, IR, aging, etc.). Knowledge of layout effects (i.e. matching, reliability, proximity effects, etc.). Good communication and documentation skills.

The Impact You Will Have:

Driving the development of high-speed SerDes IP that meets industry standards and customer requirements. Fostering innovation and excellence within the analog design team. Ensuring the delivery of high-quality, reliable analog integrated circuits. Contributing to the advancement of Synopsys' technology portfolio in the analog and mixed-signal domains. Enhancing the performance and efficiency of our high-speed communication products. Supporting the growth and development of team members through effective leadership and mentorship.

Who You Are:

You are a proactive leader with a strong technical background in analog design. You possess excellent problem-solving skills and the ability to make sound decisions under pressure. Your collaborative nature allows you to work effectively with cross-functional teams. You are detail-oriented and have a keen eye for quality. Your passion for continuous learning and improvement drives you to stay updated with the latest industry trends and technologies. You are committed to fostering a positive and inclusive team culture, encouraging innovation and excellence.

The Team You’ll Be A Part Of:

You will be part of a fast-growing analog and mixed-signal R&D team developing high-speed analog integrated circuits in the latest FinFET process nodes. The team is composed of talented analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

We are seeking a Senior High-Speed IO Architect to join our team. As a Senior High-Speed IO Architect, you will be responsible for driving integration and delivery of high-speed I/O designs from concept to production.

Responsibilities

• Drive integration and delivery of high-speed I/O designs from concept to production.
• Collaborate with architecture and design teams for optimal circuit performance.
• Lead cross-functional teams, aligning IP and SoC design groups.
• Recruit, train, and mentor engineering talent.
• Ensure designs meet performance, power, area, and reliability goals.
• Manage post-silicon verification and advanced interface development.

The Impact You Will Have

• Drive innovation in high-speed I/O solutions.
• Elevate Synopsys' leadership in silicon IP.
• Build and sustain a world-class engineering team.
• Ensure product quality and customer satisfaction.
• Enable seamless integration of advanced interfaces.
• Deliver scalable solutions for industry leaders.

What You’ll Need

• 15+ years engineering experience in high-speed mixed-signal IC design.
• Expertise across full product lifecycle.
• Leadership in managing engineering teams.
• Strong understanding of advanced technology nodes.
• Experience recruiting and mentoring staff.
• Excellent communication and project management skills.
• UCIe Die-to-Die PHY experience required.

Who You Are

• Strategic thinker and collaborative leader.
• Clear communicator and mentor.
• Adaptable, detail-oriented, and quality-driven.

The Team You’ll Be A Part Of

Join a world-class engineering team pioneering high-speed I/O and interface technologies, committed to innovation, collaboration, and technical excellence.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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At Synopsys, we're seeking a Staff Engineer (Machine Learning) to join our Machine Learning Center of Excellence (ML CoE) within our Silicon Design & Verification business. As a key member of this highly innovative team, you'll be responsible for designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.

Key Responsibilities:

• Designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.
• Integrating ML-driven solutions into a variety of EDA tools, building on the success of DSO.ai and expanding beyond physical implementation.
• Automating chip design flows with scripting languages (Perl, Python, Tcl, shell scripts) to increase efficiency and reproducibility.
• Collaborating with cross-functional teams to identify design bottlenecks and propose innovative solutions for enhancing power, performance, and area (PPA).
• Conducting research and prototyping novel chip design methodologies, demonstrating new concepts, and driving them to productization.
• Staying current with industry trends in silicon design, machine learning, and EDA, and championing their adoption within Synopsys' product lines.

Impact:

• Accelerate the development of next-generation silicon chips by enabling smarter, faster design optimization through AI and machine learning.
• Reduce time-to-market for customers by eliminating months off project schedules, directly impacting their competitiveness.
• Enhance the performance, power efficiency, and cost-effectiveness of chips designed with Synopsys' tools, driving industry-leading outcomes.
• Shape the evolution of EDA software by pioneering ML-driven methodologies adopted by semiconductor leaders worldwide.
• Enable customers to autonomously explore vast design spaces, achieving optimal results with reduced manual intervention.
• Strengthen Synopsys' position as the global leader in silicon design and verification by delivering innovative, high-impact solutions.

Requirements:

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related discipline.
• 5+ years of experience in chip design, EDA, or related fields.
• Expertise in at least one domain of chip design (architectural, micro-architectural, RTL, circuit, or physical design).
• Strong programming and automation skills using Perl, Python, Tcl, or shell scripting.
• Solid understanding of Unix/Linux environments and design flow automation.
• Knowledge of industry-standard RTL design, synthesis, place and route, verification, ATPG, custom-circuit design, and signoff flows.
• Familiarity with low power design techniques, computer architecture, and machine learning principles.

Who We're Looking For:

• A creative problem solver who approaches challenges with curiosity and resilience.
• An effective communicator who collaborates well with multidisciplinary teams.
• Detail-oriented with a passion for quality and continuous improvement.
• Self-driven, adaptable, and comfortable with ambiguity in fast-paced environments.
• Committed to learning, growth, and sharing knowledge with others.

The Team You'll Be A Part Of:

You'll join the Machine Learning Center of Excellence (ML CoE) within Synopsys' Silicon Design & Verification business. This highly innovative team is at the forefront of integrating AI and ML into chip design, collaborating with experts across architecture, implementation, and verification. Together, you'll drive the development of ML-based design optimization solutions and set new standards for the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are seeking a highly skilled and experienced ASIC verification professional to lead technical teams and drive excellence in digital design.

As a Sr Staff Engineer - DDR, you will be responsible for technically leading and driving ownership of critical areas of verification alongside a team of talented verification engineers.

You will specify, design, and implement state-of-the-art verification environments for the DesignWare family of synthesizable cores.

You will perform verification tasks for IP cores, working closely with RTL designers and architects to ensure functional correctness.

You will develop and implement advanced test plans and test environments at both unit and system levels.

You will code and debug test cases, including the creation of complex checkers and assertions using System Verilog/UVM.

You will extract and review functional coverage (FC) and code coverage metrics to ensure quality metric goals are met.

You will manage regressions and contribute to the continuous improvement of verification strategies and test environments.

This role requires a deep understanding of verification methodologies, serial interface protocols, and the intricacies of IP core development.

You should have demonstrated experience in technically leading a team for DDR IP projects, with a track record of successful collaboration and stakeholder management.

You should have proven expertise in developing HVL (System Verilog/UVM) based test environments for complex ASIC designs.

You should have advanced skills in developing and implementing rigorous test plans, checkers, and assertions.

You should have strong proficiency in extracting and analyzing verification metrics such as functional coverage and code coverage.

You should have experience with serial interface protocols and IP design/verification processes; knowledge of DDR/LPDDR is highly desirable.

You should have hands-on experience in owning end-to-end verification deliverables for IPs, including planning, execution, DV metrics closure, and review/signoff.

You will join the DesignWare IP Verification R&D team, a group of talented and passionate engineers committed to advancing Synopsys' leadership in semiconductor IP.

The team focuses on delivering world-class verification solutions for a broad portfolio of synthesizable IP cores, leveraging the latest methodologies and technologies to ensure our products meet the most rigorous quality and performance standards.

Collaboration, innovation, and a drive for excellence define our culture.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Working within a small, highly skilled R&D team, you'll collaborate closely with software engineers, sound designers, and product specialists to bring innovative products from concept to production.

Key Responsibilities

• Design, develop, and test embedded hardware and firmware for audio processing and control systems.
• Contribute to schematic capture, PCB design, and prototype assembly.
• Develop and maintain embedded C/C++ firmware for real-time DSP, network, and control applications.
• Work with cross-functional teams to integrate embedded systems with software and hardware platforms.
• Support the full product lifecycle from concept and prototyping through to production and field deployment.
• Conduct hardware bring-up, debugging, and performance optimization.
• Liaise with manufacturing partners to ensure design-for-manufacture (DFM) and design-for-test (DFT) requirements are met.

Skills and Experience

• Degree in Electronic Engineering, Computer Engineering, or a related discipline.
• Strong experience in embedded systems design using C/C++.
• Experience with schematic capture and PCB layout (e.g. Altium, KiCad).
• Familiarity with ARM Cortex-M or similar microcontroller architectures.
• Embedded Linux experience.
• Understanding of digital and analog audio circuit design.
• Experience with communication protocols such as SPI, I²C, UART, Ethernet and USB.
• Proficient in debugging hardware and firmware using oscilloscopes, logic analysers, and other lab tools.

Benefits

• Life Assurance
• Income Protection
• Pension
• Bike2work scheme
• 25 days holiday (increasing with service)
• Medical Cash Plan and Private Healthcare options
• substantial staff discount on company products

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Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.

Job Description

Category

Engineering

Hire Type

Employee

Job ID

15231

Remote Eligible

No

Date Posted

02/15/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

• An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL , data converters and SERDES design.

• You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction.

• Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive network and interconnect parasitic impact in advanced finfet technology nodes.

• You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology.

• You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation.

• You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution.

What You’ll Be Doing:

• Leading NRZ/PAM4 Serdes analog design transceiver solutions.

• Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes.

• Collaborating with silicon test and debug experts for Sim2Sil correlation.

• Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction.

The Impact You Will Have:

• Driving innovation in mixed-signal advanced analog serdes design.

• Enhancing the performance and efficiency of high-speed physical interfaces.

• Contributing to the development of cutting-edge technology in High Speed PHY IP.

• Improving quality and robustness of design through collaboration and Sim2Sil correlation.

What You’ll Need:

• BE 15+ years of relevant experience or MTech 12+ years of relevant experience in mixed signal analog, clock, and datapath circuit design.

• Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits.

• Knowledge in Equalizers , CDR architectures , high-speed digital circuit design , timing/phase noise analysis, signal integrity .

• Knowledge of RF architecture and blocks such as transceivers front-end , VCOs, LNA, and up/down converters

Who You Are:

• Strong fundamentals of CMOS, device physics, and sub-micron design methodologies.

• Experience with PLL designs and high-speed digital circuit design.

• Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques.

• Familiarity with digitally assisted analog circuit techniques.

• Capable to drive technical decision and tradeoff with customer focus

The Team You’ll Be A Part Of:

Join our High-Performance Computing (HPC) Enterprise analog/mixed-signal Serdes team involved in cutting-edge High Speed PHYSICAL Interface Development.

You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Benefits

At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.

Visit Benefits Page

• ### Health & Wellness

Comprehensive medical and healthcare plans that work for you and your family.

• ### Time Away

In addition to company holidays, we have ETO and FTO Programs.

• ### Family Support

Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.

• ### ESPP

Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.

• ### Retirement Plans

Save for your future with our retirement plans that vary by region and country.

• ### Compensation

Competitive salaries.

\\ Benefits vary by country and region - check with your recruiter to confirm

Get an idea of what your daily routine around the office can be like

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Your contributions will drive innovation in SRAM IP design, maintaining Synopsys’s leadership in memory technology. You will enhance product performance and reliability for global semiconductor customers. You will support the delivery of best-in-class SRAM compilers used in high-performance silicon chips. You will strengthen quality assurance processes, ensuring robust and scalable designs. You will accelerate time-to-market for new memory IP solutions through efficient verification and debug activities. You will contribute to the development of advanced memory architectures, impacting next-generation electronic devices.

To be successful in this role, you will need a Master’s degree in Electrical/Electronic Engineering or a related field. You will have 3–7+ years of hands-on experience in SRAM circuit design. You will have prior understanding of CMOS-based block level circuit design and SRAM architectures. You will have experience with SP/2P/ROM variety design and SRAM bitcell analysis. You will be proficient in digital circuit design and VLSI process concepts. You will have familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell. You will have experience with EDA tools for simulation and design: XA, hspice, Verilog, Starrc, EMIR. Post-silicon debug experience is a plus.

You will be an analytical thinker with strong problem-solving skills. You will be curious and eager to learn new technologies and concepts. You will be detail-oriented and committed to delivering high-quality results. You will be a collaborative team player with effective communication skills. You will be adaptable and able to manage multiple tasks in a fast-paced environment. You will be self-motivated and resourceful in overcoming technical challenges.

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You enjoy solving complex problems and are not afraid to explore new methods and technologies. You bring a strong analytical mindset, excellent problem-solving skills, and a willingness to learn from both successes and setbacks. You value diversity and inclusion, recognizing that the best solutions come from teams with varied perspectives. You take pride in your work, communicate effectively, and are motivated to deliver high-quality results. Whether you are fresh out of graduate school or have a few years of hands-on experience, you are ready to take on new challenges and contribute to innovations that power the next generation of intelligent devices.

What You’ll Be Doing:

• Designing and verifying the robustness of SRAM integrated circuits, ensuring optimal performance and reliability.
• Developing and enhancing SRAM compilers, including GDS and netlist tiling for efficient memory layout and integration.
• Characterizing SRAM modules for timing, power, and functional parameters to meet stringent specifications.
• Analyzing and developing SRAM bitcell design criteria, supporting a wide range of memory architectures.
• Utilizing EDA tools (XA, Hspice, Verilog, Starrc, EMIR) for simulation, verification, and design optimization.
• Collaborating with cross-functional teams to resolve post-silicon issues and continuously improve memory IP quality.
• Exploring new SRAM architectures including SP, 2P, and ROM varieties, contributing to innovation in IP solutions.

The Impact You Will Have:

• Advance the capabilities of Synopsys’s SRAM IP, strengthening its position as an industry leader.
• Deliver high-performance, reliable memory solutions that enable next-generation chips for global customers.
• Drive innovation by creating robust, scalable, and energy-efficient SRAM designs.
• Enhance the efficiency and productivity of the design team through automation and process improvements.
• Support successful silicon tapeouts and post-silicon validation, ensuring product excellence.
• Contribute to a collaborative and inclusive team culture that values knowledge sharing and continuous learning.

What You’ll Need:

• Master’s degree in Electrical/Electronic Engineering or a related field.
• Strong understanding of CMOS-based block level circuit design and SRAM architectures.
• Solid grasp of digital circuit design and VLSI process concepts.
• Familiarity with scripting languages such as Python, Tcl/Tk, Perl, and Unix shell for workflow automation.
• Experience 3~10 years in SRAM circuit design, bitcell analysis, and design criteria development.
• Knowledge of SP/2P/ROM variety designs and post-silicon debug processes is a plus.
• Proficiency with EDA tools including XA, Hspice, Verilog, Starrc, and EMIR for simulation and verification.

Who You Are:

• Innovative thinker with a strong desire to learn and explore new technologies.
• Detail-oriented and analytical, capable of tackling complex technical challenges.
• Collaborative team player who values diverse perspectives and open communication.
• Effective communicator able to present ideas clearly and work across global teams.
• Resilient and adaptable, able to thrive in a fast-paced, ever-evolving environment.
• Proactive problem solver who takes ownership of projects and drives results.

The Team You’ll Be A Part Of:

You will join Synopsys’s world-class SRAM circuit and compiler design department, the largest of its kind globally. Our team is at the forefront of memory IP solutions, working collaboratively to deliver robust, high-performance SRAM products for a diverse range of applications. We foster a culture of innovation, knowledge sharing, and continuous improvement, empowering each member to contribute to the advancement of cutting-edge technologies in semiconductor design.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are: You are a passionate and inventive analog circuit design engineer with a deep-rooted curiosity for emerging technologies and industry-leading semiconductor processes. You thrive in dynamic, collaborative environments and are recognised for your ability to balance technical depth with practical implementation.

Responsibilities: Designing and developing best-in-class ESD and Latch-Up robust solutions for advanced interface IPs using cutting-edge FinFet, FDSOI, and BCD processes. Owning the full lifecycle of ESD structures—from schematic design, simulation, and layout to silicon qualification and production release. Leading and executing I/O development, including I/O ring design, review, and optimisation for performance and robustness. Developing and qualifying Interface Testchips, ensuring comprehensive ESD and Latch-Up validation to meet global customer requirements. Running ESD simulations by building detailed ESD networks and performing advanced analyses to ensure design integrity. Applying foundry-provided PERC (Physical Verification Rule Check) rules and using PERC check tools to validate compliance and enhance design quality. Collaborating closely with foundry partners, design, and layout teams to ensure timely and effective integration of ESD and LU solutions.

The Impact You Will Have: Elevating the reliability and performance of Synopsys' interface IPs, directly influencing the success of global semiconductor customers. Driving innovation in analog circuit design for next-generation silicon technologies, helping Synopsys maintain its leadership in the industry. Reducing field failures and increasing product longevity by delivering robust ESD and Latch-Up protection solutions. Accelerating time-to-market for customer products through efficient and high-quality design practices. Fostering a culture of technical excellence and continuous improvement within the analog design team. Building strong partnerships with foundries and cross-functional teams, enhancing collaboration and knowledge sharing across projects.

What You’ll Need: Proven experience in analog circuit design, with a focus on I/O development and ESD/LU robustness. Hands-on expertise with FinFet, FDSOI, and BCD process technologies from leading foundries. Strong background in ESD and Latch-Up qualification methodologies, including testchip development and validation. Proficiency in ESD simulation, ESD network construction, and use of industry-standard tools. Comprehensive understanding of PERC rules and practical experience with PERC verification tools. Experience working with cross-functional teams including foundry, design, and layout groups.

Who You Are: An analytical thinker with excellent problem-solving skills and keen attention to detail. A collaborative team player who values diversity, inclusion, and open communication. A proactive learner who stays current with industry trends and emerging technologies. An effective communicator, able to translate complex technical information to diverse audiences. A results-driven individual who is adaptable, resilient, and comfortable with fast-paced, high-impact work.

The Team You’ll Be A Part Of: You’ll join a passionate, multidisciplinary team of analog and mixed-signal engineers dedicated to advancing Synopsys’ interface IP portfolio. The team is focused on delivering robust, innovative, and high-quality solutions that meet the rigorous demands of a global customer base. Collaboration, continuous improvement, and technical mentorship are at the core of our culture, ensuring you’ll have the support and opportunities needed to thrive and grow.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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San Francisco

Employment Type

Full time

Department

Scaling

Compensation

• $266K – $445K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

More details about our benefits are available to candidates during the hiring process.

This role is at-will and OpenAI reserves the right to modify base pay and other compensation components at any time based on individual performance, team or company results, or market conditions.

About the Team

OpenAI’s Hardware team designs the custom silicon that powers the world’s most advanced AI systems. From system-level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the stack.

About the Role

We are seeking a highly skilled Silicon Implementation Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next-generation AI accelerators.

You’ll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon’s performance and cost efficiency, as well as the team’s execution velocity and quality.

In this role, you will:

• Develop, build and own tools, flows and methodologies for physical implementation
• Own physical implementation of floorplan blocks from floorplanning to final signoff
• Collaborate with RTL designers to drive optimal block implementation solutions
• Analyze and optimize design for timing, power, and area trade-offs, working in collaboration with EDA vendors and ASIC partners

Qualifications:

• BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development
• Demonstrated success in taping out complex silicon designs
• Hands-on experience with block physical implementation and PPA convergence
• Strong coding experience with python, bazel, TCL
• Strong experience building physical design tools, flows and methodologies
• Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure.
• Deep familiarity with industry-standard tools and flows for physical synthesis, PNR, LEC and power estimation

Bonus:

• Experience with AI or HPC-focused chips
• Experience with optimizing PPA for high performance compute cores
• Hands-on experience with top-level design methodologies

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

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Full Time

Frankfurt, Germany

Experienced Professional

April 14, 2025

Based in Frankfurt, Hyundai Motorsport GmbH is responsible for Hyundai’s global motorsport activities and primarily for its World Rally Championship program. We are currently looking for an Electrical System Design Engineer to join our team.

Main tasks

• Demonstrable experience of electrical system design - specifically circuit design, wiring/fusing and electrical packaging.
• Proficient in the creation of schematics and 2d harness drawings in line with industry recognised EDS standards.
• Design, development and production release solutions for the electrical package and wiring systems for our range of vehicles.
• Familiar with Catia V5 design tools including the electrical harness work bench and the creation of detailed harness routes and feasible design solutions from conceptual phase.
• Able to present design information to support both external and internal project status reviews.
• Practical vehicle fault analysis and electrical harness modification.
• Experience with program launch engineering and manufacturing support, including guidance for installation and rework by Manufacturing and Service departments.

Qualifications

• Bachelor’s Degree in Engineering, ideally from an electrical discipline.
• Min. 3 years of relevant work experience within motorsport industry.
• Well organised mental approach, flexibility to modify immediately planned operation according to last minutes issues.
• Fluent English is compulsory.
• Knowledge on High Voltage Systems & Motorsport Looms.
• Knowledge of MS Office (Excel, Access, Outlook), Catia V5.
• You complete tasks with minimal guidance and work under pressure to meet deadlines.

Our offer

• Secure and long-term employment relationship.
• Market and performance-related remuneration.
• Training and career development.
• Working in an international and dynamic environment.
• 30 days vacation per calendar year.
• Attractive benefits.
• Car leasing options.

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Collaborate to define product goals Conceive, design, evaluate, and produce novel gaming hardware Work closely with contract manufacturers to prototype and produce hardware at scales from tens to millions of units

Electrical engineers at Valve have significant industry experience. We usually don’t hire recent graduates.

Members of our team typically have the following skills:

Proven start-to-finish design skills with industry-standard CAD/EDA tools (Altium Designer experience strongly preferred), including schematic entry, PCB layout, component definition, and CAD library management Hands-on electronics prototyping experience, including soldering and rework of fine-pitch SMT components Strong lab skills, including the use of common test and measurement equipment (oscilloscopes, logic analyzers, etc.) to debug and characterize complex electronic circuits Experience with embedded systems design and common digital communication interfaces (USB, SPI, I2C) Experience working directly on-site with manufacturing partners A proven track record of designing and shipping high-volume consumer electronics products Experience in design for manufacture and design for test (DFM/DFT) of electronic devices Ability to think and work across a variety of subject areas

Bachelor's degree (or equivalent work experience) in electrical engineering or a related field

Our team includes individuals with expertise in the following areas:

Analog circuit design and simulation (e.g. SPICE) Low-power design, including battery management and charging circuits for portable devices RF/wireless circuit design, including design of antennas and for EMC Firmware development for 8, 16, 32-bit microcontrollers (e.g. ARM) High speed/HDI board design Digital Signal Processing (DSP) High speed video interfaces (HDMI, Display Port, LVDS, MIPI) Regulatory compliance testing (e.g. FCC/CE/UL) C/C++ software development Test automation FPGA/ASIC design

What We Offer

An organization where 100% of time is dedicated as groups see fit The opportunity to collaborate with experts across a range of disciplines A work environment and flexible schedule in support of families and domestic partnerships A culture eager to become stronger through diversity of all forms Exceptional health insurance coverage Unrivaled employer match for our 401(k) retirement plan Generous vacation and family leave On-site amenities in support of health and efficiency Fertility and adoption assistance Reimbursement for child care during interviews

Valve strives to improve the diversity of our teams to better serve our diverse global audience. We welcome and encourage individuals from all backgrounds to apply.

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What you'll do

• Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.
• Developing comprehensive test cases to ensure robust product functionality and performance.

What you need

• BS/MS in Computer Science, Electrical Engineering, or related field.
• 5 years of hands-on experience in RTL design and verification.

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What you'll do

• Design and develop high-speed analog and mixed-signal ICs
• Collaborate with cross-functional teams to develop and implement new design methodologies and tools

What you need

• Bachelor's degree in Electrical Engineering or related field
• 3+ years of experience in analog and mixed-signal IC design
• Strong understanding of analog and mixed-signal circuit design and analysis
• Experience with SPICE simulators and EDA tools
• Strong communication and teamwork skills

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What you'll do

• Reviewing and interpreting SerDes standards to define, develop, and refine innovative transceiver architectures and detailed analog sub-block specifications for high-speed Multi-Gbps NRZ & PAM4 SerDes IP.
• Investigating and architecting advanced circuit solutions that address performance bottlenecks, driving significant improvements in power, area, and speed while ensuring robust and reliable silicon performance.

What you need

• Strong understanding of analog circuit design and verification techniques.
• Experience with high-speed SerDes IP development and advanced process nodes such as FinFET and gate-all-around technologies.

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What you'll do

• Developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products.
• Writing and maintaining advanced testcases using SystemVerilog and UVM methodologies to ensure thorough coverage and robust verification.
• Debugging and analyzing complex testbench and design-related issues, collaborating closely with design and mixed-signal engineering teams.

What you need

• Bachelor’s or Master’s degree in Electrical Engineering (BSEE or MSEE) with a minimum of 10 years of digital design/verification experience.
• Proven experience in writing and maintaining testcases using SystemVerilog/UVM.
• Strong debugging skills for complex testbench and design-related issues.
• Solid understanding of digital circuit design concepts and principles.
• Proficiency with scripting languages such as Python or Perl for automation and workflow enhancement.

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What you'll do

• Define, implement, and track comprehensive verification test plans to ensure robust coverage and quality for SERDES IP.
• Build, enhance, and maintain top-level UVM-based System Verilog testbenches and AMS co-simulation environments, integrating RTL, behavioral models, and transistor-level netlists.

What you need

• Bachelor's or master's degree in electrical engineering or a related field.
• Strong foundational understanding of analog circuits (op-amps, bandgaps, PLLs, ADCs, TX/RX components, etc.).
• Exposure to Verilog/System Verilog and AMS concepts or circuit design (coursework, labs, or hands-on experience).

Why this matters

As a Mixed-Signal AMS Co-Simulation Verification Engineer, you will play a critical role in ensuring the quality and reliability of our high-performance SERDES and mixed-signal IP, which powers AI, automotive, cloud, and mobile applications at massive scale.

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What you'll do

• Reviewing SerDes standards and architecture documents to develop comprehensive analog sub-block specifications.
• Identifying and refining circuit implementations to achieve optimal power, area, and performance targets.
• Proposing and executing design and verification strategies that leverage advanced simulator features for highest-quality design outcomes.

What you need

• BS/BTech degree and 5+ years of experience in IC design, or MS/MTech with 3+ years of experience or PhD degree in a related field.
• In-depth familiarity with transistor-level circuit design and solid CMOS fundamentals.
• Silicon-proven experience implementing circuits for TX, RX, and Clock paths within SerDes architectures.

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What you'll do

Are you a team player who thrives on responsibility, with strong analytical and negotiating skills? Then you are the right person to take on this challenge. Experience team work and be inspired by the passion of our 500-strong workforce for motorsport and automotive projects.

• Design, develop, and optimize electronic systems, PCBs, sensors, and data acquisition solutions used in wind tunnel operations.
• Build and maintain LabVIEW-based measurement routines, test automation frameworks, and control interfaces for wind tunnel equipment.
• Create software applications and tools (MATLAB, Python, C/C++, C#, etc.) to support data processing, instrumentation control, automation, and workflow efficiency.

What you need

• Bachelor’s or Master’s degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related field.
• Proven experience in electronic circuit design, PCB development, component selection, and system integration.
• Solid experience with at least one high-level programming language (Python, C#, Java, or similar).
• Practical, hands-on expertise in LabVIEW (required), including data acquisition, instrument control, software architectures, LabVIEW Real-Time, FPGA programming, and automated testing.

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What you'll do

• Work close with customers to understand new requests or customization feature from customer’s PRD/MRD
• Provide integration training to customers and conduct reviews on their major SoC milestones
• Provide feedback to Synopsys R&D for customization feature or continuous IIP product improvements
• Participate in IIP design reviews to align development with future customer needs
• Creativity and Innovation is highly inspired: such as developing small tools to simplify daily jobs or improving efficiency; authoring application notes for gate-level simulation, silicon debug and physical implementation.

What you need

• Bachelor’s and/or master’s degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science
• Minimum 5 years of Analog or Mixed signal IP or ASIC Design/Verification/Applications experience is required
• Hands-on experience on circuit design, RTL coding, simulation, synthesis, static timing check, equivalence check, etc.
• Domain knowledge PCI Express, CXL, Ethernet protocols
• Creative results are oriented with the ability to manage multiple tasks concurrently.
• Good verbal and written communication skills in English and ability to interact with customer
• High degree of self-motivation and personal responsibility
• Good inference, reasoning and problem-solving skills, and attention to details

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What you'll do

We are seeking a highly experienced Architect specializing in high‑speed SerDes design with deep expertise in advanced analog/mixed‑signal circuits, XSR (Extra‑Short‑Reach) interfaces, and optical I/O technologies.

What you need

• 15+ years of experience in analog/mixed‑signal circuit design, SerDes PHYs, or related high‑speed I/O.

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What you'll do

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

• Designing and verifying complex ASIC digital and mixed-signal systems using Verilog or VHDL.
• Analyzing digital and analog specifications to develop robust system-level designs.

What you need

• Master’s degree in Electrical Engineering or related field, with at least 5 years of relevant industry experience.
• Proficient in Verilog or VHDL for digital design and verification.

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What you'll do

You are an accomplished analog and mixed-signal design engineer, passionate about pushing the boundaries of high-speed interface technology. With a strong foundation in Electrical, Electronics, or VLSI Engineering, you have hands-on expertise in custom analog circuit design, particularly in the nanometer CMOS domain.

• Designing and developing high-speed analog and mixed-signal (AMS) circuit macros, including analog front-end transceivers, voltage/current-mode drivers, PLLs, DLLs, regulators, equalizers (CTLE, FFE, DFE), impedance calibrators, serializers/deserializers, VCOs, phase interpolators, bandgap references, CDR circuits, and injection-locked loops for High-Speed PHY IP in planar and FinFET CMOS technologies.

What you need

• Bachelor’s degree (BE) plus 3+ years or Master’s degree (MTech) plus 2+ years of relevant experience in mixed-signal analog/custom circuit design, preferably in Electrical/Electronics/VLSI Engineering.

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What you'll do

You will lead the NVM TestChip and IP design flow across multiple technologies and foundries, ensuring robust and scalable solutions for diverse applications.

• Architecting, designing, and verifying CMOS-based non-volatile memory IP modules, from concept to production tapeout.
• Collaborating with product engineers to perform silicon verification, in-depth testing, and debugging to validate IP performance on silicon.
• Conducting post-layout extraction, simulation, and comprehensive testing in conjunction with silicon validation teams.

What you need

• 5–12+ years of industry experience in circuit design, with a strong emphasis on analog circuit design and analysis; memory design experience is a significant plus.
• Deep understanding of layout considerations for advanced nodes, including parasitic effects, matching techniques, and signal integrity.
• Expertise in electrical problem-solving, including root cause analysis of circuit failures and development of effective solutions.
• Hands-on experience with TestChip tapeout flows, silicon debugging (FIB, micro-probing, post-layout RC extraction), and statistical design methodologies (e.g., Monte-Carlo analysis).
• Strong transistor-level analog design skills, including sense-amplifier, charge pump, high voltage regulator, and bandgap reference circuit design.
• Proficiency with circuit simulation tools (HSIM, HSPICE, etc.) and custom schematic/layout editors (e.g., Custom Compiler).
• Experience with low power design, power management circuitry, and FinFET design is a plus.

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What you'll do

You will be designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.

• Designing and verifying RTL for advanced Silicon Lifecycle Management (SLM) IPs, including next-generation 3D-IC projects.
• Developing comprehensive test cases to ensure robust product functionality and performance.
• Collaborating with customers and internal engineering teams to resolve technical issues, including hands-on debugging and root cause analysis.
• Staying current with emerging trends, standards, and best practices in SLM and 3D-IC technologies.
• Contributing to the improvement of verification methodologies and automation flows.
• Documenting design specifications, verification plans, and results to ensure transparency and repeatability.
• Participating in code reviews and technical discussions to drive innovation and continuous improvement.

What you need

• BS/MS in Computer Science, Electrical Engineering, or related field.
• 8+ years of hands-on experience in RTL design and verification.
• Proficiency in EDA tools, Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.
• Experience working in Unix/Linux environments.
• Strong debugging and problem-solving skills, especially in complex chip design environments.
• Excellent written and verbal communication skills in English.
• Knowledge of digital, analog, and mixed-signal IP/circuit design (a plus).
• Familiarity with 3D-IC standards and semiconductor verification best practices (desirable).

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What you'll do

As a Technical Specialist, you will be responsible for the technical delivery of the controls/electrification portion of the project. Detailed responsibilities include:

• Defines, plans, leads, and performs System Component Development, Controls Software Development, System Integration, and System Verification & Validation activity and other relevant engineering project work within project team as required.
• Plans and manages engineering program resources according to project requirements.

What you need

• Bachelors’ degree or equivalent in Mechanical Engineering, Electrical Engineering, Control Systems Engineering or related field
• Strong experience in controls development in an automotive, or similar industry
• Matlab/Simulink, C, Python, etc
• Strong experience in electrical circuit design, ideally HV/power electronics development

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What you'll do

• Lead the design and development of high-speed IO, DDR, and HBM interfaces.
• Collaborate with cross-functional teams to drive innovation and deliver high-quality products.
• Develop and maintain technical documentation and presentations.

What you need

• Bachelor's degree in Electrical Engineering or Computer Science.
• 10+ years of experience in analog and mixed-signal design.
• Strong understanding of analog IC architecture and transistor-level circuit design.
• Excellent communication and leadership skills.

Why this matters

• Enhance team efficiency and influence product strategy.
• Deliver innovative solutions that shape the future of semiconductor technology.
• Make a significant impact and drive business growth.

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What you'll do

Reviewing SERDES standards to develop innovative transceiver architectures and sub-block specifications for Multi-Gbps NRZ & PAM4 SERDES IP.

• Investigating and architecting advanced circuit solutions to overcome bottlenecks, achieving breakthroughs in power efficiency, area reduction, and performance.

What you need

• Collaborating with cross-functional teams including analog, digital, and layout engineers.

Why this matters

As a trusted leader in the analog design community, your attention to detail, ownership mindset, and commitment to quality position you for success.

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What you'll do

Work closely with analog circuit teams to extract all necessary details, simulate, and sign off on high-fidelity models by rigorous comparison with SPICE-level simulations and silicon data.

• Develop and refine behavioural models of the analog portions of high-speed SerDes blocks (TX/RX, ADC, DAC, CDR, CTLE/equalizer, VGA/amplifier, PLL, VCO, Phase Interpolator).

What you need

BSc, MSc or PhD in Electrical/Computer Engineering, with 7+ years of relevant industry experience.

• Advanced proficiency in RNM, mixed-signal verification, and high-speed SerDes design.

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