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Application Engineering, Sr Staff Engineer

Bengaluru, Karnataka, India

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Category

Engineering

Hire Type

Employee

Job ID

15544

Date posted

04/12/2026

A peek inside our office

Po Popal

Workplace Resources, Sr Director

Alternate Job Titles:

• Senior Staff Application Engineer

• Lead Application Engineer

• Principal Application Engineer

• Technical Solutions Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and versatile engineering professional who thrives in a dynamic, fast-paced environment. With a deep technical acumen and a knack for creative problem-solving, you are driven to deliver innovative solutions that address complex challenges. You have a proven track record in application engineering, accompanied by a strong understanding of EDA tools, chip design flows, and customer-centric solution delivery. You are an excellent communicator, able to articulate technical concepts clearly to both engineering teams and external stakeholders. Adaptable and resourceful, you embrace new technologies and strive for continual learning, eager to stay ahead in a rapidly evolving industry.

You value collaboration and are committed to fostering an inclusive, supportive team culture. Your leadership skills shine in mentoring others and guiding cross-functional projects. You are motivated by the opportunity to shape technology that impacts millions of lives and are ready to take ownership of challenging projects. Your customer-first mindset ensures that you consistently deliver high-impact results, while your attention to detail guarantees the reliability and quality Synopsys is known for. If you are looking for a role where your expertise will be recognized and your contributions will make a tangible difference, this is the opportunity for you.

What You’ll Be Doing:

• Collaborating with customers to understand their technical challenges and providing comprehensive solutions using Synopsys tools and platforms.

• Driving the adoption and integration of EDA tools in customer design flows, ensuring optimal utilization and performance.

• Developing and delivering technical workshops, training sessions, and product demonstrations tailored to customer needs.

• Partnering with R&D and product management teams to influence product direction and resolve complex technical issues.

• Authoring and maintaining technical documentation, application notes, and best practice guides.

• Providing pre- and post-sales technical support, including troubleshooting, bug tracking, and solution development.

• Mentoring and guiding junior engineers, fostering a culture of technical excellence and innovation.

The Impact You Will Have:

• Accelerating customer success by ensuring seamless deployment and integration of Synopsys solutions.

• Enhancing product quality and usability through direct feedback and collaboration with R&D teams.

• Expanding Synopsys’ footprint in key accounts by demonstrating technical excellence and building strong customer relationships.

• Reducing design cycle times and improving overall productivity for our customers.

• Contributing to the growth of Synopsys’ technical community through knowledge sharing and mentoring.

• Influencing future product innovations by identifying emerging customer needs and market trends.

What You’ll Need:

• Strong expertise in ASIC/FPGA design and verification methodologies.

• Hands-on experience with industry-leading EDA tools such as synthesis, simulation, and formal verification platforms.

• Proficiency in scripting languages (e.g., Python, Perl, TCL) and automation frameworks.

• Solid understanding of digital design, SoC architectures, and semiconductor manufacturing processes.

• Ability to analyze and resolve complex technical issues quickly and effectively.

Who You Are:

• Innovative thinker with a proactive approach to problem-solving.

• Excellent communicator, able to convey complex technical concepts to diverse audiences.

• Collaborative team player who values diversity and inclusion.

• Customer-oriented with a commitment to delivering outstanding service and solutions.

• Adaptable, resilient, and eager to learn new technologies and methodologies.

The Team You’ll Be A Part Of:

You’ll join an accomplished team of application engineering experts at the forefront of EDA and semiconductor innovation. Our team partners closely with customers, R&D, and product management to deliver world-class solutions and technical support. We foster a collaborative, inclusive culture that encourages continuous learning, knowledge sharing, and professional growth. Together, we drive the adoption of cutting-edge technologies and ensure Synopsys remains the trusted partner for industry leaders worldwide.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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We currently have 700 open roles

Innovation Starts Here

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Where?When autocomplete results are available use up and down arrows to review and enter to select. Touch device users, explore by touch or with swipe gestures.

Application Engineering, Sr Enginer

Bengaluru, Karnataka, India

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Hire Type EmployeeJob ID 17054Date posted 04/20/2026

A peek inside our office

Po Popal

Workplace Resources, Sr Director

Alternate Job Titles:

• Applications Engineer – Static Timing Analysis
• PrimeTime Specialist
• STA Solutions Engineer
• Silicon Verification Engineer
• Customer Success Engineer – EDA Tools

We Are:

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about building high-performance silicon chips,faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance,eliminating months off their project schedules.

You Are:

You are a seasoned engineer with a keen interest in cutting-edge semiconductor technology and a passion for delivering customer-centric solutions. With a strong background in static timing analysis, you understand the intricacies of chip design and the critical role of timing verification in successful tapeouts. You thrive on solving complex technical challenges, whether through competitive benchmarking, customer training, or advanced collaboration initiatives. Your experience with Synopsys PrimeTime sets you apart, and you’re adept at explaining technical concepts to both engineers and management audiences.

You possess exceptional communication skills, enabling you to build relationships and foster trust with customers and internal teams alike. You are comfortable leading technical discussions, delivering workshops, and supporting users through the entire lifecycle of their projects. Your analytical mindset helps you dissect timing-related issues, process variations, and signal integrity challenges, ensuring that your customers achieve optimal results.

As a collaborative team player, you value diverse perspectives and enjoy working across functions,including R&D, marketing, and sales,to drive product enhancements and customer satisfaction. You are proactive, resourceful, and adaptable, always ready to learn and grow in a fast-evolving industry. Your dedication to excellence and innovation makes you a valuable asset to Synopsys and its customers.

What You’ll Be Doing:

• Driving increased adoption of Synopsys PrimeTime by executing competitive benchmarks and product evaluations for customers.
• Articulating product advantages and technical superiority to customer design teams and management in both pre-sale and post-sale engagements.
• Delivering customer training sessions, workshops, and hands-on support to enhance user proficiency and satisfaction.
• Providing tape-out support, troubleshooting timing issues, and guiding customers through complex design challenges.
• Collaborating with R&D, marketing, and sales teams to relay customer feedback and contribute to product enhancements.
• Engaging in advanced initiatives that foster innovation and strengthen customer relationships.
• Developing technical documentation and best practices to streamline customer adoption and usage.

The Impact You Will Have:

• Accelerating customer project schedules by enabling efficient and accurate timing analysis using PrimeTime.
• Enhancing product usage and satisfaction, driving customer loyalty and long-term partnerships.
• Contributing to the continuous improvement of Synopsys STA tools by providing actionable insights from real-world customer engagements.
• Supporting industry-leading chip design teams in achieving successful tapeouts and meeting performance targets.
• Empowering customers to overcome complex timing, process variation, and signal integrity challenges.
• Strengthening Synopsys’ reputation as the provider of choice for advanced silicon design and verification solutions.

What You’ll Need:

• Hands-on experience with Synopsys PrimeTime static timing analysis tool.
• Deep understanding of timing corners, modes, process variations, and signal integrity issues.
• Familiarity with synthesis, physical design, extraction, and ECO methodologies.
• Strong proficiency in TCL scripting for tool customization and automation.
• Excellent verbal and written communication skills, with prior customer-facing experience preferred.
• BSEE or equivalent with 3–5 years of relevant experience, or MSEE/equivalent with 2–4 years.

Who You Are:

• Clear, confident communicator able to engage technical and non-technical audiences.
• Analytical problem-solver with a detail-oriented approach to complex technical challenges.
• Collaborative team player who thrives in cross-functional environments.
• Adaptable and resourceful, comfortable with evolving technologies and project priorities.
• Customer-focused, demonstrating empathy and proactive support.
• Self-motivated, eager to learn and contribute to innovation.

The Team You’ll Be A Part Of:

You will join the applications engineering team supporting the industry-leading Static Timing Analysis tool, PrimeTime. The team’s mission is to drive customer success by delivering expert guidance and technical support, ensuring seamless adoption and optimal usage of Synopsys STA solutions. Working closely with customers and internal stakeholders, the team fosters a culture of innovation, collaboration, and continuous improvement, shaping the next generation of chip design and verification technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Sr Director of ASIC Physical Design, you will own and drive the end-to-end physical design flow for high-speed die-to-die interconnect and interface chips targeting 2 GHz+ on advanced process nodes (sub-7nm/5nm/3nm).

Key responsibilities include:

• Leading floorplanning, power planning, clock tree synthesis, place-and-route, and physical verification with emphasis on die-to-die interface placement and bump/pad ring constraints.

• Achieving timing closure across all corners and modes, with expertise in multi-corner multi-mode sign-off for high-speed serial and parallel interfaces.

• Driving power integrity, signal integrity, and thermal analysis to meet stringent tape-out criteria for high-bandwidth die-to-die links.

• Defining and owning physical design methodology, Synopsys tool flows, and best practices across the organization.

• Building, mentoring, and leading a globally distributed team, establishing effective communication and collaboration norms to foster cohesion and engineering excellence.

• Collaborating cross-functionally with RTL design, DV, architecture, CAD/EDA, and program management teams globally.

• Owning physical design schedules and milestones for multiple concurrent projects, communicating status to senior leadership and mitigating risks proactively.

• Championing automation and scripting to improve PPA outcomes and team productivity.

The impact you will have:

• Enable the physical implementation of high-speed die-to-die interconnects that power large-scale AI accelerators, GPU clusters, and multi-die systems.

• Deliver ultra-low latency, high-bandwidth chip-to-chip communication at the core of next-generation AI infrastructure.

• Advance the adoption of cutting-edge process nodes and interface standards, positioning Synopsys as a leader in silicon innovation.

• Ensure robust engineering quality, execution velocity, and successful tape-outs across global teams.

• Drive organizational excellence by fostering a culture of accountability, growth, and technical mastery.

• Shape methodologies and tool flows that set industry benchmarks for high-speed, advanced-node physical design.

• Contribute to the strategic direction of AI silicon and interconnect products, impacting the broader technology ecosystem.

Requirements:

• 15+ years of hands-on physical design experience, with deep expertise in high-frequency (≥2 GHz) chip design.

• Expertise with Synopsys IC Compiler II (ICC2), PrimeTime, Fusion Compiler, StarRC, IC Validator, and PrimePower.

• Track record of taping out high-speed interface ICs, die-to-die interconnect chips, SerDes, or similar designs at advanced process nodes (7nm, 5nm, 3nm).

• Understanding of die-to-die interface standards and protocols (UCIe, BoW, HBI, XSR, or proprietary) and their physical implementation.

• Experience with power intent flows (UPF/CPF), low-power design techniques, and dynamic/static power optimization.

• Strong scripting skills (Tcl, Python, Perl) for tool flow automation and PPA optimization.

• Proven ability to lead and grow globally distributed engineering teams of 10+ people.

• Cross-cultural communication and collaboration skills; experience working across US, Asia, or European engineering centers.

• BS or MS in Electrical Engineering, Computer Engineering, or related field (PhD preferred).

As a Sr Director of ASIC Physical Design, you will join a globally distributed Silicon Engineering team focused on the physical implementation of cutting-edge AI silicon and high-speed die-to-die interconnects.

Our team spans multiple sites and time zones, collaborating with process technology, packaging, RTL, DV, architecture, CAD/EDA, and program management teams.

We pride ourselves on a culture of technical depth, low bureaucracy, and a relentless drive for engineering excellence.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You are an experienced and highly motivated individual with a passion for technology and innovation. You have a strong technical background in RTL, Physical Design, and post-silicon test and testability development. Your expertise in debugging and developing Process, Voltage, Temperature, Current, and Droop sensors is unparalleled. You thrive in a dynamic environment and excel in communication, teamwork, and leadership.

Key Responsibilities:

• Serve as the single point of contact for post-silicon debug activities.
• Enable Product Requirement Documents (PRDs).
• Work to enable IP as a product development platform.
• Handle hands-on post-silicon test setups.
• Collaborate on top-level physical design, board-level, and package-level designs.
• Develop post-silicon reports and conduct debug analysis.

Impact:

• Drive the successful development and deployment of PVT IP sensors.
• Enhance the reliability and performance of Synopsys' silicon lifecycle monitoring solutions.
• Ensure high-quality product development through meticulous testing and debugging.
• Contribute to the continuous innovation in chip design and software security.
• Support Synopsys' leadership in the market for PVT IP developments.
• Empower the creation of high-performance silicon chips used in various advanced technologies.

Requirements:

• Hands-on experience in post-silicon test setups.
• Sound knowledge of Digital/AMS chip design and post-silicon debug.
• BS or MS degree in Electrical Engineering with 3+ years of experience.
• Understanding of top-level physical design, board-level, and package-level designs.
• Expertise in RTL development and physical design.

Team: You will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a dynamic, results-driven leader with a passion for building lasting relationships and driving transformative growth. With a proven track record in high-tech B2B sales, you excel at navigating complex organizations and thrive in fast-paced, innovative environments. Your strategic mindset enables you to identify new opportunities, craft compelling solutions, and deliver exceptional value to customers. You are adept at leading diverse teams, mentoring talent, and fostering a culture of collaboration and high performance.

What You’ll Be Doing:

• Developing and executing strategic account plans to drive revenue growth and market share within key accounts.
• Building and nurturing long-term relationships with senior customer stakeholders, becoming a trusted advisor and partner.
• Leading and mentoring a high-performing sales team, fostering a culture of accountability, innovation, and continuous improvement.
• Collaborating cross-functionally with marketing, product, and technical teams to deliver tailored solutions that address customer challenges.
• Analyzing market trends, customer feedback, and competitive intelligence to identify new business opportunities and refine go-to-market strategies.
• Managing the end-to-end sales cycle, including forecasting, contract negotiation, and ensuring post-sale customer satisfaction.
• Representing Synopsys at industry events, conferences, and customer meetings to enhance brand visibility and thought leadership.

The Impact You Will Have:

• Accelerate Synopsys’ growth by driving significant revenue and expanding strategic partnerships in key markets.
• Shape the future of technology adoption by enabling customers to leverage Synopsys’ cutting-edge solutions.
• Elevate customer experience through proactive engagement and exceptional service delivery
• Enhance Synopsys’ market positioning by providing valuable insights to inform product development and innovation.
• Foster a collaborative, high-performing sales culture that attracts and retains top talent.
• Champion Synopsys’ values of innovation, integrity, and customer focus across all engagements.
• Drive operational excellence by optimizing sales processes and leveraging data-driven decision making.

What You’ll Need:

• Bachelor’s degree in business, engineering, or a related technical field; MBA or advanced degree preferred.
• 20+ years of progressive sales experience in the semiconductor, EDA, or enterprise software industry, with at least 10 years in a leadership role.
• Demonstrated success in managing complex, high-value accounts and closing large enterprise deals.
• Strong understanding of chip design, verification, IP integration, or software development life cycles.
• Exceptional analytical and strategic planning skills, with proficiency in CRM tools and sales analytics platforms.
• Excellent negotiation, presentation, and communication abilities in both English and Korean.

Who You Are:

• Inspirational leader who motivates and empowers teams to achieve ambitious goals.
• Relationship builder who earns trust and credibility with customers and colleagues alike.
• Strategic thinker with a proactive, solutions-oriented approach to challenges.
• Adaptable and resilient, thriving in dynamic, high-growth environments.
• Collaborative partner who values diversity, inclusion, and open communication.
• Highly ethical, accountable, and committed to delivering on promises.

The Team You’ll Be A Part Of:

You’ll join a passionate, forward-thinking sales organization dedicated to advancing Synopsys’ position as a leader in semiconductor and software solutions. Our team is focused on building impactful customer relationships, driving strategic growth, and enabling innovation across industries. You’ll work closely with talented professionals from diverse backgrounds, all united by a shared commitment to excellence and continuous improvement. Together, we create a supportive environment that fosters creativity, celebrates achievements, and delivers meaningful results for our customers and the company.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your focus will span end-to-end semiconductor workflows, from chip design and verification through tooling and manufacturing-adjacent systems. You will help expand OpenAI's footprint across the stack, shaping how frontier models are applied throughout the semiconductor lifecycle.

You will measure success through production adoption, cycle-time reduction, engineer productivity gains, and evaluation-driven feedback loops that inform product, model, and platform strategy. You'll work closely with Product, Research, GTM, and Partnerships to turn early wins into a durable semiconductor vertical offering.

This role operates in environments where correctness, scale, and trust matter , regressions cost weeks, failures block tape-out, and credibility is earned through technical rigor.

This role is based in San Francisco. We use a hybrid work model of 3 days in the office per week. We offer relocation assistance. Travel up to 50% is required.

In this role you will:

• Design and ship production AI systems around models, owning integrations with RTL repositories, verification environments, simulators, and internal tooling.

• Lead discovery and scoping from pre-engagement through production rollout, translating ambiguous engineering pain points into hypothesis-driven use cases with measurable outcomes.

• Deliver AI-powered verification workflows such as change-aware test selection, directed test generation, and intelligent regression triage, taking them from prototype to daily production use.

• Build systems that operate over large, evolving codebases and artifacts (RTL, tests, logs, waveforms, traces), where performance, latency, and failure handling shape architecture.

• Define and run evaluation loops that measure model and system quality against workflow-specific benchmarks (e.g., coverage, false positives, debug time, iteration speed).

• Own delivery state across multiple workstreams, making trade-offs between scope, speed, and robustness to protect production impact.

• Distill deployment learnings into hardened primitives, reference implementations, playbooks, and tooling that can be reused across customers.

• Surface field insights that inform model behavior, tooling gaps, and future product direction across the semiconductor stack.

You might thrive in this role if you:

• Bring 5+ years of engineering experience in chip design, verification, EDA, or FPGA development (including RTL design, timing closure, and hardware/software co-design), or closely adjacent systems domains such as firmware, distributed systems, compilers, or performance-critical infrastructure.

• Have worked directly with RTL, verification environments, simulators, or large-scale performance/debug tooling , or have partnered closely with teams who do.

• Have delivered complex systems end-to-end in environments where scale, correctness, and long feedback loops shaped how you build and ship.

• Write and review production-grade code in Python and/or systems-adjacent languages, and are comfortable integrating across heterogeneous toolchains.

• Have experience deploying or experimenting with LLM-powered systems and understand how model behavior, evaluation, and guardrails affect trust and adoption.

• Communicate clearly with hardware engineers, software engineers, product teams, and executives, translating technical trade-offs into delivery decisions.

• Apply systems thinking with high execution standards, turning failures, regressions, and unexpected model behavior into improved operating patterns.

• Stay calm and decisive in technically deep, high-stakes environments where progress depends on credibility and follow-through.

Success in this role means shipping AI systems that semiconductor engineers trust in their daily workflows, establishing repeatable deployment patterns across chip design and verification, and helping OpenAI become a long-term partner across the semiconductor ecosystem.

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We are seeking an experienced and highly motivated individual with a passion for technology and innovation. You will serve as the single point of contact for post-silicon debug activities, enabling Product Requirement Documents (PRDs) and working to enable IP as a product development platform. You will handle hands-on post-silicon test setups, collaborate on top-level physical design, board-level, and package-level designs, and develop post-silicon reports and conduct debug analysis.

The successful candidate will drive the successful development and deployment of PVT IP sensors, enhance the reliability and performance of Synopsys' silicon lifecycle monitoring solutions, ensure high-quality product development through meticulous testing and debugging, and contribute to the continuous innovation in chip design and software security.

Key responsibilities include:

• Serving as the single point of contact for post-silicon debug activities
• Enabling Product Requirement Documents (PRDs)
• Working to enable IP as a product development platform
• Handling hands-on post-silicon test setups
• Collaborating on top-level physical design, board-level, and package-level designs
• Developing post-silicon reports and conducting debug analysis

Requirements:

• Hands-on experience in post-silicon test setups
• Sound knowledge of Digital/AMS chip design and post-silicon debug
• BS or MS degree in Electrical Engineering with 3+ years of experience
• Understanding of top-level physical design, board-level, and package-level designs
• Expertise in RTL development and physical design

The ideal candidate will be a strong communicator with excellent teamwork and interpersonal skills, detail-oriented with a mindset geared towards IP debug and documentation, proactive learner with the ability to adapt to new IP functionalities, effective leader with strong people management skills, and highly motivated and capable of mentoring both internal teams and external customers.

You will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process. Collaborate with a group of innovative and highly skilled professionals to drive the future of technology.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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We are seeking a Senior Staff Engineer - Solutions Engineering to join our team. As a Senior Staff Engineer, you will be responsible for serving as the single point of contact for post-silicon debug activities, enabling Product Requirement Documents (PRDs), working to enable IP as a product development platform, handling hands-on post-silicon test setups, collaborating on top-level physical design, board-level, and package-level designs, developing post-silicon reports, and conducting debug analysis.

The successful candidate will have hands-on experience in post-silicon test setups, sound knowledge of Digital/AMS chip design and post-silicon debug, a BS or MS degree in Electrical Engineering with 6+ years of experience, understanding of top-level physical design, board-level, and package-level designs, and expertise in RTL development and physical design.

As a Senior Staff Engineer, you will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process. Collaborate with a group of innovative and highly skilled professionals to drive the future of technology.

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As a Senior Product Sales Manager (Embedded Systems), you will be responsible for driving product sales activities for new and renewal business across assigned product lines to achieve or exceed revenue objectives.

Key responsibilities include:

• Selling products and services through both telephone and face-to-face interactions, adapting your approach to suit customer preferences.
• Collaborating with field sales, enterprise sales, and channel partners to develop and execute strategies that maximize product and service revenue.
• Identifying and uncovering opportunities in current and new accounts, seamlessly transitioning leads to direct sales teams for follow-up.
• Facilitating communication between sales and technical teams to share updates on product capabilities, success stories, and winning strategies.

In this role, you will have the opportunity to:

• Accelerate revenue growth and market share for assigned product lines through proactive sales and strategic partnerships.
• Enhance the visibility and reputation of Synopsys solutions within the industry by delivering impactful presentations and participating in conventions.
• Strengthen relationships with customers and partners, fostering loyalty and long-term engagement.

To succeed in this role, you will need:

• A bachelor's degree in technical, engineering, business, or related field; or equivalent sales/consulting experience.
• Minimum 4+ years of sales or consulting experience in engineering/technology applications with proven success, or 6+ years without a degree.
• Strong understanding of product market position and sales fundamentals.
• Ability to work cross-functionally with teams such as ACE, DEV, Marketing, PM, and across various hierarchies.
• Proven ability to foster collaboration and coordinate with globally distributed personnel.
• Aptitude for problem-solving and delivering tailored solutions for customers.
• Fluency in English and the local language of the territory.
• Willingness and ability to travel up to 50% as required.

If you are a driven and results-oriented sales professional with a passion for technology and engineering solutions, we encourage you to apply for this exciting opportunity.

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You are an experienced and highly motivated individual with a passion for technology and innovation. You have a strong technical background in RTL, Physical Design, and post-silicon test and testability development. Your expertise in debugging and developing Process, Voltage, Temperature, Current, and Droop sensors is unparalleled. You thrive in a dynamic environment and excel in communication, teamwork, and leadership.

As a Staff Engineer in our PVT IP group, you will be responsible for driving the successful development and deployment of PVT IP sensors. You will enhance the reliability and performance of Synopsys' silicon lifecycle monitoring solutions, ensure high-quality product development through meticulous testing and debugging, and contribute to the continuous innovation in chip design and software security.

Key responsibilities include serving as the single point of contact for post-silicon debug activities, enabling Product Requirement Documents (PRDs), working to enable IP as a product development platform, handling hands-on post-silicon test setups, collaborating on top-level physical design, board-level, and package-level designs, developing post-silicon reports, and conducting debug analysis.

To succeed in this role, you will need hands-on experience in post-silicon test setups, sound knowledge of Digital/AMS chip design and post-silicon debug, a BS or MS degree in Electrical Engineering with 3+ years of experience, understanding of top-level physical design, board-level, and package-level designs, and expertise in RTL development and physical design.

You will be part of a rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizing, designing, and productizing state-of-the-art sensors that play a critical role in the silicon lifecycle monitoring process.

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At Synopsys, we're seeking a Staff Engineer (Machine Learning) to join our Machine Learning Center of Excellence (ML CoE) within our Silicon Design & Verification business. As a key member of this highly innovative team, you'll be responsible for designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.

Key Responsibilities:

• Designing and developing machine learning-based optimization applications for advanced chip design, spanning architectural through physical design levels.
• Integrating ML-driven solutions into a variety of EDA tools, building on the success of DSO.ai and expanding beyond physical implementation.
• Automating chip design flows with scripting languages (Perl, Python, Tcl, shell scripts) to increase efficiency and reproducibility.
• Collaborating with cross-functional teams to identify design bottlenecks and propose innovative solutions for enhancing power, performance, and area (PPA).
• Conducting research and prototyping novel chip design methodologies, demonstrating new concepts, and driving them to productization.
• Staying current with industry trends in silicon design, machine learning, and EDA, and championing their adoption within Synopsys' product lines.

Impact:

• Accelerate the development of next-generation silicon chips by enabling smarter, faster design optimization through AI and machine learning.
• Reduce time-to-market for customers by eliminating months off project schedules, directly impacting their competitiveness.
• Enhance the performance, power efficiency, and cost-effectiveness of chips designed with Synopsys' tools, driving industry-leading outcomes.
• Shape the evolution of EDA software by pioneering ML-driven methodologies adopted by semiconductor leaders worldwide.
• Enable customers to autonomously explore vast design spaces, achieving optimal results with reduced manual intervention.
• Strengthen Synopsys' position as the global leader in silicon design and verification by delivering innovative, high-impact solutions.

Requirements:

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or a related discipline.
• 5+ years of experience in chip design, EDA, or related fields.
• Expertise in at least one domain of chip design (architectural, micro-architectural, RTL, circuit, or physical design).
• Strong programming and automation skills using Perl, Python, Tcl, or shell scripting.
• Solid understanding of Unix/Linux environments and design flow automation.
• Knowledge of industry-standard RTL design, synthesis, place and route, verification, ATPG, custom-circuit design, and signoff flows.
• Familiarity with low power design techniques, computer architecture, and machine learning principles.

Who We're Looking For:

• A creative problem solver who approaches challenges with curiosity and resilience.
• An effective communicator who collaborates well with multidisciplinary teams.
• Detail-oriented with a passion for quality and continuous improvement.
• Self-driven, adaptable, and comfortable with ambiguity in fast-paced environments.
• Committed to learning, growth, and sharing knowledge with others.

The Team You'll Be A Part Of:

You'll join the Machine Learning Center of Excellence (ML CoE) within Synopsys' Silicon Design & Verification business. This highly innovative team is at the forefront of integrating AI and ML into chip design, collaborating with experts across architecture, implementation, and verification. Together, you'll drive the development of ML-based design optimization solutions and set new standards for the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Location

San Francisco

Employment Type

Full time

Department

Scaling

Compensation

• $225K – $445K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

Benefits

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the Team

OpenAI’s Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI’s supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.

About the Role

We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge

This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees.

In this role, you will:

• Lead system signal integrity (SI) design for AI supercomputer product in the data center application.

• Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies

• Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity

• Perform simulation and modeling to identify and troubleshoot signal integrity issues

• Lead system interconnect design, bring up and qualification

• As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings.

You might thrive in this role if you:

• Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications

• Have a strong bias toward action, and won’t take no for an answer.

• Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level

• Have experience with PCB, connector and cable design

• Have a strong intrinsic desire to learn and fill in missing skills; and an equally strong talent for sharing that information clearly and concisely with others.

• Are comfortable with ambiguity and rapidly changing conditions.

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What you'll do

• Engaging in business development and customer meetings to identify and drive business opportunities.
• Defining and promoting products to achieve sustainable growth within the USB Solution IP product lines.

What you need

• BS EE with 10+ years of relevant experience, or MS EE with 8+ years of relevant experience (MBA preferred).
• Experience in product marketing or technical marketing, preferably in system-level, ASIC, or system-on-chip design.
• Knowledge of USB protocol, mixed signal, and semiconductor chip design.
• Ability to analyze market segments and applications.

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What you'll do

• Developing and executing strategic account plans to drive revenue growth and achieve sales targets.
• Building and maintaining strong relationships with key decision-makers at enterprise clients.
• Identifying new business opportunities and expanding Synopsys' footprint within assigned accounts

What you need

• Extensive experience in enterprise sales within the semiconductor or technology industry.
• Strong understanding of chip design, EDA tools, or IP integration solutions.
• Proven ability to manage complex sales cycles and negotiate large-scale contracts.

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What you'll do

• Empowering the creation of high-performance silicon chips and software content.

What you need

• Strong technical skills in chip design, verification, and IP integration.

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