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Job Summary

You are a passionate and driven professional with a profound mastery of hardware-assisted verification (HAV), using emulation and FPGA prototyping methodologies, with a sharp focus on performance optimization. Your expertise covers the entire lifecycle of HW/SW product development, from early RTL verification to software bring up and platform delivery.

Responsibilities

• Drive advanced product capabilities and innovations in emulation runtime performance for industry-leading platforms.
• Engage in the full product lifecycle, from feature definition and implementation to rigorous testing, quality measurement, and customer deployment.
• Collaborate closely with internal stakeholders, including Application Engineering peers and R&D teams, to deliver superior outcomes for customers.
• Provide technical leadership and product evaluation support to key emulation customers across the globe.
• Lead comprehensive root cause analyses to resolve and prevent emulation performance bottlenecks.
• Ensure the highest standards of verification for SoC designs, contributing to the creation of robust and reliable products.

What You’ll Need

• Minimum 12+ years of experience in emulation methodology, spanning early RTL verification to software bring up.
• Proven expertise in verification, with a focus on System on Chip (SoC) design bring-up and validation.
• Comprehensive knowledge of the architecture of emulation / FPGA prototyping platforms and their eco-systems.
• A good understanding of the compilation and runtime flows on these emulation platforms.
• Demonstrated experience in using debug features of these emulation platforms, and in conducting root cause analysis for emulation runtime performance issues.

Benefits

• Competitive salary and benefits package
• Opportunities for career growth and professional development
• Collaborative and dynamic work environment
• Recognition and rewards for outstanding performance

Who You Are

• A collaborative team player who thrives in dynamic, fast-paced environments.
• Detail-oriented and analytical, with exceptional problem-solving skills.
• Curious, adaptable, and eager to embrace new challenges and responsibilities.
• An effective communicator, skilled at conveying complex technical information to diverse audiences.
• An innovative thinker with a passion for continuous improvement and learning.

The Team You’ll Be A Part Of

You’ll join the Product Engineering (PE) team within the TPG division at Synopsys Bangalore office. This team is at the forefront of delivering and deploying next-generation performance technologies in ZeBu platforms to customers worldwide. As a pivotal member, you will engage in technically challenging projects with significant responsibilities and visibility, all while enjoying a supportive environment that fosters career growth, innovation, and professional development.

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You will work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineers, process/reliability specialists, ATE engineers, and operations in a dynamic and high-energy work environment to bring industry-defining products to market.

Your responsibilities will include:

• Collaborating with cross-functional teams to craft essential next-generation product features that are important for performance, power optimization, and power management.
• Collaborating to craft tools for post-silicon work, build post-silicon methodologies to characterize silicon power, correlate silicon behavior with simulation.
• Working with various Arch & Design teams to come up with test plans of new features.
• Collaborating with other validation & bring-up teams to bring up/characterize silicon power and power saving features.
• Working with design & estimation teams to correlate with pre-silicon expectation, work with HW and SW teams to do the vital tuning and optimization of silicon power.
• Developing power consumption models to be used in binning, productization, and customer application notes, characterize and develop various power control mechanisms together with Arch/Design/SW teams.

We need to see:

• B. Tech or M. Tech in Electronics Engineering stream, with 3+ years related work experience, excellent problem-solving, collaborative, and interpersonal skills.
• Strong understanding of aspects related to silicon power and performance, technology node impacts, Hardware and Software interactions at system level.
• Hands-on experience with silicon bring up, validation, and productization, good knowledge in board and system design considerations, Power supply design.
• Very good problem-solving and hardware debugging skills, very good data analysis and logical reasoning skills.
• Strong familiarity with HW lab environment and understanding of various lab equipment.
• Experience in working with windows. Linux exposure is highly preferred.
• Working experience with scripting languages like perl and/or python is a plus point.
• Must be a great teammate and ready to collaborate with global teams from diverse cultural backgrounds in a high-energy environment.
• Exposure to critical path analysis, power analysis, process technologies, transistor/device physics, silicon reliability, and aging mechanisms.
• Background with power supply and substrate noise analysis and mitigation. Exposure to digital design, circuit analysis, computer architecture, BIOS, drivers, and software applications.

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What you'll be doing:

• Lead the design, automation, and validation of System Level Tests (SLT) for HVM (High Volume Manufacturing) for complex, high power, high speed SOCs.
• Develop and integrate test flows, scripts, and automation to ensure robust SLT coverage and seamless communication between test controllers and peripherals.
• Partner with system architecture, chip design, and validation teams to define and deliver production-ready SLT and HVM test solutions.
• Drive custom SLT development to optimize system performance, power efficiency, and test coverage.
• Oversee handler selection, enablement, and hardware integration – including PCB design, socket selection, and temperature control systems.
• Improve manufacturing test quality by enhancing test correlation, yield, and reliability across NPI, HVM, and RMA processes.
• Collaborate closely with OSATs on production enablement, sustaining, yield analysis, and DPPM reduction initiatives.
• Support silicon qualification and reliability testing (HTOL, Burn in) at the system level.

What we need to see:

• MS/PhD in Electrical Engineering, Computer Science, or Computer Engineering (or equivalent experience).
• 12+ years of experience in Systems level test, systems validation, and/or bench testing.
• Experience in new silicon bring up at the system level.
• Experience in driving SLT testing and deployment for HVM.
• Experience with testing and characterization of high power SOCs and High Speed I/Os.
• Knowledge of network topology and experience in network connectivity.
• Proficient in C#, C/C++, PERL, Python, .NET framework.
• Experience in Security provisioning and knowledge of fuse programming implementation.

Widely considered to be one of the technology world's most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until March 13, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

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Responsibilities:

• Silicon and board bring up, validation, and debug from prototype to production.
• Responsible for the GPU and SoC system qualification including feature checks, system stress at PVT conditions, testing of large number of systems and debug of issues affecting any unit of the chip or software.
• Debug complex ASIC and board issues related to logic design, signal integrity and power delivery in a high energy work environment, with a team that is the best in the business!
• Understand architecture of next generation chips, develop test plans, scripts and implement.
• Understand various HW features related to power, performance and safety.
• Drive the debug of Silicon, Board or Software issues involving many multi-functional teams.
• Develop new methodologies to improve the silicon validation process and take it to the next level!

Requirements:

• BTech/BE or MTech/ME degree in Electronics with 4+ years of work experience.
• Good knowledge in board and system design considerations, experience in silicon design/bring up.
• Hardware design experience related to high-speed subsystem design, High-speed IO protocols, and on-chip interconnect would be much appreciated.
• An understanding of PC architecture and various commonly used buses.
• Familiarity with scripting languages like perl and/or python.
• Very good problem solving and debugging skills.
• Strong data analysis and logical reasoning skills.
• Must be a standout colleague and ready to work with global teams from diverse cultural backgrounds.

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