SOC Engineering, Staff Engineer · Synopsys

Fri, 24 Apr 2026 14:15:21 GMT
Engineering

Synopsys · Noida · onsite

Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

You Are:

You are a passionate and driven Physical Design Engineer with a strong foundation in RTL2GDSII flows and a proven ability to independently own and deliver complex designs. With at least 5 years of hands-on experience in advanced technology nodes such as 7nm, 5nm, or even 3nm, you thrive in fast-paced, innovative environments and are eager to tackle new technical challenges.

Your expertise spans the entire physical design spectrum,from synthesis, place & route, and clock tree synthesis (CTS) to timing optimization, static timing analysis (STA), timing closure, EMIR, and physical verification. You have experience in both block-level and full-chip floor-planning, and you’re adept at navigating timing constraints and closing timing on aggressive schedules.

What You’ll Be Doing:

Independently own and drive full RTL2GDSII physical design implementation for advanced process nodes (7nm/5nm/3nm), ensuring successful tape-outs.

Execute synthesis, place & route, clock tree synthesis (CTS), timing optimization, and static timing analysis (STA) to meet stringent performance and power targets.

Perform block-level and full-chip floor-planning, physical verification, EMIR analysis, and timing closure activities.

Collaborate with cross-functional teams across geographies to resolve complex design challenges and ensure design quality and schedule adherence.

Utilize and optimize Synopsys EDA tools, including Design Compiler, IC Compiler II, and PrimeTime, to deliver state-of-the-art silicon solutions.

Develop and maintain automation scripts in Python, PERL, TCL, or other relevant languages to streamline design flows and improve efficiency.

Contribute to the continuous improvement of design methodologies and best practices, sharing insights and mentoring junior engineers as needed.

The Impact You Will Have:

Accelerate the delivery of high-performance, low-power silicon solutions that power next-generation technology platforms worldwide.

Enable Synopsys customers to achieve first-pass silicon success through robust and innovative physical design implementations.

Drive technical excellence and best practices within the team, influencing the future direction of physical design methodologies at Synopsys.

Foster a collaborative and inclusive culture by working seamlessly with global teams and sharing technical expertise.

Contribute to Synopsys’ leadership in EDA tools adoption, providing valuable feedback to enhance product offerings and customer satisfaction.

Support strategic customer engagements and help expand Synopsys' presence in the semiconductor ecosystem through successful project outcomes.