This is a hybrid quality reviewing and tooling role: you'll spend the majority of your time reviewing and auditing code annotations against rubrics to ensure data used for training and evaluating AI models meets a high bar, and the remainder building, maintaining, and troubleshooting the internal tooling that annotators rely on day-to-day.

You'll collaborate closely with the annotators, technical program manager, and engineer stakeholders, and contribute to refining the guidelines and processes that shape how our data is produced.

Key Responsibilities

• Generate and validate high-quality data annotations, based on guidelines and continuous feedback, for the development and evaluation of AI models
• Surface systemic issues, edge cases, and gaps in guidelines back to annotation operations and technical stakeholders
• Produce annotations yourself when needed, modeling the quality bar expected of the team
• Build and maintain internal tools and automation that streamline annotator workflows such as visualization dashboards, batch configuration scripts, output management utilities, and similar
• Troubleshoot environment, tooling, and CLI/git issues for annotators on their local machines, liaising with IT and engineering as needed

About You

• A degree in computer science, engineering, or a related field. Alternatively, 2 to 5 years of professional experience in software engineering, technical support, or developing tools
• Hands-on experience using code agents (e.g. Mistral’s vibe) in your own development workflow, and genuine interest in how they're evolving
• Proficient in at least one programming language (e.g. Python, JavaScript, or similar), with enough breadth to read and reason about code across a few core languages
• Able to apply consistent judgment against a rubric and surface edge cases, ambiguities, or gaps in guidelines
• Sustained focus and accuracy on detail-oriented, high-volume review work
• Comfortable working in a Unix-like terminal: shell basics, package managers, environment setup, and git workflows (branches, merges, resolving conflicts)
• Able to troubleshoot local development environment issues (dependencies, virtual environments, paths, permissions) across common operating systems
• Professional proficiency in English, with strong writing and comprehension skills

Nice to Have

• Prior experience in data annotation for AI/ML, especially LLM training (SFT, RLHF, preference data), evals/benchmarks, or agentic data
• Experience building an annotation team through interviews and training
• Experience supporting technical users or troubleshooting developer environments (internal tools support, DevRel, teaching assistant for coding courses, etc.)
• Fluency across multiple programming languages, or domain depth in one of: frontend, backend, DevOps, MLOps, data engineering
• Familiarity with rubric-based evaluation concepts, inter-annotator agreement, or quality measurement for human-labeled data
• Experience developing, deploying, and managing internal tooling or automation scripts

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Your responsibilities will include:

• Design, develop, and maintain software for our high-fidelity software simulation platform
• Implement and improve software- and hardware-in-the-loop simulations to validate satellite software and flight algorithms
• Accelerate the software development process through infrastructure improvements
• Develop and enhance Monte Carlo simulation tooling for assessing system performance under various conditions
• Incorporate physics-based models into simulation
• Develop analysis and visualization tooling to provide insight into our system
• Support GNC operations for our fleet of satellites, including on-console and on-call rotations

Requirements include:

• BS or MS in Computer Science, Aerospace Engineering, or equivalent background experience
• 2-5+ years in software or building simulations of complex physical systems
• 2-5+ years experience with Python or other high-level object-oriented programming language(s)
• Ability to effectively collaborate with interdisciplinary teams on large software projects
• Strong problem-solving skills and attention to detail
• Highly motivated, self-starting, and able to perform duties autonomously without much supervision

Bonus requirements include:

• Understanding of classical or modern control theory, and basic orbital mechanics
• Knowledge of memory management, threading, and interprocess communication techniques
• Experience building and maintaining software infrastructure used across teams
• Experience in statistical analysis techniques and Monte Carlo simulation
• Experience with C/C++
• Experience with AI tooling and agentic workflows
• Experience with databases
• Experience with spacecraft design

What we offer:

All our positions offer a compensation package that includes equity and robust benefits. Base pay is just one component of Astranis's total rewards package. Your compensation also includes a significant equity package via incentive stock options, high-quality company-subsidized healthcare, disability and life insurance, 401(k) retirement planning, flexible PTO, and free on-site catered meals.

Astranis pay ranges are informed and defined through professional-grade salary surveys and compensation data sources. The actual base salary offered to a successful candidate will additionally be influenced by a variety of factors including experience, credentials & certifications, educational attainment, skill level requirements, and the level and scope of the position.

Base Salary $120,000-$175,000 USD

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Your responsibilities will include performing work using drawings, diagrams, written and verbal instructions, layouts or defined plans to perform testing, checkout, and trouble-shooting functions. You will conduct repairs and reworks of PCBAs and cable harnesses/assemblies during engineering tests. You will also procure and source electrical components under the direction of lead and engineers as required.

Additionally, you will fabricate special test equipment, electronic test boxes, and harnesses. You will execute and support set up and utilize standard test equipment, including oscilloscopes, power analyzers, power supplies, and digital multimeters. You will perform harness build, circuit board electronic modifications, such as component rework, soldering/de-soldering of electronic components per industry standards such as IPC-7711 / IPC-A-610 / IPC-A-620.

The ideal candidate will have a minimum of 3 years experience as an engineering/electronics technician working in a prototype / engineering development lab environment. You will be able to read and understand complex PCBA schematics, cable assembly drawings, and test procedures, without the need to have detailed assembly instructions.

You will have experience with building and troubleshooting prototype electro-mechanical hardware, such as PCBAs, cables and wiring harnesses, and electro-mechanical assemblies (drones, vehicles, or eq.). You will be familiar and comfortable with standard electrical prototyping processes, such as PCBA rework. You will have extensive prototyping experience: Soldering, crimping, assembling cables to IPC Standards.

You will have knowledge of electrical components & connectors, familiar with basic hand tools and crimping equipment. You will have basic electrical understanding and understanding of fundamental electrical engineering concepts. You will be familiar with basic electrical test equipment such as DMMs, oscilloscopes, function generators, etc.

U.S. Person status is required as this position needs to access export controlled data.

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Based in Mountain View, CA, Cyngn is a publicly-traded autonomous technology company. We deploy self-driving industrial vehicles , specifically autonomous tuggers , to factories, warehouses, and other facilities throughout North America.

To build this emergent technology, we are looking for innovative, motivated, and experienced leaders to join us and move this field forward. If you like to build, tinker, and create with a team of trusted and passionate colleagues, then Cyngn is the place for you.

Key reasons to join Cyngn:

We are small and big. With under 100 employees, Cyngn operates with the energy of a startup. On the other hand, we’re publicly traded. This means our employees not only work in close-knit teams with mentorship from company leaders,they also get access to the liquidity of our publicly-traded equity.

We build today and deploy tomorrow. Our autonomous vehicles aren’t just test concepts,they’re deployed to real clients right now. That means your work will have a tangible, visible impact.

We aren’t robots. We just develop them. We’re a welcoming, diverse team of sharp thinkers and kind humans. Collaboration and trust drive our creative environment. At Cyngn, everyone’s perspective matters,and that’s what powers our innovation.

About this role:

As Cyngn scales its production deployments of Autonomous Mobile Robots (AMRs), we are seeking a highly capable Field Services Engineer to join our growing team. This role is essential to the success of our customer deployment production operations and requires both technical skill and field service acumen.

Based in Mountain View, CA, this role involves frequent travel to customer sites to support, maintain, and troubleshoot our deployed robotic systems. This position bridges hands-on hardware interaction, field maintenance, software updates, and close collaboration with engineering and operations teams.

Responsibilities

• Travel to customer locations to perform installation, repair, upgrades, and calibration of production robotic systems.

• Conduct field-based diagnostics, perform root cause analysis, and execute corrective actions to maintain uptime.

• Collaborate with Engineering Services and Engineering teams to deploy software updates, log issues, and provide feedback from the field.

• Replace and configure hardware components, sensors, and subsystems as needed.

• Execute configuration and parameter changes, including network and system settings on deployed robots.

• Interface directly with customer teams to provide status updates, answer technical questions, and ensure customer satisfaction.

• Maintain logs of service activity, diagnostics data, and configuration changes in a structured and reliable format.

• Support initial site bring-up and commissioning efforts for new deployments.

• Assist with documentation development and service procedure refinement.

• Support weekend and after-hours troubleshooting on an on-call rotation basis.

Qualifications

• 2+ years in a technical field service, robotics, or hardware support role.

• Ability and willingness to travel regularly (30–50% anticipated).

• Proficiency with Linux terminal, remote troubleshooting, and basic shell scripting.

• Strong hands-on skills with mechanical/electrical components and system-level debugging.

• Excellent communication and customer service skills.

• Ability to lift up to 80 lbs and work in industrial or warehouse environments.

• Capable of interpreting schematics, wiring diagrams, and engineering documentation.

Bonus Qualifications

• Experience working with autonomous systems, mobile robots, or industrial automation platforms.

• Familiarity with Python, ROS, or other scripting and robotics platforms.

• Experience working in production environments with safety and compliance standards.

• Experience configuring WiFi, networking parameters, or embedded systems.

• Familiarity with tools such as Jira, Confluence, or remote monitoring dashboards.

Benefits & Perks

• Health benefits (Medical, Dental, Vision, HSA and FSA (Health & Dependent Daycare), Employee Assistance Program, 1:1 Health Concierge)

• Life, Short-term and long-term disability insurance (Cyngn funds 100% of premiums)

• Company 401(k)

• Commuter Benefits

• Flexible vacation policy

• Remote or hybrid work opportunities

• Sabbatical leave opportunity after 5 years with the company

• Paid Parental Leave

• Daily lunches for in-office employees and fully-stocked kitchen with snacks and beverages

• Monthly meal and tech allowances for remote employees

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You will be a hands-on enabler of both prototype and production hardware related to electronic warfare systems. You will support multiple projects by handling assembly, rework, test setup, maintenance, and field readiness activities.

Key responsibilities include:

• Assembling, installing, and troubleshooting mechanical and electro-mechanical prototypes and systems
• Performing mechanical rework and modifications, including drilling, tapping, cutting, and assembling metal, plastic, and composite components
• Supporting integration of mechanical and electrical subsystems, including installation of motors, sensors, wiring harnesses, and control systems
• Executing test procedures for mechanical assemblies, including setup of instrumentation (force gauges, torque meters, vibration systems, etc.), data collection, and report generation
• Troubleshooting mechanical and electro-mechanical systems to identify and resolve issues such as alignment, fitment, or wear-related failures
• Fabricating mechanical fixtures, brackets, adapters, and custom parts using hand tools, power tools, or manual machining techniques to support engineering workflows
• Conducting incoming inspection of mechanical components, assemblies, and fasteners for quality, workmanship, and compliance with specifications
• Building, testing, and verifying cable assemblies and wiring harnesses for mechanical systems, ensuring proper termination, routing, and labeling
• Maintaining lab organization, including safety practices for mechanical tools, equipment calibration, inventory control, and workspace cleanliness
• Supporting system bring-up, validation, and durability testing for mechanical assemblies during development, production, or field deployment
• Documenting build processes, test results, rework procedures, and lessons learned to improve quality, repeatability, and traceability
• Assisting with packaging, assembly, and preparation of field kits for system deployment and readiness
• Collaborating with engineering teams to meet program goals, ensuring mechanical systems are completed on schedule and to specification

Required qualifications include:

• Hands-on experience with mechanical assembly, prototyping, and troubleshooting, including work with precision parts, fasteners, machinery, and material handling
• Proficiency with basic mechanical tools (calipers, torque wrenches, hand drills, etc.) and techniques (drilling, tapping, bending, cutting, alignments)
• Familiarity with electro-mechanical systems, including integration of motors, actuators, and sensors; experience with wiring harness routes and mechanical mounts
• Strong troubleshooting skills to diagnose and repair mechanical issues, including misalignments, wear and tear, and component failures
• Understanding of safety protocols, such as OSHA requirements, clean workspace standards, and proper handling of mechanical tools and hardware
• Exceptional attention to detail for quality checks on parts, assemblies, fasteners, and wiring to ensure precision and reliability
• Familiarity with reading mechanical drawings, assembly diagrams, and technical documentation; ability to follow detailed assembly work instructions
• Ability to thrive in a dynamic R&D environment, adapting to evolving designs, timelines, and requirements

Preferred qualifications include:

• Prior experience in the EW (Electromagnetic Warfare) or defense sector, or work involving ruggedized or harsh-environment applications
• Experience with field deployment of hardware; knowledge of what makes systems reliable in real operational use
• Basic machining, metal/fabrication skills, or ability to operate manual machine tools
• Experience with inventory/tracking tools, lab management software, version control for hardware documentation
• Knowledge of safety standards and maintainable design practices for reliability, thermal management, vibration/shock, etc.

US Hourly Range $86,000-$114,000 USD

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We are looking for an Acceptance Test Procedure Technician to join our rapidly growing team in Costa Mesa, CA. In this role, you will execute and document acceptance tests on various systems and components to ensure compliance with specified requirements and standards.

The ideal candidate has strong technical skills, including proficiency with command line usage, troubleshooting software issues, pulling IP addresses, analyzing test logs, and assembling components when needed, as well as a solid understanding of ATP processes on the software side. This position also requires flexibility to travel approximately 50% of the time (about one week on and one week off).

This role requires candidates to relocate to Costa Mesa for a 3-month training program. Housing, transportation, etc. will be provided during your stay.

Responsibilities:

• Execute acceptance test procedures on systems and components.
• Document test setups, procedures, results, and any discrepancies.
• Collaborate with engineers to refine test procedures and criteria.
• Troubleshoot and diagnose issues in systems during testing.
• Ensure compliance with safety and quality standards.
• Maintain testing equipment and ensure proper calibration.
• Support continuous improvement initiatives in testing processes.
• Provide feedback and recommendations for design improvements based on test results.
• Able to perform labor tasks, including lifting up to 35 pounds consistently.

Required Qualifications:

• Experience in [specific industry or technology, e.g., aerospace, telecommunications].
• Knowledge of relevant software for data analysis and documentation.
• Certification in quality assurance or testing (e.g., ASQ Certified Quality Technician).
• U.S. Citizen Required

Preferred Qualifications:

• 2+ years experience working on ATP
• Proven experience in testing utilizing software and command prompts.
• Basic knowledge of electro-mechanical systems
• Strong analytical and problem-solving skills.
• Proficient in using test equipment and tools.
• Basic knowledge with Linux systems which should include command line (for example creating, deleting, or modifying files and folders as well as changing directories)
• Basic Network experience ( for example, setting, configuring and changing IP addresses for specific tests and communications )
• Ability to frequently lift, carry, or otherwise move objects weighing up to 30 pounds (e.g., equipment, supplies, products), with or without reasonable accommodation.

HOURLY RATE - T3 Starting Hourly Rate: $28.00

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including:

• Healthcare Benefits - US Roles: Comprehensive medical, dental, and vision plans at little to no cost to you.
• UK & AUS Roles: We cover full cost of medical insurance premiums for you and your dependents.
• IE Roles: We offer an annual contribution toward your private health insurance for you and your dependents.
• Income Protection: Anduril covers life and disability insurance for all employees.
• Generous time off: Highly competitive PTO plans with a holiday hiatus in December.
• Caregiver & Wellness Leave is available to care for family members, bond with a new baby, or address your own medical needs.
• Family Planning & Parenting Support: Coverage for fertility treatments (e.g., IVF, preservation), adoption, and gestational carriers, along with resources to support you and your partner from planning to parenting.
• Mental Health Resources: Access free mental health resources 24/7, including therapy and life coaching.
• Additional work-life services, such as legal and financial support, are also available.
• Professional Development: Annual reimbursement for professional development - Commuter Benefits: Company-funded commuter benefits based on your region.
• Relocation Assistance: Available depending on role eligibility.
• Retirement Savings Plan - US Roles: Traditional 401(k), Roth, and after-tax (mega backdoor Roth) options.
• UK & IE Roles: Pension plan with employer match.
• AUS Roles: Superannuation plan.

The recruiter assigned to this role can share more information about the specific compensation and benefit details associated with this role during the hiring process.

Protecting Yourself from Recruitment Scams

Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We've observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information.

To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind:

• No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates.
• Please always verify communications:

Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address. Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify

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Key responsibilities include:

• Operating equipment in the production sites and leveraging real-time data to maximize existing procedures.
• Performing preventive maintenance and inspections; troubleshooting problems associated with equipment, processes, and systems as needed.
• Supporting areas across the plant in driving the adoption of continuous improvement practices and programs (5S, Lean, Six Sigma) conducive to an organized and clean work environment.
• Utilizing Focused Improvement (e.g., 5WHYs) techniques to initiate process and standard work improvements.
• Providing coaching and training to seasonal workforce, area trainees, and peers supporting achievement and personal development.
• Ensuring upstream activities (e.g., field inspection, grower contract) are handled within company standards and business requirements.
• Cultivating partnership with key business partners to plant/field operations (e.g., grower network).
• Using SAP to support administrative procedures, document key readings, maintenance orders, and production information.
• Maintaining key process documentation (operating, start-up, and shut-down procedures; standard work; process flow and instrumentation diagrams; etc.).
• Demonstrating knowledge of and adherence to Bayer's Health, Safety, Environment (HSE) and Quality Assurance/Quality Control (QA/QC) standards (e.g., general shop floor/machine safety and operating procedures).
• Complying with internal procedures and supporting compliance with legal requirements applicable to area activities.
• Participating and preparing to lead Daily Direction Setting (DDS) meetings as needed; articulating shift objectives and allocating resources accordingly across all active production areas.
• Supporting and maintaining metrics and relevant information on current Visual Management boards to drive teamwork and facilitate shift change-over.

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With a solid foundation in ASIC design, VLSI, and CAD engineering, you continuously expand your knowledge to stay ahead of industry trends. You possess a keen analytical mind, capable of troubleshooting and resolving intricate issues efficiently. Your creative problem-solving skills and meticulous attention to detail ensure that projects are executed flawlessly from conception through completion. You enjoy mentoring others and contributing to moderately complex aspects of projects, enhancing team performance.

You embrace diversity, respect different perspectives, and believe in the power of inclusion to foster innovation. Your dedication, resilience, and positive attitude enable you to thrive in dynamic environments, and you’re motivated by the opportunity to support key foundry customers and help shape the future of electronic design automation.

What You’ll Be Doing:

• Managing and providing ICV runset support for key foundry partners, ensuring seamless integration and optimal performance of Synopsys products.
• Delivering post-sales technical expertise throughout the runset programming, implementation, and ongoing maintenance cycles.
• Translating detailed customer installation requirements into actionable solutions, customizing product configurations as needed.
• Collaborating with clients to ensure their needs are fully met and Synopsys solutions function according to specifications.
• Offering pre-sales technical support, contributing to sales efforts by addressing technical queries and demonstrating product capabilities.
• Serving as a subject matter expert in EDA tool products, guiding customers through verification, place and route, design reuse, and physical design challenges.

The Impact You Will Have:

• Enhancing customer satisfaction by delivering tailored, high-quality technical solutions and ongoing support.
• Driving successful adoption of Synopsys products within key foundries, solidifying long-term partnerships and business growth.
• Contributing to the continuous improvement of runset programming and installation processes, raising industry standards.
• Supporting the sales team with technical insights, helping to win new business and expand Synopsys’s market reach.
• Identifying opportunities for innovation and improvement in EDA tools, directly influencing product development and competitiveness.
• Mentoring junior team members and sharing best practices, fostering a collaborative and high-performing work environment.

What You’ll Need:

• Basic understanding of the design process; familiarity with Design Rule Manuals (DRM) is preferred.
• Strong communication skills, capable of conveying technical concepts clearly to diverse audiences.
• Solid grasp of ASIC design flows, VLSI, and/or CAD engineering principles.
• Experience or knowledge of competitive EDA tool products, with expertise in verification, place and route, design reuse, and/or physical design.
• Demonstrated ability to manage projects from start to completion, contributing to moderately complex aspects of technical initiatives.

Who You Are:

• Creative and resourceful problem solver, able to think outside the box and address challenges proactively.
• Judicious decision-maker, skilled in selecting effective methods and techniques for optimal solutions.
• Collaborative team player with a strong sense of ownership and accountability.
• Adaptable and resilient, comfortable navigating evolving priorities and customer requirements.
• Inclusive and respectful, valuing diverse perspectives and fostering a positive team culture.

The Team You’ll Be A Part Of: You’ll join a dynamic Customer Application Services team based in Taiwan, dedicated to supporting key foundry partners and advancing Synopsys’s leadership in EDA solutions. The team is composed of experienced engineers and technical experts who collaborate closely with customers, sales, and product development groups. Together, you’ll tackle complex challenges, drive innovation, and ensure the successful implementation of industry-leading design automation tools.

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As a Staff Engineer in ASIC Physical Design, you will contribute to the development of cutting-edge semiconductor solutions, working on complex tasks such as chip architecture, circuit design, and verification. You will be responsible for designing and implementing physical design flows, including floor planning, synthesis, placement and routing, timing closure, and physical verification.

Key Responsibilities:

• Contributing to physical design implementation for test chips across DDR/HBM/UCIe protocols, from RTL to final GDS release to foundry.
• Developing overall floorplan and power/ground strategies tailored for diverse test chip architectures.
• Owning and optimizing the RTL-to-GDSII flow, ensuring design convergence for area, power, performance, and manufacturability.
• Executing and overseeing static timing analysis (STA) and physical verification (EM/IR drop, ERC/DRC/LVS, PERC/ESD analysis).
• Integrating updated covercells, circuit/IP/PLL/hard-macros, and coordinating abutment checking and QA/release of hard-macros.
• Driving tool flow automation and debugging to enhance productivity and design reliability.
• Collaborating closely with architecture, RTL, circuit, and covercell teams throughout test chip development.

Impact:

• Enable robust validation of Synopsys's IP blocks for PHYs, ensuring high-quality deliverables prior to customer release or SoC integration.
• Accelerate time-to-market by driving rapid turnaround from RTL to silicon, reducing schedule risks and helping Synopsys meet critical market windows.
• Enhance product reliability and manufacturability through rigorous timing closure, power/thermal analysis, and comprehensive verification signoff.
• Bolster Synopsys's reputation by delivering high-quality, silicon-proven IP that meets real-world performance and reliability standards.
• Foster seamless cross-functional collaboration, bridging architects, RTL designers, verification teams, and silicon validation groups.
• Champion continuous process and tool improvement, implementing flow automation to keep Synopsys at the forefront of EDA innovation.

Requirements:

• 6 to 7 years of experience in ASIC physical design, with a proven track record in complex SoC or test chip implementations at advanced process nodes.
• Deep expertise in the complete ASIC physical design flow: floorplanning, synthesis, P&R, timing closure, IR-drop/EM analysis, LVS/DRC, etc.
• Familiarity with IP integration, test chip methodology, and advanced verification flows.
• Proficiency with state-of-the-art CAD tools such as Design Compiler (DC), PrimeTime (PT), IC Compiler II/FC, ICV, Calibre, RedHawk, and FinFet technologies.
• Experience coordinating complex, cross-functional projects and leading technical execution.
• Authorization to work in the USA.

Team:

You'll join the Test Chip PHY development team within Synopsys's Silicon IP business. This group is dedicated to integrating and validating Synopsys's broad portfolio of IP blocks -logic, memory, interfaces, analog, security, and embedded processors into test chips at the forefront of semiconductor innovation. The team works collaboratively across architecture, RTL, circuit, and covercell disciplines to deliver robust, silicon-proven IP solutions that power next-generation products for global customers.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your key responsibilities will include:

• Managing the development and implementation of internal engineering products and services, collaborating with cross-functional design teams;
• Driving and directing engineering teams in both strategic and tactical activities, including defining IP product roadmaps with R&D and Marketing;
• Identifying required resources to ensure timely project deliverables, and escalating issues proactively;
• Resolving complex engineering challenges using fact-based judgment and analytical skills;
• Managing risk and change throughout the project lifecycle, from conception to delivery;
• Defining, promoting, implementing, and continuously improving team and cross-functional engineering processes and practices;
• Participating in pre- and post-sales support activities with Sales, Marketing, Customer Support, and IP Program Management teams;
• Providing regular updates to management and customers on project status and progress.

As a Project Engineering Manager, you will have the opportunity to accelerate the integration of advanced capabilities into customer SoCs, enhance performance, power, and size efficiency, and drive the delivery of differentiated silicon IP solutions that help customers achieve their unique application requirements.

To be successful in this role, you will need to have a minimum of 5+ years of experience in engineering project leadership roles, preferably within integrated circuit design and verification, and a bachelor's degree or higher in Engineering or a related technical field.

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Supports the quantitative evaluation of marketing campaigns and reporting of results. Data-mines and reports from large datasets.

Creates and modifies computer programs to pull information from company databases.

Prepares analysis of marketing effectiveness and efficiency, retention, and cross-sell data; continually enhances reports and analyses.

Responsible for obtaining, evaluating, and communicating information that supports revenue growth and profitability.

Recommends strategies for improving results and market position.

Essential Job Functions

Supports the marketing function by performing data manipulation and data mining on large sets of data. Development of data and information structure.

Creates and modifies computer programs to pull information from company databases.

Prepares analyses marketing driver effectiveness and efficiency and analysis of cross-sell and retention; suggests enhancements to standard approaches.

Identifies market segments and develops specialized reporting approaches.

Prepares exhibits and responds to requests for additional data.

Provides detailed requirements for systems implementation projects.

Measures and monitors marketing performance data. Facilitates through other parts of the organization to accomplish results.

Supports data sciences team through access and manipulation/formatting of data as required Performs other duties as assigned.

Benefits

Competitive salary and performance-based bonuses

Comprehensive benefits package

Career development and training opportunities

Dynamic and inclusive work culture within a globally renowned group

Private Health and Dental Insurance

Pension Plan

Meals tickets

Life Insurance

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As a Senior ASIC Verification Engineer, you will be responsible for developing and executing comprehensive verification plans for complex ASIC designs, focusing on next-generation HBM (High Bandwidth Memory) products. You will write and maintain advanced testcases using SystemVerilog and UVM methodologies to ensure thorough coverage and robust verification.

You will also debug and analyze complex testbench and design-related issues, collaborating closely with design and mixed-signal engineering teams. Additionally, you will automate verification flows and processes using scripting languages such as Python or Perl to enhance productivity and coverage.

You will review and provide feedback on design specifications, contributing to architecture and design discussions to improve product quality. You will participate in code reviews, mentor junior engineers, and share best practices within the verification team.

You will document verification results, methodologies, and lessons learned to support knowledge sharing and process improvement.

The impact you will have includes accelerating the development of high-performance, reliable HBM solutions that power the next generation of computing and AI applications. You will ensure the delivery of robust, high-quality silicon products through meticulous verification and debugging.

You will drive innovation in verification methodologies and contribute to the continuous improvement of engineering processes. You will reduce time-to-market for cutting-edge products by identifying and resolving issues early in the design cycle.

You will enhance team capabilities by sharing knowledge, mentoring peers, and fostering a collaborative engineering environment. You will influence the direction of future product development by providing valuable insights into design and verification challenges.

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As an ASIC Digital Design Engineer, you will be part of a dynamic and diverse engineering team focused on subsystem and SoC-level verification. The team is committed to technical excellence, innovation, and continuous improvement, working collaboratively to deliver industry-leading solutions for Synopsys' global clients.

Responsibilities:

Develop and execute comprehensive verification plans for subsystem features and interfaces. Build, enhance, and maintain UVM-based verification environments for complex RTL designs. Create reusable and scalable testbenches, sequences, checkers, and scoreboards to ensure thorough coverage. Debug simulation failures, analyze waveform-level issues, and drive root-cause analysis to resolution. Collaborate closely with design, architecture, and cross-functional engineering teams to align on specifications and compliance. Define and implement test scenarios, including directed, constrained-random, and corner-case verification. Support regression planning, test execution, and coverage closure activities to ensure quality silicon delivery. Contribute to methodology improvements and best practices in functional verification. Communicate progress, technical findings, and risks effectively with stakeholders and team members.

Impact:

Enhance the robustness and performance of subsystem and SoC-level designs through rigorous verification processes. Drive the delivery of high-quality silicon solutions that power next-generation technologies. Accelerate time-to-market for Synopsys' clients by ensuring reliable and efficient verification workflows. Improve verification methodologies and contribute to best practices that set industry standards. Foster collaboration across design, architecture, and engineering teams to achieve common goals. Identify and resolve technical risks early, ensuring successful project outcomes and client satisfaction.

Requirements:

Bachelor's or Master's degree in electronics, electrical engineering, or a related field. Minimum 3+ years of hands-on verification experience, preferably in subsystem or SoC-level projects. Strong proficiency in protocols such as PCIe, CXL, UCIe, Ethernet, DDR, or USB. Solid experience with SystemVerilog/UVM and assertion-based verification techniques. Expertise in functional coverage, code coverage, and regression management. Strong debugging skills using simulation and waveform analysis tools. Exposure to formal verification techniques and their application in real-world scenarios.

Team:

You'll join a dynamic and diverse engineering team focused on subsystem and SoC-level verification. The team is committed to technical excellence, innovation, and continuous improvement, working collaboratively to deliver industry-leading solutions for Synopsys' global clients.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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Your tasks and responsibilities will include:

• Understanding the potential hazards and safe equipment operating practices in a manufacturing environment;
• Understanding of the quality systems and guidelines that impact areas of responsibility, including component specifications, equipment operating parameters, data collection, and cleanliness requirements;
• Ensuring all potential equipment deficiencies and component defects are properly identified throughout areas of responsibility to ensure adherence to quality guidelines;
• Operation of process test equipment to ensure process outputs in areas of responsibility conform to specified requirements (drawings and validated procedures);
• Basic operation of custom machinery within manufacturing area, including general machine operation, line balancing, loading assembly and packaging equipment with components, preventive maintenance, and cleaning;
• Exercises effective communication and teamwork skills to collaborate with a broad group of cross-functional staff;
• May provide guidance and training to lower-level production personnel, including other Machine Operators;
• Ability to perform electrical/mechanical adjustments.

We offer a competitive compensation package, including an hourly wage of $20.68, plus additional compensation may include a bonus or incentive compensation. Additional benefits include health care, vision, dental, retirement, PTO, sick leave, etc.

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You are a passionate analog design engineer eager to make a tangible impact in pioneering semiconductor technologies. You thrive in fast-paced environments and enjoy collaborating with diverse, talented teams. Your expertise in CMOS circuit design and deep submicron process technologies makes you a valuable contributor to high-performance chip solutions. You are detail-oriented, analytical, and consistently deliver quality results. Your curiosity drives you to explore industry standards such as JEDEC DDR interfaces, and you are comfortable navigating the complexities of ASIC design flows. You communicate clearly and effectively, bridging technical discussions between cross-functional teams. You embrace continuous learning and are always ready to tackle new challenges, leveraging your experience in analog/mixed signal circuitry and ESD concepts. You are motivated by the opportunity to influence the next generation of silicon products and are committed to excellence in every aspect of your work. Your collaborative spirit, adaptability, and drive for innovation make you a perfect fit for Synopsys' world-class engineering community.

Designing DDR I/O circuits for advanced semiconductor products, ensuring alignment with JEDEC interface standards. Implementing CMOS circuit design and layout methodologies to optimize performance and reliability. Collaborating with internal development teams to integrate analog/mixed signal circuitry into ASIC designs. Analyzing and resolving issues related to deep submicron process technologies. Executing assigned circuit design tasks with a focus on product quality and efficiency. Documenting design solutions and communicating technical details clearly to cross-functional stakeholders. Participating in design reviews and contributing to continuous improvement of design flows and practices.

Advance Synopsys' leadership in high-performance DDR interface design for cutting-edge chips. Enhance product reliability and scalability through robust analog design methodologies. Drive innovation in deep submicron process technology applications. Strengthen integration of mixed signal and analog circuitry in ASIC products. Support cross-team collaboration to accelerate product development and delivery. Contribute to Synopsys' reputation for technical excellence and quality in semiconductor solutions.

BTech/MTech in Electrical Engineering or related field (MTech+3 years / BTech+5 years experience). Strong knowledge of CMOS processes and deep submicron process technology issues. Expertise in CMOS circuit design and layout methodology; familiarity with analog/mixed signal circuitry. Understanding of basic ESD concepts (a plus). Experience with ASIC design flow and integration. Knowledge of JEDEC DDR interface requirements, DDR timing, ODT, and SDRAM functionality (preferred).

Analytical thinker with strong problem-solving skills. Effective communicator, both written and verbal, for internal team interactions. Collaborative team player, eager to learn and share knowledge. Detail-oriented and quality-focused in all aspects of design. Adaptable and resilient in dynamic project environments.

You will join a highly skilled Analog/Mixed Signal Design team in Bangalore, focused on delivering innovative DDR I/O circuit solutions for ASIC products. The team values creativity, technical rigor, and collaborative problem-solving, working closely with cross-functional groups to drive product excellence and meet industry standards.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Main duties and responsibilities include:

• Maintaining a good standard of cleaning within the building
• Carrying out quality audits and delegating duties
• Ensuring holiday and sickness coverage
• Assisting with staff training and delivering toolbox talks
• Complying with health and safety regulations and premises policies
• Keeping accurate records of operative hours, material orders, and holidays
• Reporting maintenance defects to the Operations Manager

Essential skills and qualifications include:

• Supervisory and cleaning experience
• Good communication and leadership skills
• Ability to motivate and work under pressure
• Problem-solving and time management skills
• Basic IT skills

Health and safety responsibilities include:

• Following group and company policies and procedures
• Reporting any apparent deficiencies in systems of work or equipment
• Using work equipment and personal PPE properly

Benefits include:

• 24/7 GP access
• Mental health support and life event counseling
• Get fit programme
• Financial and legal support
• Cycle to work scheme

About ABM UK:

ABM UK is a leading provider of integrated facility services, serving over 1,500 locations across the UK, including shopping centers, commercial locations, and airports.

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In this role, you will drive sales and marketing activity for MSS Cross Asset Distribution and Listed Products, identifying opportunities and campaigns that address specific client needs across target segments.

You will maintain and deepen business relationships with clients and internal stakeholders in the assigned coverage, with a strong focus on front-line enablement and commercial outcomes.

You will build strong understanding of client needs and suitability requirements, translating them into clear product positioning and actionable distribution plans.

You will partner closely with internal Trading, Research Analysts and Strategists to source, shape and package investible ideas (cross-asset and listed products), leveraging solid knowledge of derivatives basics, the macro environment and company analytics.

You will create and deliver digestible, client-ready content (e.g., short notes, scripts, presentations, videos, talking points) tailored to audiences with little to no financial knowledge, ensuring messages are clear, compliant and commercially relevant.

You will act as a media-facing spokesperson (where approved) for MSS Cross Asset Distribution and Listed Products, representing HSBC in external and internal media formats, ensuring messaging is clear, compliant and aligned to agreed commercial priorities.

You will anticipate and manage reputational, conduct, and suitability/appropriateness risks arising from public commentary on derivatives, macro themes and company analytics, ensuring communications remain balanced and within agreed parameters.

You will work closely with IWPB products team and the products team of institutional product partners to align on priorities, coordinate go-to-market activity and maximise cross-selling opportunities.

You will support new media platform engagement and live marketing campaigns (e.g., webinars, livestreams, roadshows), including planning, content preparation, speaker coordination and post-event follow-up.

You will contribute to transaction execution support by coordinating with relevant pricing/trading teams and ensuring timely, accurate client communication and follow-through.

You will act as a business-as-usual escalation point for client concerns and operational issues where Front Office can contribute to resolution, escalating appropriately to Director/Managing Director when required.

You will maintain complete and accurate records of client interactions, orders/execution and campaign activity in line with internal standards and controls.

You will apply strong data analytics skills to identify business opportunities and improve distribution effectiveness, including analysing client activity, campaign performance, product penetration, funnel conversion and engagement metrics to prioritise actions and refine go-to-market plans.

You will leverage AI-enabled analytical tools (where approved) to enhance insight generation and productivity, such as summarising research and market updates, identifying themes/signals from large information sets, drafting first-pass client content, and improving targeting/personalisation,while ensuring appropriate human oversight, accuracy checks and adherence to internal controls.

You will streamline workflows and improve efficiency through automation and process optimisation (e.g., standardised templates, content libraries, dashboards, CRM hygiene, campaign tracking), reducing manual effort and improving speed-to-market without weakening risk and control standards.

You will collaborate effectively across Markets and Securities Services and the wider Group (e.g., Global Banking, Wholesale Banking, Wealth and Personal Banking, Private Banking) to deliver joined-up client outcomes.

You will communicate fluently in Mandarin, Cantonese and English to support client engagement, content creation and stakeholder management across relevant markets.

You will follow a clear vision aligned to HSBC’s Values and goals, helping build an inclusive, high-performing, customer-centred culture.

You will encourage constructive cross-country and cross-business teamwork through strong collaboration and matrix management, challenging behaviours that are inconsistent with HSBC’s diversity policy and/or the best interests of the business and its customers.

To be successful, you will need to deliver fair outcomes for customers and ensure all sales/marketing activity supports the orderly and transparent operation of financial markets, particularly when translating cross-asset and listed product ideas for non-expert audiences.

You will embed financial crime risk management requirements (including Anti-Money Laundering and Sanctions Controls) into day-to-day distribution activity, client communications, campaigns and any new content formats (e.g., new media, livestreams, webinars).

You will maintain a thorough understanding of the front-to-back control environment for Markets distribution and marketing activity, ensuring processes, approvals and record-keeping meet required standards (including appropriate governance for client-facing materials and communications).

You will act as a “risk owner” within the first line of defence, working closely with relevant control owners (Risk, Finance, Operations, Compliance), Business Risk and Control Management and Business Management to identify, escalate and remediate issues in a timely manner.

You will apply a forward-looking approach to risk management by anticipating conduct, suitability/appropriateness and reputational risks that may arise from derivatives-related content, macro commentary and company analytics, and ensuring training and awareness are prioritised.

You will maintain strong knowledge of the global regulatory and conduct landscape relevant to cross-asset distribution, listed products and client communications, and challenge where needed to balance client needs with HSBC’s reputation and obligations.

You will support an efficient, high-capacity risk management infrastructure by streamlining controls and ways of working without weakening standards, enabling the business to move at pace while meeting internal control requirements and HSBC’s strategic vision.

You will ensure all activity is performed in line with applicable HSBC internal policies and procedures as set out in the relevant Functional Instruction Manuals (FIM) and departmental instructions, escalating any uncertainty to the appropriate control functions before execution.

The employment is subject to Mandatory Reference Checking Scheme (MRCS) as per regulatory requirement. For details, please refer to (Mandatory Reference Checking Scheme Phase 2 | The Hong Kong Association of Banks).

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Deliver what is promised in line with customer expectations, offering value-added products and services based on customer needs analysis and ensuring customer understanding of those products.

Provide excellent customer service to basic inbound customer calls by keeping up to date on training and internal communications, generating customer loyalty through strong knowledge of key products and services.

Act as a role model for our Group Values and Behaviours (Open, Connected, Dependable), supporting colleagues and customers to deliver superior customer service through these values.

Maintain HSBC internal control standards, being aware of all elements of Operational Risk associated with the role in compliance to SOX for contact centres.

Requirements: Must be a university graduate in any discipline Must be proficient in languages required by the process Open to working flexible shifting schedules Must be flexible, customer-centric, and have the ability to thrive in a team environment seeking feedback and open to development Takes pride in delivering what is promised in line with the customer and service expectations Wants to do a good job, is concerned about getting it right for the customer, and checks everything is in order Ability to work in a high-volume, fast-paced environment is required Proficiency with personal computers and basic software packages and specialised applications Excellent communication skills and is polite and friendly at all times Displays patience and empathy

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As a highly experienced applications engineer with deep expertise in emulation platforms and methodologies, you will lead customer engagements for emulation solutions, providing technical guidance and support to optimize verification workflows.

Designing and implementing advanced emulation strategies for complex SoC and ASIC projects, collaborating with R&D teams to influence product development and ensure customer requirements are addressed.

Developing and delivering technical presentations, training, and workshops for internal teams and customers, troubleshooting and resolving challenging emulation issues, ensuring customer satisfaction and project success.

Mentoring junior engineers, fostering knowledge sharing and professional growth within the team.

Accelerate verification cycles for industry-leading semiconductor companies through innovative emulation solutions, enhance the adoption and effectiveness of Synopsys emulation platforms across a diverse customer base.

Drive technical excellence by implementing best practices and leading critical customer projects to success, shape product direction by providing valuable feedback and insights to R&D teams.

Foster collaborative relationships with customers, building trust and long-term partnerships, contribute to Synopsys' reputation as the premier provider of advanced verification and emulation technologies.

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Delivering what is promised in line with customer expectations is crucial, as well as offering value-added products and services based on customer needs analysis and ensuring customer understanding of those products.

Excellent customer service is provided to basic inbound customer calls by keeping up-to-date on training and internal communications, generating customer loyalty through strong knowledge of key products and services.

As a role model for HSBC's Group Values and Behaviours, the successful candidate will support colleagues and customers to deliver superior customer service through these values.

Knowledge of Group compliance, Operational Risk and SOX (Sarbanes-Oxley Requirements) for RBWM Centres is essential, as well as maintaining HSBC internal control standards and being aware of all elements of Operational Risk associated with the role in compliance to SOX for contact centres.

A university graduate in any discipline is required, as well as proficiency in languages required by the process, flexibility to work shifting schedules, and the ability to thrive in a team environment seeking feedback and open to development.

Proficiency with personal computers and basic software packages and specialised applications is also necessary, along with excellent communication skills and politeness and friendliness at all times.

Patience and empathy are essential traits for this role, as well as the ability to work in a high-volume, fast-paced environment.

Due to the urgent hiring need, candidates with immediate right to work locally and no relocation need will be prioritised.

The chosen candidate for this role will be required to undergo enhanced vetting.

HSBC is an equal opportunity employer committed to building a culture where all employees are valued, respected and opinions count.

We take pride in providing a workplace that fosters continuous professional development, flexible working and, opportunities to grow within an inclusive and diverse environment.

We encourage applications from all suitably qualified persons irrespective of, but not limited to, their gender or genetic information, sexual orientation, ethnicity, religion, social status, medical care leave requirements, political affiliation, people with disabilities, colour, national origin, veteran status, etc.

We consider all applications based on merit and suitability to the role.

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We currently have 700 open roles

Project Engineering Management, Principal Engineer- 16823

This position is open for hiring in Ottawa and hiring manager may also consider Mississauga & Markham locations.

You Are:

An adaptable, passionate, and resourceful Project Engineering Manager with high standards and a demonstrated track record of success. You are known for "getting the job done" and are a driven, independent, and creative leader committed to achieving high-quality results in a team environment. You have a reputation for effective communication with both internal teams and customers, and you thrive in managing multiple projects from concept to customer delivery. Your background in Mixed-Signal IP, SOC, ASIC, or semiconductor development environments equips you with the technical prowess and project management skills needed to excel in this role. You are a natural leader who can motivate teams, make strategic decisions, and navigate complex technical challenges with ease. Your ability to build relationships, empower team members, and maintain focus under pressure sets you apart as a key player in driving project success.

What You'll Be Doing:

Managing one or multiple Mixed-Signal IP projects from concept to customer delivery. Representing the product line both internally and externally, ensuring clear communication of project status to key customers. Collaborating with R&D teams to plan new developments, updates, and enhancements to existing products. Scheduling and tracking project timelines across various R&D teams, ensuring adherence to schedules. Evaluating and addressing change requests and technical issues reported by customers. Working closely with Sales, Marketing, Customer Support, and IP Program Management teams for both pre-Sales and post-Sales support.

What You'll Need:

A degree in Engineering or Applied Science (or equivalent) with 10+ years of relevant experience. Proven experience in communicating with and managing customer expectations. Background in Mixed-Signal IP, SOC, ASIC, or semiconductor development environments. Experience in program or project management with proficiency in standard project management tools. Knowledge of quality management system processes and procedures is an asset. Proficiency in navigating and using tools in a Linux environment is considered a plus.

The Impact You Will Have:

Driving the successful delivery of innovative Mixed-Signal IP products to customers, enhancing Synopsys' reputation in the industry. Facilitating effective communication between R&D teams and customers, ensuring alignment on project goals and timelines. Contributing to the continuous improvement of product quality through strategic planning and execution of updates and enhancements. Ensuring timely project completion, meeting customer expectations, and fostering long-term client relationships. Empowering teams to achieve maximum performance, fostering a collaborative and high-performing work environment. Navigating technical challenges and providing solutions that drive project success and customer satisfaction.

The Team You'll Be A Part Of:

You will be part of a dynamic team focused on Mixed-Signal semiconductor Intellectual Property (MSIP) projects. The team collaborates closely with R&D, Sales, Marketing, Customer Support, and IP Program Management teams to deliver high-quality products. Together, you will drive innovation and ensure the successful delivery of MSIP solutions to customers.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details during the hiring process.

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Collaborate with experienced mixed-signal design and verification teams to develop and verify high-speed NRZ and PAM-based SerDes products.

Engage in dynamic PHY IP development, tackling challenging problems and adapting to constant technological advances.

Participate in initial and ongoing training led by top experts, gaining exposure to advanced digital and analog design methodologies.

Contribute to scripting and automation tasks to support design verification processes.

You'll be working on real-world projects, developing high-speed NRZ and PAM-based SerDes products, engaging in dynamic PHY IP development, participating in training sessions, and contributing to scripting and automation tasks.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a hands-on technical leader with extensive experience in mixed-signal verification and ASIC development. You excel at implementing sophisticated test plans and sharing best practices with project owners to ensure seamless execution. Your expertise in high-speed protocols, verification environments, and automation scripting positions you to drive successful product delivery and technical excellence. You are passionate about leveraging your skills to mentor others, optimize workflows, and contribute to a culture of innovation and collaboration. Your approach is both solution-oriented and inclusive, ensuring every team member has the opportunity to contribute and grow.

What You’ll Be Doing:

• Implementing Unified Test Plans for HPC DSP-based SERDES PHY products, integrating verification and validation phases in a structured workflow.
• Building and maintaining robust verification environments using UVM methodology and SystemVerilog, including VIP integration.
• Developing, optimizing, and sharing automation scripts (Shell, Perl, Python, C++, AI-based approaches) to support design, verification, and testing.
• Collaborating with product stakeholders and project owners to ensure technical challenges are resolved and milestones are met.
• Creating and executing comprehensive test plans for high-speed data recovery circuits, ensuring thorough coverage and traceability.
• Sharing knowledge and best practices with team members and project owners, driving clarity and continuous improvement.

The Impact You Will Have:

• Directly influence the implementation and quality of flagship silicon IP products.
• Accelerate time-to-market for high-performance SoCs through effective testplan execution.
• Advance innovation in data recovery and signal processing, impacting global standards.
• Provide technical leadership and mentorship, supporting global customer success.
• Contribute to a knowledge-sharing, inclusive engineering culture.
• Drive opportunities for advancement and professional growth for yourself and others.

What You’ll Need:

• 10+ years of ASIC development and mixed-signal verification experience.
• Expertise in PCIe, Ethernet protocols, and digital signal processing.
• Advanced skills in SystemVerilog and UVM methodology for verification environment implementation.
• Proficiency in scripting (Shell, Perl, Python, C++); experience with AI-driven automation is a plus.
• Strong organizational and communication skills with a proven record of delivering solutions under tight deadlines.

Who You Are:

• Hands-on, solution-oriented, and technically driven.
• Effective communicator and mentor, eager to share knowledge.
• Collaborative, adaptable, and inclusive in your approach.
• Detail-focused, organized, and committed to quality.
• Dedicated to continuous learning, growth, and innovation.

The Team You’ll Be A Part Of:

You’ll join a multidisciplinary engineering team advancing silicon IP solutions for global customers. The team is comprised of industry experts focused on mentorship, technical excellence, and continuous improvement in a respectful, inclusive environment.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include designing, reviewing, and executing comprehensive testing scenarios and scripts to validate system functionality, collaborating with business groups, Systems Administration, and HSBC Technology Service to identify, report, and resolve system defects, and supporting business User Acceptance Testing (UAT), including planning, preparation, and execution activities as required.

You will also coordinate project activities, manage deliverables, and track project status throughout development and post-implementation phases, and regularly monitor the effectiveness of systems during business-as-usual operations and facilitate coordination with other departments as necessary.

To succeed in this role, you will have business analyst experience, knowledge of Lending Point of Sale and Loan Originations Systems, and bank, lending business, lending systems-related experience or equivalent. You will also have proven communications, organisational, analytical, administrative, problem-solving, project management, and interpersonal skills, and proficiency with personal computers and pertinent HSBC systems and software.

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As an ASIC Physical Design Senior Manager, you will lead the end-to-end physical implementation of test chips across multiple advanced foundry nodes (2nm–7nm), ensuring timely and high-quality project delivery. You will manage, mentor, and develop a multidisciplinary team of ASIC physical design engineers, fostering a culture of technical excellence and collaboration.

Key responsibilities include:

• Leading cross-functional teams to drive seamless project execution from RTL to GDSII
• Overseeing project planning, resource allocation, and team budgeting to align with organizational goals and customer requirements
• Interfacing directly with customers and stakeholders to gather requirements, provide status updates, and ensure satisfaction throughout the project lifecycle
• Driving continuous process improvement, leveraging expertise in Synopsys EDA tools to optimize design flows and achieve best-in-class PPA and sign-off metrics

As a leader, you will play a key role in shaping the team's technical direction, fostering collaboration, and driving excellence in every project.

Rewards and benefits include comprehensive health, wellness, and financial benefits, including competitive salaries, ESPP, and retirement plans.

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Key responsibilities include:

• Building strong relationships with colleagues from Portfolio Management, Institutional Client Business, Legal & Compliance, and Investment Stewardship
• Learning about numerous global regulatory regimes and jurisdictions, and staying up to date on regulatory changes
• Taking on and solving complex problems in an ever-changing environment

Daily tasks may include reviewing system reports of shareholdings against trade movements, prioritizing and submitting necessary disclosures, and identifying holdings that are approaching prescribed threshold limits.

As a successful candidate, you will have a Bachelor's degree or equivalent in a related field, experience in working with and building strong relationships with internal and external partners, and proficiency in Microsoft Office applications and strong IT skills.

In addition to a competitive salary, BlackRock offers a wide range of employee benefits, including retirement investment, education reimbursement, comprehensive resources to support physical and emotional well-being, family support programs, and flexible time off.

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Key responsibilities include: Preparing and testing formulations in the laboratory according to experimental plans and protocols defined by senior scientists. Executing laboratory experiments such as formulation preparation, stability studies, and physical/chemical characterization. Accurately recording, organizing, and summarizing experimental data, maintaining detailed lab notebooks and electronic records. Supporting project teams by providing reliable experimental execution and data to advance formulation projects. Assisting in troubleshooting formulation issues by performing focused experiments under the guidance of senior scientists. Helping maintain laboratory equipment and materials, including routine checks, calibration support, inventory management, and basic maintenance. Ensuring compliance with Health, Safety, and Environment (HSE) requirements and good laboratory practices. Contributing to the preparation of samples and documentation for internal and external testing. Gradually taking on more responsibility in designing small experimental series and suggesting next steps based on observed results. Collaborating with cross-functional colleagues to support sample analysis, test planning, and data sharing. Participating in team meetings, sharing experimental progress, and actively seeking feedback and learning opportunities. Embracing and demonstrating Bayer's leadership attributes, fostering a culture of safety, scientific rigor, collaboration, and ethical conduct in all lab activities.

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Impact on the Business: To ensure efficiencies, productivity and quality are in line with the banks standards. To ensure regulatory implementations and Bank initiatives are introduced efficiently and with minimal impact to the Operational areas. To pro-actively support the management of potential losses.

Customers / Stakeholders: To ensure the fair treatment of our customers is at the heart of everything we do, both personally and as part of an organisation maintaining Global Standards and FCA guidelines at all times.

Leadership & Teamwork: Support other team members and Line Manager in achieving full operational control ensuring that there is sufficient cover during periods of holiday and sickness. Be flexible to the needs of the team and support Line Manager decisions at all times.

Operational Effectiveness & Control: To continually be aware of the operational risks associated with the role and inherent in the business, taking account of changing economic or market conditions, legal and regulatory requirements, operating procedures and practices, management restructurings, and the impact of new technology. In conjunction with Compliance department, to implement the Group Compliance Policy by containing compliance risk in conjunction with the relevant compliance department. The term ‘compliance’ embraces all relevant financial services laws, rules and codes with which the business has to comply. To adhere to, and be able to demonstrate, adherence to internal controls.

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You will work closely with all Decanter product editors and the Premium, Events and Awards Marketing Managers to plan and run the day-to-day social media operations of the brand. You will maintain consistency in brand tone, image, and style across all platforms, whilst creating innovative and exciting new content, driving Decanter forward to new audiences.

A keen interest in, and knowledge of wine, is also essential as the role involves taking content and repurposing it for social media. Experience with paid campaigns is also preferable.

Key responsibilities include:

• Executing successful social strategies including growth tactics, customer retention, increased engagement and best in class content
• Proven experience as a Social Media Manager or similar role, with a strong portfolio showcasing successful organic and paid social media campaigns and content creation
• Excellent copywriting and storytelling skills with the ability to see different points of view and bring a story to life
• Excellent demonstrated ability to design, create and implement content specifically for a range of social media platforms that engages audiences and drives brand awareness and growth including video content creation
• Experience with social analytics tools and paid-for social media campaign dashboards (Google Analytics, Adobe Analytics, Meta Business Suite, Looker Studio)

To be considered for this role, you should have:

• A proven ability of executing successful social strategies including growth tactics, customer retention, increased engagement and best in class content
• Proven experience as a Social Media Manager or similar role, with a strong portfolio showcasing successful organic and paid social media campaigns and content creation
• Excellent copywriting and storytelling skills with the ability to see different points of view and bring a story to life
• Excellent demonstrated ability to design, create and implement content specifically for a range of social media platforms that engages audiences and drives brand awareness and growth including video content creation
• Experience with social analytics tools and paid-for social media campaign dashboards (Google Analytics, Adobe Analytics, Meta Business Suite, Looker Studio)

The expected range for this role is £30,000 - £39,000. This is a Hybrid role from our London Office, working three days from the office, two from home.

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We are seeking a highly skilled ASIC Physical Design Staff Engineer to join our team. As a Staff Engineer, you will be responsible for implementing and integrating DDR, HBM, and HBI IP at advanced technology nodes, ensuring world-class performance and quality. You will also drive timing closure efforts, especially above ~2GHz, and resolve complex challenges related to mixed signal and macro IP integration.

Key Responsibilities:

• Implementing and integrating DDR, HBM, and HBI IP at advanced technology nodes
• Driving timing closure efforts, especially above ~2GHz
• Resolving complex challenges related to mixed signal and macro IP integration
• Designing and optimizing clock trees with tight skew balancing to meet stringent performance requirements
• Collaborating daily with local and US counterparts, contributing to technical discussions, and sharing best practices across teams
• Leading project tasks independently, providing regular updates to management, and representing the organization in business unit and company-wide projects
• Mentoring junior engineers, guiding them through technical challenges, and fostering a culture of continuous learning and innovation

Requirements:

• Minimum 6 years of experience in ASIC physical design, preferably with post-graduate qualifications
• Expertise in tools such as Design Compiler (DC), IC Compiler II (ICC2), PrimeTime SI (PT-SI), and Formality (FC)
• Proven experience with DDR/HBM/HBI timing closure, implementation, and IP integration
• Strong analytical and problem-solving skills, with a track record of resolving complex technical issues
• Ability to independently lead project tasks, mentor junior team members, and work collaboratively

Benefits:

• Comprehensive medical and healthcare plans
• Time away from work for vacation, sick leave, and family care
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more
• ESPP (Employee Stock Purchase Plan)
• Retirement plans
• Competitive salaries

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Creates and modifies computer programs to pull information from company databases.

Prepares analysis of marketing effectiveness and efficiency, retention, and cross-sell data; continually enhances reports and analyses.

Responsible for obtaining, evaluating, and communicating information that supports revenue growth and profitability.

Recommends strategies for improving results and market position.

Essential Job Functions:

Supports the marketing function by performing data manipulation and data mining on large sets of data. Development of data and information structure.

Creates and modifies computer programs to pull information from company databases.

Prepares analyses marketing driver effectiveness and efficiency and analysis of cross-sell and retention; suggests enhancements to standard approaches.

Identifies market segments and develops specialized reporting approaches.

Prepares exhibits and responds to requests for additional data.

Provides detailed requirements for systems implementation projects.

Measures and monitors marketing performance data. Facilitates through other parts of the organization to accomplish results.

Supports data sciences team through access and manipulation/formatting of data as required Performs other duties as assigned.

Benefits:

Competitive salary and performance-based bonuses

Comprehensive benefits package

Career development and training opportunities

Dynamic and inclusive work culture within a globally renowned group

Private Health and Dental Insurance

Pension Plan

Meals tickets

Life Insurance

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Key responsibilities include: Acting as the local medical leader responsible for developing a tailored strategy to meet the AZ USMA priorities in the disease area, as well as the local specificities and patient needs. Developing strong working relationships in different external business settings (e.g. academia, hospitals, managed markets, private practices). Leading scientific exchanges with oncologists, urologists and key members of the MDT. Gathering insights on the treatment landscape, evolving healthcare environment and practice, barrier to optimal treatment and patient care or opportunities to improve outcomes of patients with cancer. Communicating internally insights, findings, and propose actions to improve patient care and outcomes. Discussing with KOLs data and educational gaps to ensure adequate use of our medicines and to inform our R&D strategy to address patient needs. Summarizing appropriate clinical data into accurate and balanced information and clearly and concisely convey the most relevant information. Staying current with scientific knowledge (e.g. marketed and emerging products, competitors’ activities, key healthcare trends, anatomy & physiology; pathophysiology in relevant disease states, and current therapeutic interventions related to disease states. Attending relevant scientific meetings and conferences. Collaborating with Clin ops on Ph3 trials from feasibility to execution of trials. Discussing and following-up on ESRs.

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We currently have 700 open roles.

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Application Engineering, Sr Staff Engineer

Bengaluru, Karnataka, India

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Category

Engineering

Hire Type

Employee

Job ID

15544

Date posted

04/12/2026

A peek inside our office

Po Popal

Workplace Resources, Sr Director

Alternate Job Titles:

• Senior Staff Application Engineer

• Lead Application Engineer

• Principal Application Engineer

• Technical Solutions Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and versatile engineering professional who thrives in a dynamic, fast-paced environment. With a deep technical acumen and a knack for creative problem-solving, you are driven to deliver innovative solutions that address complex challenges. You have a proven track record in application engineering, accompanied by a strong understanding of EDA tools, chip design flows, and customer-centric solution delivery. You are an excellent communicator, able to articulate technical concepts clearly to both engineering teams and external stakeholders. Adaptable and resourceful, you embrace new technologies and strive for continual learning, eager to stay ahead in a rapidly evolving industry.

You value collaboration and are committed to fostering an inclusive, supportive team culture. Your leadership skills shine in mentoring others and guiding cross-functional projects. You are motivated by the opportunity to shape technology that impacts millions of lives and are ready to take ownership of challenging projects. Your customer-first mindset ensures that you consistently deliver high-impact results, while your attention to detail guarantees the reliability and quality Synopsys is known for. If you are looking for a role where your expertise will be recognized and your contributions will make a tangible difference, this is the opportunity for you.

What You’ll Be Doing:

• Collaborating with customers to understand their technical challenges and providing comprehensive solutions using Synopsys tools and platforms.

• Driving the adoption and integration of EDA tools in customer design flows, ensuring optimal utilization and performance.

• Developing and delivering technical workshops, training sessions, and product demonstrations tailored to customer needs.

• Partnering with R&D and product management teams to influence product direction and resolve complex technical issues.

• Authoring and maintaining technical documentation, application notes, and best practice guides.

• Providing pre- and post-sales technical support, including troubleshooting, bug tracking, and solution development.

• Mentoring and guiding junior engineers, fostering a culture of technical excellence and innovation.

The Impact You Will Have:

• Accelerating customer success by ensuring seamless deployment and integration of Synopsys solutions.

• Enhancing product quality and usability through direct feedback and collaboration with R&D teams.

• Expanding Synopsys’ footprint in key accounts by demonstrating technical excellence and building strong customer relationships.

• Reducing design cycle times and improving overall productivity for our customers.

• Contributing to the growth of Synopsys’ technical community through knowledge sharing and mentoring.

• Influencing future product innovations by identifying emerging customer needs and market trends.

What You’ll Need:

• Strong expertise in ASIC/FPGA design and verification methodologies.

• Hands-on experience with industry-leading EDA tools such as synthesis, simulation, and formal verification platforms.

• Proficiency in scripting languages (e.g., Python, Perl, TCL) and automation frameworks.

• Solid understanding of digital design, SoC architectures, and semiconductor manufacturing processes.

• Ability to analyze and resolve complex technical issues quickly and effectively.

Who You Are:

• Innovative thinker with a proactive approach to problem-solving.

• Excellent communicator, able to convey complex technical concepts to diverse audiences.

• Collaborative team player who values diversity and inclusion.

• Customer-oriented with a commitment to delivering outstanding service and solutions.

• Adaptable, resilient, and eager to learn new technologies and methodologies.

The Team You’ll Be A Part Of:

You’ll join an accomplished team of application engineering experts at the forefront of EDA and semiconductor innovation. Our team partners closely with customers, R&D, and product management to deliver world-class solutions and technical support. We foster a collaborative, inclusive culture that encourages continuous learning, knowledge sharing, and professional growth. Together, we drive the adoption of cutting-edge technologies and ensure Synopsys remains the trusted partner for industry leaders worldwide.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your primary focus will be on collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. You will also be responsible for automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.

In addition, you will troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. You will interface directly with customers and Field Application Engineers (FAEs) to gather requirements, provide technical support, and ensure successful deployment of PV solutions.

As a natural collaborator and mentor, you will guide junior team members and foster a supportive team environment. Your excellent communication skills will enable you to engage confidently with customers and FAEs, translating complex requirements into innovative solutions.

Key Responsibilities:

• Develop and validate DRC, LVS, and Fill runsets for the Synopsys IC Validator tool
• Collaborate with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes
• Automate qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python
• Troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges
• Interface directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions
• Mentor junior team members and foster a supportive team environment

Requirements:

• B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field
• 5-8 years of hands-on experience in the Physical Verification (PV) domain
• Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS
• Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development
• Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements
• Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks
• Exposure to competitive EDA tools and awareness of their strengths and limitations

Ideal Candidate:

• Analytical thinker with strong problem-solving abilities and meticulous attention to detail
• Collaborative team player who fosters knowledge sharing and mentorship
• Effective communicator, capable of translating technical concepts to diverse audiences
• Adaptable and proactive, with a passion for continuous learning and innovation
• Customer-focused, with a commitment to delivering high-quality solutions on time
• Self-driven, organized, and able to manage multiple priorities in a fast-paced environment

Experience Level: senior Employment Type: full-time Workplace Type: onsite Category: Engineering Industry: Technology Salary Range: Not stated Salary Min: Not stated Salary Max: Not stated Salary Currency: USD Salary Period: year Required Skills: IC Validator, Calibre, Pegasus, Perl, Tcl, Python, CMOS layout, ASIC design flows, foundry process requirements Preferred Skills: None

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Responsibilities:

• Prepare samples for Cut & Etch using plasma cutting, wet saw, polishing, and etching (acid)
• Perform destructive cut & etch testing on production MIG welds, capturing images and measuring weld features using computerized software
• Perform rockwell hardness testing as required
• Perform destructive and non-destructive testing on resistance spot welds and resistance projection nuts/studs
• Manage discrepant weld reports, including emailing and generating data entry and saving reports in Excel

Qualifications:

• A high school diploma or GED
• Two years' general or specific experience in this field desired
• Basic computer skills (MS Excel, MS Word, MS Outlook)
• Welding and plasma cutting (desired)

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Responsibilities:

• Support the marketing function by performing data manipulation and data mining on large sets of data.
• Develop data and information structure.
• Create and modify computer programs to pull information from company databases.
• Prepare analyses marketing driver effectiveness and efficiency and analysis of cross-sell and retention.
• Suggest enhancements to standard approaches.
• Prepare exhibits and respond to requests for additional data.
• Provide detailed requirements for systems implementation projects.
• Measure and monitor marketing performance data.
• Facilitate through other parts of the organization to accomplish results.
• Support data sciences team through access and manipulation/formatting of data as required.

Requirements:

• Marketing Analytics and Data Literacy - Entry Level
• Reporting and Measurement Rigor - Entry Level
• Basic Analytical and Testing Skills - Entry Level
• ROI and Performance Tracking - Entry Level
• Insights Generation and Communication - Entry Level

Software / Tool Skills:

• Excel - Entry Level
• PowerBI - Entry Level
• Looker Studio - Entry Level

Benefits:

• Competitive salary and performance-based bonuses
• Comprehensive benefits package
• Career development and training opportunities
• Dynamic and inclusive work culture within a globally renowned group
• Private Health and Dental Insurance
• Pension Plan
• Meals tickets
• Life Insurance

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Essential Job Functions: Supports the marketing function by performing data manipulation and data mining on large sets of data Development of data and information structure Creates and modifies computer programs to pull information from company databases Prepares analyses marketing driver effectiveness and efficiency and analysis of cross-sell and retention Suggests enhancements to standard approaches Identifies market segments and develops specialized reporting approaches Prepares exhibits and responds to requests for additional data Provides detailed requirements for systems implementation projects Measures and monitors marketing performance data Facilitates through other parts of the organization to accomplish results Supports data sciences team through access and manipulation/formatting of data as required Performs other duties as assigned

Benefits: Competitive salary and performance-based bonuses Comprehensive benefits package Career development and training opportunities Dynamic and inclusive work culture within a globally renowned group Private Health and Dental Insurance Pension Plan Meals tickets Life Insurance

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Applications Engineering, Staff Engineer

Seongnam-si, Gyeonggi-do, South Korea

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Hire Type EmployeeJob ID 17125Date posted 04/23/2026

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated Staff Engagement Applications Engineer with over 6~ 8 years of hands-on experience in synthesis or formal verification for Tape out project. Your technical expertise helps customer to succeedfor most of Tape out projects to our worldwide key customers to accelerate business growth. You thrive in dynamic environments and possess excellent communication skills, including a strong command of English. Your background in EE/CS, coupled with your experience with EDA tools like DC, Formality, RTLA, and Fusion Compiler, makes you an ideal fit for this role.

What You’ll Be Doing:

• Providing front-end (Synthesis, Equivalence Check) technical support to field engineers, technicians, and product support personnel.

• Diagnosing, troubleshooting, and debugging complex electro/mechanical equipment, computer systems, and software.

• Collaborating with customers to understand their technical requirements and deliver tailored solutions.

• Conductingtraining sessions and workshops for both customers and internal teams.

• Developing andmaintainingtechnical documentation and support materials.

• Working closely with the development team toidentifyand resolve product issues.

The Impact You Will Have:

• Enhancing customer satisfaction by deliveringtimelyand effective technical support.

• Contributing to the development and enhancement of Synopsys products.

• Helping customers maximize the value of Synopsys technologies.

• Reducing downtime and increasing the efficiency of customer operations.

• Strengthening customer relationships and building trust in Synopsys.

• Driving continuous improvement in support processes and best practices.

What You’ll Need:

• Bachelor’s degree orMaster's degree in Electrical Engineering, Computer Science, or a related field.

• Solid understanding of semiconductor and software technologies.

• Minimum6~8 years of hands-on experience with tape-out project execution.

• Experience in troubleshooting and debugging complex systems.

• Experience with scripting languages likeC/C++,PerlandTcl.

• Strong understanding of ASIC design flow, VLSI, and CAD development.

• Excellent analytical and problem-solving skills.

Who You Are:

• Excellent communicator with strong interpersonal skills.

• Detail-oriented and highly organized.

• Proactive and self-motivated.

• Adaptable and able to thrive in a fast-paced environment.

• Collaborative team player with a positive attitude.

The Team You’ll Be A Part Of:

You will join a dynamic and innovative team focused on supporting and driving customer success. Our team collaborates closely with customer to drive technological advancements and provide top-tier support to our customers. We are passionate about pushing the boundaries of what's possible in chip design and software security, and we are looking for like-minded individuals to join us on this exciting journey.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You are a highly motivated Principal Engagement Applications Engineer with over 15 years of hands-on experience in synthesis or place and route (P&R). You have a robust understanding of the most advanced CPU/GPU/NPU designs and are eager to work closely with R&D on driving product development and developing advanced HPC reference flow.

What You’ll Be Doing: Collaborating with R&D teams to drive product development and advanced HPC reference flow development for wide deployment. Demonstrating differentiated PPA results on CPU/GPU/NPU designs to showcase our technology’s superiority. Providing technical support to key global customers to address PPA bottlenecks and design challenges on the most advanced HPC designs. Aggressively engaging in worldwide critical benchmarks and deployments to ensure the highest quality and performance of designs. Utilizing scripting languages such as Perl and Tcl for automation and optimization tasks. Staying updated with the latest advancements in ASIC design flow, VLSI, and CAD development to continually improve processes.

The Impact You Will Have: Enhancing the performance and efficiency of advanced CPU, GPU, and NPU designs. Driving innovations that contribute to the success of Synopsys’ cutting-edge technologies. Providing critical support that helps key customers overcome their PPA challenges. Contributing to the development of new features that keep Synopsys at the forefront of the industry. Improving the overall quality and reliability of our products through meticulous design and optimization. Fostering strong relationships with global customers, reinforcing Synopsys’ reputation as a leader in chip design and software security.

What You’ll Need: Application Engineer working with customer on project enablement. PD Engineer with 5+ Yrs of experience worked on Synopsys tools in Placement, CTS and Route areas. Good communication and presentation skills as this is a customer facing role

Who You Are: Excellent communicator with strong command of English. Highly motivated and self-driven. Detail-oriented with a focus on quality and performance. A team player who thrives in collaborative environments. Adaptable and eager to learn new technologies and methodologies.

The Team You’ll Be A Part Of: You will join a dynamic and innovative team focused on developing and optimizing advanced HPC designs. Our team collaborates closely with R&D to drive technological advancements and provide top-tier support to our global customers. We are passionate about pushing the boundaries of what’s possible in chip design and software security, and we are looking for like-minded individuals to join us on this exciting journey.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Job Description

As an Analog Mixed-Signal Engineer at Synopsys, you will be responsible for designing and developing high-performance memory interface solutions that power next-generation technologies. You will work closely with cross-functional teams to meet complex design specifications and project goals.

Responsibilities

• Design and develop DDR/HBM Memory Interface I/O circuits, including GPIO and special I/Os, ensuring robust performance and reliability.
• Collaborate closely with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project milestones.
• Execute circuit design tasks with a focus on quality, efficiency, and adherence to industry standards.
• Apply deep knowledge of CMOS processes and analog/mixed-signal circuitry to innovate and refine design methodologies.
• Review and optimize circuit layouts, ensuring compliance with ESD and JEDEC standards for DDR interfaces.
• Participate in design reviews, provide technical input, and contribute to the continuous improvement of design flows and best practices.
• Document design processes, test plans, and results, supporting knowledge sharing and future project success.

Impact

• Drive the development of high-performance memory interface solutions that power next-generation technologies.
• Enhance the robustness and reliability of Synopsys' analog and mixed-signal IP portfolio.
• Ensure products meet or exceed industry standards, supporting customer success and market leadership.
• Influence cross-functional teams by sharing insights and best practices in circuit design and layout.
• Contribute to the delivery of cutting-edge silicon solutions for global semiconductor leaders.
• Support continuous innovation, helping Synopsys stay ahead in a competitive, fast-moving industry.

Requirements

• BTech/MTech in Electronics or Electrical Engineering.
• 1–3 years of experience in analog/mixed-signal circuit design, with expertise in CMOS processes and deep submicron technologies.
• Proficiency in CMOS circuit design and layout methodologies; experience with ESD concepts is a plus.
• Familiarity with ASIC design flows and JEDEC DDR interface requirements, including DDR Timing, ODT, and SDRAM functionality.
• Ability to work with cross-disciplinary teams to meet complex design specifications and project goals.

Team

You will join a world-class engineering team focused on analog and mixed-signal IP development for cutting-edge memory interfaces. Our team thrives on innovation, collaboration, and technical excellence, working closely with global experts to deliver industry-leading solutions for top-tier semiconductor clients. We foster an inclusive and supportive culture where every member's contributions are valued and professional growth is encouraged.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your primary focus will be on collaborating closely with design engineering teams to gather technical content and transform it into clear, accurate, and user-friendly documentation. You will also plan, organize, and manage documentation projects, ensuring timely delivery and adherence to established style guides and documentation processes.

In addition to your technical writing skills, you will need to be able to adopt and champion best practices in technical writing, including content structuring, version control, and continuous improvement of documentation workflows. You will also contribute to the documentation roadmap and collaborate with cross-functional teams to identify and close documentation gaps.

As a Senior Technical Writer, you will have the opportunity to empower customers to effectively utilize Synopsys IP products by providing clear, comprehensive, and accessible documentation. You will accelerate product adoption and integration by reducing barriers to understanding complex technologies, enhance the overall user experience and customer satisfaction through high-quality, reliable documentation, and support the success of engineering, product, and support teams by delivering timely, accurate collateral.

To be successful in this role, you will need to have a Bachelor's or Master's degree in electronics, science, hardware, computing, software, physics, mathematics, engineering, or a closely related technical discipline. You will also need to have 3-7 years of demonstrated technical writing experience in the software or hardware industry, proficiency in authoring tools such as FrameMaker (Structured or Unstructured), exceptional English writing and verbal communication skills, strong problem-solving abilities, logical reasoning, and solution-oriented mindset, and the ability to quickly learn and assimilate new technologies, tools, and processes.

If you are a detail-oriented and quality-focused individual with excellent communication and collaboration skills, and a passion for creating high-quality documentation, we encourage you to apply for this exciting opportunity.

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Your responsibilities will include:

Implementing and integrating state-of-the-art DDR IPs at advanced technology nodes (10nm, 7nm, 6nm, and below). Performing timing closure for designs operating above ~4GHz, ensuring robust performance and reliability. Collaborating daily with local and US counterparts to align on technical challenges and project milestones. Integrating mixed-signal macro IPs and optimizing their placement within complex chip architectures. Designing and building efficient clock trees with exceptionally tight skew balancing to meet stringent requirements. Driving continuous improvement in implementation methodologies and sharing best practices across the team. Participating in design reviews, providing critical feedback and innovative solutions to enhance project outcomes.

As a senior engineer, you will have a strong technical foundation in ASIC physical design and hands-on experience with DDR IP implementation and timing closure, especially at advanced nodes (10nm, 7nm, 6nm and below). You will also have proficiency in EDA tools for synthesis, place-and-route, and timing analysis.

If you are a detail-oriented and analytical individual with a drive for technical excellence, effective communication skills, and a collaborative mindset, we encourage you to apply for this exciting opportunity.

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As we extend our project management team for High-Performance Computing (HPC) developments, we have a great job opportunity for you. In this interesting and challenging position as a project engineering manager (PEM) you will be responsible for the planning and execution of development projects which deliver leading-edge products for HPC applications.

You are a seasoned engineering professional with a passion for innovation and excellence. With a solid background in project management and engineering (at least 6 years of experience), you thrive in dynamic environments and excel at leading cross-functional teams to success. Your analytical mindset allows you to navigate complex challenges, and your communication skills ensure that all stakeholders are aligned and informed. You possess a deep understanding of engineering principles and are adept at applying them to real-world scenarios. Your proactive approach and attention to detail set you apart, and you are always looking for ways to improve processes and outcomes. You are not just a manager but a mentor and a leader, inspiring your team to achieve their best.

Key Responsibilities: Collaborate with cross-functional teams to define project requirements, scope, and objectives; Develop detailed project plans, including timelines, resource allocation, and risk management strategies; Monitor project progress and performance, identifying potential issues, and implementing corrective actions as needed; Communicate project status, updates, and milestones to stakeholders, ensuring transparency and alignment; Represent R&D on customer relationships, tracking execution to plan, aligning with senior leadership of team on mitigation and escalation management; Mentor and guide team members, fostering a collaborative and innovative work environment.

Impact: Driving the successful execution of engineering projects, contributing to Synopsys' reputation for excellence and innovation; Enhancing the efficiency and effectiveness of project management processes, leading to improved project outcomes; Facilitating cross-functional collaboration, ensuring that all teams are working towards common goals; Providing leadership and mentorship to team members, fostering their professional growth and development; Ensuring that projects are delivered on time, within scope, and within budget, contributing to the overall success of the organization; Identifying opportunities for process improvements and implementing best practices to enhance project delivery.

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You are an inventive and detail-oriented engineer with a strong foundation in Computer Science or Electronics, and a passion for advancing the frontiers of Design for Test (DFT) technology. With 3+ years of hands-on experience in DFT, scripting, and software automation, you are eager to take on complex challenges in the rapidly evolving semiconductor industry.

As a candidate, you possess a keen analytical mindset and enjoy problem solving, particularly when it comes to troubleshooting and root cause analysis. You are comfortable working closely with cross-functional teams, providing valuable feedback, and contributing to product readiness.

Your experience with scripting languages, RTL coding, and a variety of DFT technologies enables you to deliver scalable solutions tailored to customer architectures and methodologies. You embrace the opportunity to work with cutting-edge tools, including AI-enabled agents, and take pride in producing high-quality documentation and pragmatic solutions.

Elevate the quality and performance of Synopsys' industry-leading DFT tools, directly contributing to customer success and business growth.

Enable customers to implement robust test methodologies that improve silicon quality and accelerate time-to-market for advanced chips.

Drive innovation in DFT automation, making cutting-edge solutions accessible across diverse industry segments, from AI to mobile networking.

Strengthen Synopsys' reputation as a trusted partner in delivering scalable, reliable, and high-performance test solutions.

Facilitate cross-team knowledge sharing by providing actionable feedback and creating comprehensive documentation.

Advance the adoption of AI-driven testing and automation, keeping Synopsys at the forefront of technological advancement.

Support the seamless integration of new features and methodologies, ensuring Synopsys products remain competitive and future-ready.

Develop detailed test plans, incorporating new features into test cases, and executing/automating these test cases using Verilog, System Verilog, or VHDL.

Review specifications and test plans from other teams, offering feedback to ensure feature completeness and product readiness.

Collaborate with Product Engineering and R&D teams to create in-house test cases and implement scalable DFT solutions based on customer requirements.

Perform Quality of Results (QOR) analysis, troubleshooting, and root cause analysis to resolve complex technical issues across multiple aspects of the ASIC flow.

Focus on tool features such as DFT compression, ATPG for various fault models (SSAF, Transition Delay Fault, Cell-aware faults), and architecting solutions for Memory and Logic BIST.

Conduct diagnostics analysis and debugging to enhance tool reliability and performance.

Work with AI agents to review and create assistive or generative AI documentation for test products.

Manage performance, installation, and license testing to ensure seamless customer experience.

Bachelor's, Master's, or MTech in Electrical/Electronics Engineering, Computer Science, or a related field with 3+ years of relevant experience.

Hands-on expertise in DFT technologies such as JTAG, MBIST, Scan, and related test architectures.

Proficiency in RTL coding using Verilog, System Verilog, and/or VHDL.

Advanced scripting skills in Perl, Tcl/Tk, Python, or similar languages for automation and tool integration.

Familiarity with change management tools (e.g., Perforce) for collaborative development and version control.

Solid understanding of ASIC design flow, including design planning, synthesis, physical design, and sign-off verification tools.

Analytical thinker with exceptional problem-solving skills and a passion for troubleshooting complex technical challenges.

Effective communicator who excels in cross-functional team environments and can articulate technical concepts to varied audiences.

Collaborative team player who values diverse perspectives and actively contributes to group success.

Proactive and adaptable, with a strong desire to learn and innovate in a fast-paced, evolving technological landscape.

Detail-oriented and organized, able to manage multiple priorities and deliver high-quality results on schedule.

You'll join the Synopsys Test Group, a dynamic team focused on developing cutting-edge Design for Test (DFT) solutions.

The team is composed of passionate engineers and innovators who collaborate across product engineering and R&D to create industry-leading methodologies and tools.

Together, you will address challenges in diverse domains such as autonomous systems, AI, high-performance computing, and mobile networking, driving the next wave of silicon innovation.

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Applications Engineering, Principal Engineer

Sunnyvale, California, United States

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Hire Type EmployeeJob ID 17080Base Salary Range $184000-$276000Date posted 04/21/2026

You Are:

You are a seasoned professional with a passion for cutting-edge technology and a drive to solve complex technical challenges. With over 8 years of experience in IC design, verification, emulation, or FPGA prototyping, you have a deep understanding of ASIC design verification methodologies and are proficient with HDLs such as Verilog and VHDL. Your skillset extends to HVLs like SystemVerilog and you have a working knowledge of C/C++. You possess excellent problem-solving skills and can analyze and resolve intricate design verification and software validation issues. Your strong communication abilities enable you to work effectively with customers, sales, marketing, and R&D teams, ensuring the successful deployment and evaluation of Synopsys' emulation solutions.

What You’ll Be Doing:

• Deploying and evaluating Synopsys' emulation solutions to meet customer needs.

• Collaborating closely with customers to resolve complex technical issues related to ASIC/SoC designs.

• Providing pre-sales evaluations and post-sales support to ensure customer success.

• Developing technical collaterals to assist in the adoption of Synopsys products.

• Working with sales, marketing, and R&D teams to align on customer requirements and product enhancements.

• Continuously learning and staying updated with state-of-the-art verification flows from Synopsys.

The Impact You Will Have:

• Enabling customers to successfully deploy and utilize Synopsys' emulation solutions.

• Enhancing customer satisfaction by resolving complex technical issues efficiently.

• Driving the adoption of Synopsys' industry-leading verification solutions.

• Contributing to the development of cutting-edge ASIC/SoC designs.

• Supporting sales efforts by providing technical expertise during pre-sales evaluations.

• Shaping product enhancements based on customer feedback and market needs.

What You’ll Need:

• 8+ years of experience in IC design, verification, emulation, or FPGA prototyping.

• Strong knowledge of ASIC design verification methodologies.

• Proficiency in HDLs (Verilog/VHDL) and HVLs (SystemVerilog).

• Familiarity with C/C++ programming languages.

• Excellent communication and problem-solving skills.

The Team You’ll Be A Part Of:

You will join a dynamic and innovative team focused on providing the most complete verification solutions in the market. The team leverages Synopsys' industry-leading emulation platform, ZeBu, to deliver unparalleled performance and capacity in emulation. Collaborating with customers, sales, marketing, and R&D teams, you will play a crucial role in driving the successful deployment and adoption of Synopsys' emulation solutions.

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You Are: A highly skilled engineer with strong expertise in ASIC prototyping, emulation, and debug, especially using HAPS and Zebu platforms. You’re a problem-solver with excellent communication abilities, able to support customers and collaborate with cross-functional teams. You enjoy integrating hardware and software, thrive on technical challenges, and are eager to deliver innovative solutions that help customers succeed.

Responsibilities:

• Building and supporting integrated solutions using HAPS and Zebu systems.
• Debugging complex issues involving clocking, timing, and tool flows.
• Developing user models/interfaces for seamless system integration.
• Providing technical support and guidance to customers.
• Documenting methodologies and troubleshooting steps.
• Collaborating with internal and customer teams to optimize solutions.

The Impact You Will Have:

• Accelerating customers’ ASIC development with robust emulation and prototyping solutions.
• Improving system integration and verification efficiency.
• Enhancing customer satisfaction with timely, expert support.
• Contributing technical insights for product improvement.
• Strengthening Synopsys’ reputation for innovation and service.
• Building strong, trust-based relationships with clients.

Requirements:

• Experience with ZeBu and HAPS prototyping systems.
• Expertise in clocking, timing, and integration flows.
• Proficiency in user model/interface development.
• Strong debugging and problem-solving skills.
• Excellent customer communication abilities.

Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You are a highly motivated Principal Engagement Applications Engineer with over 15 years of hands-on experience in synthesis or place and route (P&R). You have a robust understanding of the most advanced CPU/GPU/NPU designs and are eager to work closely with R&D on driving product development and developing advanced HPC reference flow.

Your technical expertise allows you to demonstrate differentiated PPA results on the most advanced IP cores to win benchmarking and deploy HPC methodologies to our worldwide key customers to accelerate business growth. You thrive in dynamic environments and possess excellent communication skills, including a strong command of English.

Collaborate with R&D teams to drive product development and advanced HPC reference flow development for wide deployment. Demonstrate differentiated PPA results on CPU/GPU/NPU designs to showcase our technology's superiority. Provide technical support to key global customers to address PPA bottlenecks and design challenges on the most advanced HPC designs. Aggressively engage in worldwide critical benchmarks and deployments to ensure the highest quality and performance of designs. Utilize scripting languages such as Perl and Tcl for automation and optimization tasks. Stay updated with the latest advancements in ASIC design flow, VLSI, and CAD development to continually improve processes.

Enhance the performance and efficiency of advanced CPU, GPU, and NPU designs. Drive innovations that contribute to the success of Synopsys' cutting-edge technologies. Provide critical support that helps key customers overcome their PPA challenges. Contribute to the development of new features that keep Synopsys at the forefront of the industry. Improve the overall quality and reliability of our products through meticulous design and optimization. Foster strong relationships with global customers, reinforcing Synopsys' reputation as a leader in chip design and software security.

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We currently have 700 open roles

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You are passionate about cutting-edge technology, eager to solve complex problems, and driven by a desire to empower innovation across industries. With a strong foundation in physics, optics, photonics, opto-electronics, or a related engineering field, you possess a keen analytical mind and an enthusiasm for continuous learning. Your curiosity propels you to stay updated with the latest advancements in simulation, engineering software, and AI. You thrive in dynamic, fast-paced environments where agility and adaptability are key, embracing a “try often, fail fast” mindset to accelerate progress.

You are an excellent communicator, capable of translating complex technical concepts for diverse audiences with clarity and empathy. Your collaborative mindset helps you work effectively with cross-functional teams and subject matter experts to close knowledge gaps and deliver meaningful outcomes. You are organized, resourceful, and comfortable managing multiple priorities while maintaining urgency and attention to detail. Above all, you are motivated by the opportunity to help customers use simulation and AI to turn ideas into reality and drive human advancement.

Deliver high-level technical support to customers and channel partners for the Ansys Optics and Photonics product family, with a strong focus on responsiveness, technical accuracy, and customer satisfaction. Utilize the Ansys Technical Support toolset, including Innovation Space, AnsysGPT, and other AI-based platforms, to identify, develop, and deliver effective solutions to customer issues. Adhere to established support processes to ensure timely, high-quality customer service and consistently drive strong customer satisfaction outcomes.

Develop deep technical expertise in simulation areas relevant to customer applications, industry trends, and the Ansys Optics and Photonics portfolio. Submit product improvement suggestions, file defect reports, and verify fixes in alignment with defect reporting protocols; this is a key responsibility of the role and an important part of improving product quality and customer success. Document and share knowledge to improve team effectiveness, support consistency, and customer outcomes.

Engage in strategic team and company initiatives, contributing to broader organizational goals and the evolution of customer support methodologies.

Accelerate customer innovation by ensuring seamless integration of Ansys, part of Synopsys solutions into engineering design workflows. Enhance customer satisfaction and loyalty through prompt, expert technical support and high-quality solution delivery. Directly influence support excellence by helping maintain strong customer satisfaction outcomes and a consistently positive customer experience. This role has a clear and measurable impact on customer satisfaction.

Drive continuous improvement of Ansys, part of Synopsys products by channeling customer feedback, filing software defects, and validating fixes. Improve product readiness and customer success by participating in field testing activities that validate workflows and ensure product changes meet real-world application needs. Support the adoption of cutting-edge simulation and AI technologies across diverse industries. Strengthen the technical knowledge base of the support organization through documentation, collaboration, and knowledge sharing.

Advance your own expertise and career by working alongside some of the industry’s sharpest minds.

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A typical day might involve performing assignments involving designs for DOT conflicts, System Improvements, Renewals, Relocations, and New Business. The engineer will also plan and design mechanical equipment and components, develop meter and regulator set designs, collect and evaluate records for uprating procedures, and provide oversight and support for construction activities.

The Design Engineer will work closely with internal and external stakeholders to collaboratively accomplish tasks and resolve issues. They will have the ability and initiative to work in a self-guided and efficient manner, with a customer-focused critical thinking mindset.

The position is an exciting opportunity for persons who enjoy the challenges of supporting the construction of natural gas facilities.

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We're seeking a passionate engineer with a deep understanding of timing, design closure, and semiconductor workflows. As a Senior Applications Engineer, you'll engage with customers to understand their timing closure challenges and provide expert guidance on the Synopsys TCM product suite.

Key responsibilities include:

• Engaging with customers to understand their timing closure challenges and providing expert guidance on the Synopsys TCM product suite.
• Supporting the deployment, integration, and optimization of TCM solutions in advanced semiconductor design environments.
• Collaborating closely with R&D and product teams to relay customer feedback and influence feature development.
• Developing and delivering technical presentations, workshops, and training sessions for internal and external stakeholders.
• Diagnosing and resolving complex technical issues, ensuring high standards of customer satisfaction and product reliability.
• Documenting best practices, creating user guides, and contributing to knowledge bases to support ongoing customer success.

In this role, you'll have the opportunity to accelerate customer design cycles by enabling seamless integration and effective use of Synopsys TCM technologies, advance the adoption of timing constraint management solutions across leading semiconductor companies, and enhance product quality and user experience through proactive feedback and continuous improvement initiatives.

If you're excited about working on cutting-edge products like Synopsys TCM, and making a tangible impact in the semiconductor industry, you'll find your next challenge here.

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This position will be located at Southern Company Gas HQ- 725 W. Peachtree Street, Atlanta, GA 30308.

Responsibilities: Greet and assist all guests, employees, and vendors in a courteous and professional manner. Verify identification and authorization for facility access in accordance with established security policies. Issue and manage visitor and contractor badges, ensuring accurate logging and recordkeeping. Coordinate with security officers, reception, and facilities personnel to ensure efficient visitor flow. Provide information, directions, and assistance to guests and employees as needed. Handle incoming calls and inquiries related to visitor scheduling or access permissions. Support the onboarding process for new employees by facilitating ID badge issuance and access provisioning. Prepare daily logs, visitor reports, and incident documentation as required. Participate in regular security and customer service training programs.

Qualifications: High school diploma or GED required; some college coursework preferred. 1–3 years of experience in customer service, front desk, or security/access control roles.

Skills and Abilities: Strong interpersonal and communication skills. Ability to maintain professionalism and composure in stressful situations. Familiarity with access control and visitor management systems preferred. Proficient in Microsoft Office and basic computer applications. Must demonstrate integrity, reliability, and attention to detail.

Behavioural Attributes: Models all aspects of Our Values. Understands broad implications of decisions and work activities, determines steps needed to achieve goals, exhibits a high degree of initiative and personal responsibility. Detailed, positive motivator, dependable, flexible, customer focused, team player, intelligent risk-taker, and results oriented.

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These engineers play a crucial role in advancing technology and enabling innovations in various industries.

As a Sr Director of ASIC Physical Design, you will own and drive the end-to-end physical design flow for high-speed die-to-die interconnect and interface chips targeting 2 GHz+ on advanced process nodes (sub-7nm/5nm/3nm).

Key responsibilities include:

• Leading floorplanning, power planning, clock tree synthesis, place-and-route, and physical verification with emphasis on die-to-die interface placement and bump/pad ring constraints.

• Achieving timing closure across all corners and modes, with expertise in multi-corner multi-mode sign-off for high-speed serial and parallel interfaces.

• Driving power integrity, signal integrity, and thermal analysis to meet stringent tape-out criteria for high-bandwidth die-to-die links.

• Defining and owning physical design methodology, Synopsys tool flows, and best practices across the organization.

• Building, mentoring, and leading a globally distributed team, establishing effective communication and collaboration norms to foster cohesion and engineering excellence.

• Collaborating cross-functionally with RTL design, DV, architecture, CAD/EDA, and program management teams globally.

• Owning physical design schedules and milestones for multiple concurrent projects, communicating status to senior leadership and mitigating risks proactively.

• Championing automation and scripting to improve PPA outcomes and team productivity.

The impact you will have:

• Enable the physical implementation of high-speed die-to-die interconnects that power large-scale AI accelerators, GPU clusters, and multi-die systems.

• Deliver ultra-low latency, high-bandwidth chip-to-chip communication at the core of next-generation AI infrastructure.

• Advance the adoption of cutting-edge process nodes and interface standards, positioning Synopsys as a leader in silicon innovation.

• Ensure robust engineering quality, execution velocity, and successful tape-outs across global teams.

• Drive organizational excellence by fostering a culture of accountability, growth, and technical mastery.

• Shape methodologies and tool flows that set industry benchmarks for high-speed, advanced-node physical design.

• Contribute to the strategic direction of AI silicon and interconnect products, impacting the broader technology ecosystem.

Requirements:

• 15+ years of hands-on physical design experience, with deep expertise in high-frequency (≥2 GHz) chip design.

• Expertise with Synopsys IC Compiler II (ICC2), PrimeTime, Fusion Compiler, StarRC, IC Validator, and PrimePower.

• Track record of taping out high-speed interface ICs, die-to-die interconnect chips, SerDes, or similar designs at advanced process nodes (7nm, 5nm, 3nm).

• Understanding of die-to-die interface standards and protocols (UCIe, BoW, HBI, XSR, or proprietary) and their physical implementation.

• Experience with power intent flows (UPF/CPF), low-power design techniques, and dynamic/static power optimization.

• Strong scripting skills (Tcl, Python, Perl) for tool flow automation and PPA optimization.

• Proven ability to lead and grow globally distributed engineering teams of 10+ people.

• Cross-cultural communication and collaboration skills; experience working across US, Asia, or European engineering centers.

• BS or MS in Electrical Engineering, Computer Engineering, or related field (PhD preferred).

As a Sr Director of ASIC Physical Design, you will join a globally distributed Silicon Engineering team focused on the physical implementation of cutting-edge AI silicon and high-speed die-to-die interconnects.

Our team spans multiple sites and time zones, collaborating with process technology, packaging, RTL, DV, architecture, CAD/EDA, and program management teams.

We pride ourselves on a culture of technical depth, low bureaucracy, and a relentless drive for engineering excellence.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

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The purpose of the Future Circulation team is to make each magazine and bookazine title's circulation as profitable and efficient as possible. We aim to reduce wasted copy, out sell competitor titles and gain market share.

You will manage the magazine and bookazine end-to-end journey from Printers to Wholesalers to UK Retailers such as Sainsburys, Tesco, WHSmith and Morrisons for sale.

Key responsibilities include: Managing complex spreadsheets using Google Sheets and Excel Creating and maintaining trackers as well as using formulae such as vlookups and import ranges Understanding of basic maths, working out sales movements year on year, and efficiencies Accuracy and speed of work

In return, you will receive: A competitive salary of £26,500 Uncapped leave, because we trust you to manage your workload and time When we hit our targets, enjoy a share of our profits with a bonus Refer a friend and get rewarded when they join Future Well-being support with access to our Colleague Assistant Programmes Opportunity to purchase shares in Future, with our Share Incentive Plan

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Role Details

We are seeking a skilled leader with extensive SoC/ASIC experience and a passion for customer success to join our team as a Senior Manager, Applications Engineering. As a member of our team, you will lead, coach, and develop Application Engineers, manage execution across multiple customer projects, resolve customer escalations, and drive solutions.

Key Responsibilities

• Lead, coach, and develop Application Engineers
• Manage execution across multiple customer projects
• Resolve customer escalations and drive solutions
• Standardize integration reviews and engagement best practices
• Collaborate with R&D and Product teams for improvements
• Track metrics and optimize team processes

Impact

As a Senior Manager, Applications Engineering, you will enhance adoption of Synopsys Interface IP products, enable successful customer design integrations, boost customer satisfaction, and strengthen Synopsys' market position.

Requirements

• Bachelor's/Master's in Electrical/Computer Engineering
• 15+ years in SoC/ASIC development and technical leadership
• Experience with PCIe/Ethernet protocols
• Hands-on simulation, synthesis, STA expertise
• Strong team leadership and customer support skills

Who We Are Looking For

• Creative, results-oriented, and collaborative
• Excellent communicator and problem solver
• Willing to travel for key engagements no more than 15% of the time

The Team You'll Be A Part Of

A collaborative group focused on enabling customers to integrate Synopsys Interface IP into their SoCs and supporting them through design and deployment.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide details during the hiring process.

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As a Staff Engineer in our ASIC Digital Design team, you will be responsible for leading and driving ownership of critical areas of verification alongside a team of talented verification engineers. You will define, implement, and track comprehensive verification test plans to ensure robust coverage and quality for Subsystem.

Your responsibilities will include specifying, building, enhancing, and maintaining state-of-the-art Subsystem top-level UVM-based System Verilog testbenches, integrating RTL and behavioral models. You will also code and debug test cases, including the creation of complex checkers and assertions using System Verilog/UVM.

In addition, you will extract and review functional coverage (FC) and code coverage metrics to ensure quality metric goals are met. You will manage regressions and contribute to the continuous improvement of verification strategies and test environments.

You will work closely with RTL designers and architects to ensure functional correctness and collaborate with a global team of experienced verification engineers, fostering knowledge sharing and professional growth.

As a Staff Engineer, you will have the opportunity to make a significant impact on the success of our Subsystem and contribute to the early detection and resolution of critical design issues, reducing time-to-market and silicon re-spins.

You will also enhance Synopsys' reputation as the premier provider of high-speed connectivity IP Subsystem through engineering excellence and innovation, and bolster Synopsys' leadership in chip design by ensuring our IP verification methodologies set industry standards.

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As a Sr Staff Engineer in ASIC Physical Design, you will contribute to the development of advanced semiconductor solutions, collaborating with cross-functional teams to design, verify, and manufacture complex SoCs and test chips. Your expertise in the physical design flow and familiarity with industry-leading tools will enable you to drive technical execution and lead complex projects.

Key Responsibilities:

• Contributing to physical design implementation for test chips across DDR/HBM/UCIe protocols, from RTL to final GDS release to foundry.
• Developing overall floorplan and power/ground strategies tailored for diverse test chip architectures.
• Owning and optimizing the RTL-to-GDSII flow, ensuring design convergence for area, power, performance, and manufacturability.
• Executing and overseeing static timing analysis (STA) and physical verification (EM/IR drop, ERC/DRC/LVS, PERC/ESD analysis).
• Integrating updated covercells, circuit/IP/PLL/hard-macros, and coordinating abutment checking and QA/release of hard-macros.
• Driving tool flow automation and debugging to enhance productivity and design reliability.
• Collaborating closely with architecture, RTL, circuit, and covercell teams throughout test chip development.

Impact:

• Enable robust validation of Synopsys's IP blocks for PHYs, ensuring high-quality deliverables prior to customer release or SoC integration.
• Accelerate time-to-market by driving rapid turnaround from RTL to silicon, reducing schedule risks and helping Synopsys meet critical market windows.
• Enhance product reliability and manufacturability through rigorous timing closure, power/thermal analysis, and comprehensive verification signoff.
• Bolster Synopsys's reputation by delivering high-quality, silicon-proven IP that meets real-world performance and reliability standards.
• Foster seamless cross-functional collaboration, bridging architects, RTL designers, verification teams, and silicon validation groups.
• Champion continuous process and tool improvement, implementing flow automation to keep Synopsys at the forefront of EDA innovation.

Requirements:

• 9+ years of experience in ASIC physical design, with a proven track record in complex SoC or test chip implementations at advanced process nodes.
• Deep expertise in the complete ASIC physical design flow: floor planning, synthesis, P&R, timing closure, IR-drop/EM analysis, LVS/DRC, etc.
• Familiarity with IP integration, test chip methodology, and advanced verification flows.
• Proficiency with state-of-the-art CAD tools such as Design Compiler (DC), PrimeTime (PT), IC Compiler II/FC, ICV, Calibre, RedHawk, and FinFet technologies.
• Experience coordinating complex, cross-functional projects and leading technical execution.
• Authorization to work in the USA.

Team:

You'll join the Test Chip PHY development team within Synopsys's Silicon IP business. This group is dedicated to integrating and validating Synopsys's broad portfolio of IP blocks,logic, memory, interfaces, analog, security, and embedded processors,into test chips at the forefront of semiconductor innovation. The team works collaboratively across architecture, RTL, circuit, and covercell disciplines to deliver robust, silicon-proven IP solutions that power next-generation products for global customers.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over four years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures.

Responsibilities:

Architecting and implementing state-of-the-art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications.

Translating standard and functional specifications into detailed micro-architectures and comprehensive design documentation for medium to high complexity features.

Leading and contributing hands-on to RTL coding, synthesis, CDC analysis, debug, and test development tasks.

Collaborating with global teams and engaging directly with customers to understand and refine specification requirements.

Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&R-aware synthesis using tools such as Fusion Compiler.

Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies.

Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency.

The Impact You Will Have:

Enable Synopsys to deliver industry-leading, high-performance IP cores that power next-generation technologies.

Contribute to the successful execution of complex, global projects that set new standards in chip design and verification.

Accelerate time-to-market for customers in commercial, enterprise, and automotive sectors by delivering robust, reliable IP solutions.

Elevate the technical capabilities of your team through mentorship and leadership, cultivating a culture of continuous learning and innovation.

Drive improvements in design quality, efficiency, and scalability through process optimization and automation.

Directly influence product architecture and feature enhancements, ensuring alignment with customer needs and emerging industry trends.

What You’ll Need:

Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field.

4+ years of hands-on industry experience in ASIC RTL design, with a strong portfolio of completed projects.

Deep expertise in data path and control path design, including experience with Reed Solomon FEC, BCH codes, CRC architectures, and MAC SEC engines.

Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis.

Familiarity with high-speed design (>600MHz), P&R-aware synthesis, and EDA tools such as Fusion Compiler.

Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation.

Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI-UFS/Unipro, SD-MMC, AMBA (AMBA2, AXI).

Exposure to quality processes in IP design and verification is an advantage.

Prior experience as a technical lead or mentor is highly desirable.

Who You Are:

Innovative thinker with a solutions-oriented mindset and a passion for technology.

Excellent communicator who thrives in collaborative, multicultural, and multi-site environments.

Natural leader with mentoring abilities, fostering inclusion and diversity within the team.

Detail-oriented professional with strong analytical and problem-solving skills.

Self-motivated, adaptable, and eager to drive technical excellence and process improvements.

Committed to continuous learning and staying ahead of industry trends.

The Team You’ll Be A Part Of:

You will join the R&D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting-edge IP cores that enable Synopsys’ global customers to achieve their design goals.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Staff DFT Applications Engineer

Bengaluru, Karnataka, India

Save

Hire Type EmployeeJob ID 16891Date posted 04/12/2026

A peek inside our office

Po Popal

Workplace Resources, Sr Director

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an inventive and detail-oriented engineer with a strong foundation in Computer Science or Electronics, and a passion for advancing the frontiers of Design for Test (DFT) technology. With 3+ years of hands-on experience in DFT, scripting, and software automation, you are eager to take on complex challenges in the rapidly evolving semiconductor industry. You excel in both independent and collaborative environments, thriving in project-oriented settings where you can develop, automate, and validate sophisticated DFT flows and methodologies. Your curiosity and drive for continuous learning make you adept at keeping up with the latest advancements in Autonomous Transportation, Mission Critical AI, High Performance Computing, and Mobile Networking.

As a candidate, you possess a keen analytical mindset and enjoy problem solving, particularly when it comes to troubleshooting and root cause analysis. You are comfortable working closely with cross-functional teams, providing valuable feedback, and contributing to product readiness. Your experience with scripting languages, RTL coding, and a variety of DFT technologies enables you to deliver scalable solutions tailored to customer architectures and methodologies. You embrace the opportunity to work with cutting-edge tools, including AI-enabled agents, and take pride in producing high-quality documentation and pragmatic solutions. Your exceptional communication and networking skills allow you to bridge gaps between engineering and R&D, ensuring the highest standards in test solutions.

What You’ll Be Doing:

• Developing detailed test plans, incorporating new features into test cases, and executing/automating these test cases using Verilog, System Verilog, or VHDL.

• Reviewing specifications and test plans from other teams, offering feedback to ensure feature completeness and product readiness.

• Collaborating with Product Engineering and R&D teams to create in-house test cases and implement scalable DFT solutions based on customer requirements.

• Performing Quality of Results (QOR) analysis, troubleshooting, and root cause analysis to resolve complex technical issues across multiple aspects of the ASIC flow.

• Focusing on tool features such as DFT compression, ATPG for various fault models (SSAF, Transition Delay Fault, Cell-aware faults), and architecting solutions for Memory and Logic BIST.

• Conducting diagnostics analysis and debugging to enhance tool reliability and performance.

• Working with AI agents to review and create assistive or generative AI documentation for test products.

• Managing performance, installation, and license testing to ensure seamless customer experience.

The Impact You Will Have:

• Elevate the quality and performance of Synopsys’ industry-leading DFT tools, directly contributing to customer success and business growth.

• Enable customers to implement robust test methodologies that improve silicon quality and accelerate time-to-market for advanced chips.

• Drive innovation in DFT automation, making cutting-edge solutions accessible across diverse industry segments, from AI to mobile networking.

• Strengthen Synopsys’ reputation as a trusted partner in delivering scalable, reliable, and high-performance test solutions.

• Facilitate cross-team knowledge sharing by providing actionable feedback and creating comprehensive documentation.

• Advance the adoption of AI-driven testing and automation, keeping Synopsys at the forefront of technological advancement.

• Support the seamless integration of new features and methodologies, ensuring Synopsys products remain competitive and future-ready.

What You’ll Need:

• Bachelor’s, Master’s, or MTech in Electrical/Electronics Engineering, Computer Science, or a related field with 3+ years of relevant experience.

• Hands-on expertise in DFT technologies such as JTAG, MBIST, Scan, and related test architectures.

• Proficiency in RTL coding using Verilog, System Verilog, and/or VHDL.

• Advanced scripting skills in Perl, Tcl/Tk, Python, or similar languages for automation and tool integration.

• Familiarity with change management tools (e.g., Perforce) for collaborative development and version control.

• Solid understanding of ASIC design flow, including design planning, synthesis, physical design, and sign-off verification tools.

Who You Are:

• Analytical thinker with exceptional problem-solving skills and a passion for troubleshooting complex technical challenges.

• Effective communicator who excels in cross-functional team environments and can articulate technical concepts to varied audiences.

• Collaborative team player who values diverse perspectives and actively contributes to group success.

• Proactive and adaptable, with a strong desire to learn and innovate in a fast-paced, evolving technological landscape.

• Detail-oriented and organized, able to manage multiple priorities and deliver high-quality results on schedule.

The Team You’ll Be A Part Of:

You’ll join the Synopsys Test Group, a dynamic team focused on developing cutting-edge Design for Test (DFT) solutions. The team is composed of passionate engineers and innovators who collaborate across product engineering and R&D to create industry-leading methodologies and tools. Together, you will address challenges in diverse domains such as autonomous systems, AI, high-performance computing, and mobile networking, driving the next wave of silicon innovation.

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You will focus on the tactical execution and smooth delivery of campaigns defined by the Lead and the Membership Squad. This includes assisting with the end-to-end process of campaign execution across email, onsite messaging, and push notifications.

To succeed in this role, you will need to have 2+ years of experience in a CRM role, with proven ability to accurately build and deploy email or multi-channel campaigns using a CRM/Marketing Automation platform. You should also be comfortable extracting and organising data, and have a desire to understand what campaign numbers mean and how to improve them.

In addition to your technical skills, you will need to have strong collaboration and communication skills, with the ability to work with team members and support the Membership CRM Lead.

The expected range for this role is £26,500 - £30,000. This is a hybrid role, with three days spent in the office and two days worked from home.

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Key responsibilities include:

• Investigating, tracking, and resolving complex support issues, including testing solutions before deploying to production, understanding program code and error logs, and logging software defects.
• Collaborating with clients and other departments to improve the product for users and supportability, which may include making recommendations and proposals, reviewing requirements, system designs, and enhancement proposals.
• Performing cross-regional and cross-departmental tasks and initiatives as assigned either on an ad-hoc, temporary basis, or as part of a more formal rotation program.

Requirements include four years or more of experience in a support or similar role with Vista Group software or the cinema industry, strong knowledge of technologies such as SQL Server, Visual Basic, .NET, XML, web services, cloud technologies, relational databases, networking, and hardware, and demonstrated experience using and optimizing generative AI tools (large language models).

Benefits include food coupons, all law benefits and better, medical insurance, and a hybrid scheme.

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We are seeking a senior verification leader to drive the strategy, execution, and quality of next-generation PCIe PHY IP verification. As a Principal Engineer, you will define and drive the verification strategy and functional quality for next-generation PCIe PHY IPs.

Key Responsibilities:

• Define and drive the verification strategy and functional quality for next-generation PCIe PHY IPs.
• Develop comprehensive verification plans for complex mixed-signal digital designs with primary emphasis on PCIe PHY functionality and protocol compliance.
• Architect, develop, and execute advanced testbench environments for block-level and subsystem-level verification.
• Verify key PCIe PHY features such as LTSSM behavior, PIPE interface interactions, link initialization and training, power management, equalization flows, error handling, and compliance-related scenarios.
• Work closely with design, analog, firmware, architecture, and validation teams to ensure robust coverage of cross-functional use cases.
• Use advanced verification methodologies, including constrained-random, assertion-based verification, coverage-driven verification, and debug automation, to achieve high-quality results.
• Analyze failures, root-cause complex issues, and drive resolution across design and verification domains.
• Mentor and guide other engineers, promote verification best practices, and help build a culture of technical excellence and continuous improvement.

Impact:

• Elevate the quality and reliability of PCIe PHY IP solutions, ensuring industry-leading performance and compliance.
• Accelerate time-to-market for customers by enabling robust verification coverage and efficient execution.
• Drive innovation in verification methodologies and environments, setting new standards for mixed-signal IP verification.
• Strengthen cross-team collaboration, integrating expertise from design, analog, firmware, and architecture groups.
• Mentor and empower peers, building a highly skilled and motivated verification team.
• Enhance customer satisfaction and trust by delivering high-quality IP products that meet demanding requirements.

Requirements:

• Extensive experience in mixed-signal ASIC/IP verification.
• Strong expertise in PCIe and PCIe PHY verification.
• Solid understanding of high-speed SerDes/PHY architecture and digital control verification in mixed-signal environments.
• Hands-on experience with modern verification methodologies such as SystemVerilog, UVM, assertions, and coverage-driven verification.
• Experience developing verification plans, building reusable verification environments, and closing coverage for complex IP products.
• Strong debugging and problem-solving skills, with the ability to work independently and drive issues to closure.
• Excellent communication and collaboration skills for working across global, cross-functional teams.
• Proven ability to mentor engineers and lead technical verification activities.

Team:

You'll join a world-class group of engineers dedicated to advancing high-speed silicon IP solutions. Our team specializes in PCIe PHY technology, collaborating across design, analog, firmware, architecture, and validation disciplines to deliver IP products that set industry benchmarks for performance, power efficiency, and reliability.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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Project Engineering Manager - 16715 (Canada)

Canada Off-siteSave

Remote Eligible YesHire Type EmployeeJob ID 16715Date posted 04/09/2026

This position is Remote (Canada).

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly experienced engineering professional with a passion for driving innovation and delivering results. You thrive in fast-paced environments where you can leverage your technical expertise and leadership skills to manage complex projects from inception to completion. With over a decade of experience in semiconductor design, you possess deep knowledge of SOC, ASIC, and Silicon IP development. You are adept at communicating with diverse stakeholders, including engineers, managers, and customers, ensuring expectations are managed and projects stay on track. Your strategic mindset enables you to make informed decisions quickly, balancing technical requirements and project timelines.

As a natural leader, you motivate cross-functional teams to achieve ambitious goals, fostering collaboration and celebrating both individual and group successes. Your empathetic approach ensures you understand the needs of your team and stakeholders, creating an inclusive and positive work environment. You are skilled at negotiation and conflict resolution, maintaining harmony even when opinions differ. Your adaptability allows you to ramp up quickly on new tools and processes, and you remain calm and focused under pressure. You value diversity and inclusivity, recognizing the strengths that each team member brings. If you are ready to shape the future of technology and empower global innovation, Synopsys is the place for you.

What You’ll Be Doing:

• Leading cross-functional teams to deliver Silicon IP projects globally, from initial planning through successful completion.

• Representing the product line internally and externally, acting as the primary point of contact for stakeholders and customers.

• Reporting on project status to key customers and collaborating with R&D teams to plan new developments and enhancements.

• Facilitating the definition of project scope, goals, and deliverables, aligning them with business objectives.

• Developing and managing comprehensive project plans, scheduling timelines, and tracking milestones using industry-standard tools.

• Analyzing project performance and ensuring quality assurance, customer satisfaction, and adherence to budgetary constraints.

• Empowering team members, resolving conflicts, and fostering a collaborative environment to achieve project goals.

• Providing regular updates to management and stakeholders, ensuring transparency and alignment throughout the project lifecycle.

The Impact You Will Have:

• Delivering high-value Silicon IP solutions that enable next-generation technologies, such as AI, IoT, and autonomous vehicles.

• Strengthening Synopsys’ reputation as a leader in chip design and semiconductor innovation.

• Driving operational excellence and efficiency across global projects, ensuring timely and successful delivery.

• Enhancing customer satisfaction through proactive communication and quality assurance.

• Influencing the development of new product features and improvements based on customer feedback and market trends.

• Building strong relationships with internal teams and external partners, fostering a culture of collaboration and innovation.

• Mentoring and empowering team members, contributing to their professional growth and the overall success of the organization.

What You’ll Need:

• Degree in Engineering or Applied Science (or equivalent) with 8+ years of relevant experience in semiconductor or related fields.

• Proven experience managing customer expectations and communications.

• Background in Mixed-Signal IP, SOC, ASIC, or semiconductor development environments.

• Strong knowledge of project management principles, tools, and methodologies.

• Experience with quality management system processes and procedures.

• Ability to navigate and utilize tools in a Linux environment.

Who You Are:

• Exceptional communicator, able to connect with individuals at all levels and across functions.

• Inspirational leader, motivating teams to achieve their best and drive positive outcomes.

• Decisive and strategic thinker, quickly assessing situations and guiding teams toward optimal solutions.

• Empathetic and inclusive, understanding and valuing diverse perspectives and needs.

• Calm under pressure, maintaining focus and composure in challenging situations.

• Effective negotiator and conflict resolver, maintaining team harmony.

• Quick to learn new tools and processes, adapting rapidly in a dynamic environment.

The Team You’ll Be A Part Of:

You will join a vibrant, collaborative engineering team focused on delivering innovative Silicon IP solutions for global customers. Our team thrives on tackling complex challenges, leveraging diverse skills and backgrounds to drive technological advancement. We value open communication, mutual support, and continuous learning, ensuring every member is empowered to contribute and grow. Together, we are shaping the future of smart technology.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As an experienced Analog Layout Senior Engineer, you will be working on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees. You will apply Analog Layout techniques to ensure design meets performance with minimum area and good yield.

Key responsibilities include:

• Working on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees.
• Floor planning, power design, signal routing strategy, EMIR awareness, and parasitic optimization for layout blocks from schematics.
• Applying Analog Layout techniques to ensure design meets performance with minimum area and good yield.
• Building and enhancing layout flow for faster, higher quality design processes.
• Performing layout verification for DRC/LVS/ERC/ANT/ESD/DFM.
• Conducting PERC verification for ESD/LUP checks.
• Completing all design quality checks and data quality checks.
• Collaborating with Place and Route engineers to integrate analog layouts into the top level.
• Working with the Package team to ensure the integration of top die and package.
• Participating in design reviews across the global team.
• Engaging in package design, including interposer and RDL design.
• Collaborating closely with design teams in Vietnam, USA, Canada, and other countries to ensure the success of the whole product.
• Joining research programs to implement new ideas for future products and flows.
• Leading a layout team to complete a full design block.
• Mentoring junior layout engineers or interns.

The impact you will have includes driving the development of high-performance Analog IPs that power cutting-edge technologies, enhancing the layout design process for improved efficiency and quality, ensuring the robustness and reliability of our designs through meticulous verification processes, contributing to the integration of complex layouts into top-level designs, fostering collaboration and knowledge sharing across global teams, and mentoring and developing the next generation of layout engineers.

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Key Responsibilities:

• Leading and managing a team of ASIC digital design engineers, providing day-to-day technical guidance, mentoring, and performance management.
• Owning PCIe digital architecture and RTL design execution, remaining hands-on while leading design efforts at block, subsystem, and IP-integration levels.
• Defining micro-architecture, design specifications, and implementation approaches for high-performance, power-efficient, and scalable PCIe designs.
• Leading end-to-end digital design activities, including architecture definition, RTL development, debug, design convergence, and post-silicon support.
• Serving as the PCIe technical architect for the team, guiding key design decisions and resolving complex technical issues.

Requirements:

• Bachelor's degree in Electrical Engineering (BSEE) with 12+ years of experience, or Master's degree (MSEE) with 10+ years.
• Demonstrated experience as a team lead or people manager in an ASIC digital design environment.
• Extensive hands-on ASIC RTL design experience, with direct ownership of complex digital designs.
• Deep expertise in PCIe digital design and architecture; experience with CXL, DDR, AMBA, UCIe, or related protocols is highly desirable.
• Strong understanding of ASIC design fundamentals including clocking, resets, low-power techniques, and design for test.
• Proven ability to define PCIe micro-architecture and drive designs from concept through silicon.
• Experience with AI-driven tools, flows, and methodologies. Familiarity with scripting languages (Perl, TCL, Python) for design automation is a plus.

Preferred Qualifications:

• A hands-on PCIe architect who enjoys leading by technical example.
• Comfortable balancing design execution with team leadership responsibilities.
• A clear communicator who works effectively across engineering disciplines.
• A collaborative leader who values quality, ownership, and knowledge sharing.

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The ideal candidate will have basic knowledge of health and safety requirements, knowledge of cleaning methods, and high attention to detail. You will also be able to work independently and as part of a team, be proactive, and have excellent written and verbal communication skills in English.

This is an active role that requires you to be physically fit. Training will be provided, and a reliable and flexible approach to work is essential.

We offer a great range of benefits, including 24/7 GP, mental health support, get fit programme, financial and legal support, cycle to work scheme, and access perks at work.

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What You'll Be Doing: Developing and enhancing the PHYINIT configuration software for state-of-the-art DDR PHY products. Collaborating closely with Architecture, Analog, RTL, Verification, and Firmware teams to ensure seamless integration and operation of the PHY. Owning the PHYINIT release process for LPDDR PHY products, including engineering and standard releases. Identifying opportunities for release flow automation and implementing improvements to streamline the release process. Creating and maintaining release notes and technical collateral for customer and internal releases. Troubleshooting and resolving complex issues during product bring-up and customer deployment. Contributing to the continuous improvement of configuration tools and workflows, ensuring high-quality deliverables.

The Impact You Will Have: Enhance the user experience of DDR PHY products used by leading semiconductor companies worldwide. Drive innovation by introducing new features and improvements to critical configuration tools. Streamline release processes, enabling faster and more efficient delivery of customer solutions. Foster cross-team collaboration, ensuring comprehensive coverage of all aspects of PHY design and operation. Support customers in achieving optimal configuration and operation of their DDR PHY solutions. Contribute to Synopsys' reputation as a leader in high-performance silicon and software IP integration.

What You'll Need: Solid programming skills in C/C++ and scripting languages (Python, Perl, Bash). Understanding of digital design concepts, preferably with exposure to ASIC/RTL development. Familiarity with software build flows and release automation tools. Experience with version control systems (e.g., Git) and collaborative development environments. Strong analytical and debugging abilities for troubleshooting software and hardware integration issues.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key responsibilities include:

• Loading and sorting waste using mobile plant machinery
• Working in accordance with SHEQ policies
• Involvement in best practice and continuous improvement
• Close working relationship with South Kirkby Management Team and staff
• Stock control & accurate reporting of contract & non contract waste
• Complying with changes to company standards and legislation
• Providing light maintenance of equipment
• Ensuring the highest level of housekeeping is maintained
• Covering for reception hall operative as required
• Running and maintaining baler hall operations
• Understanding and running the facility process control including Scada systems

Essential criteria include:

• Good understanding of health, safety and environmental compliance
• Good people skills; be able to communicate at all levels throughout the company and externally
• Previous mobile plant experience (E.g. FLT, Telehandler, loading shovel, ro/ro, TUG)
• Good organisational skills
• Full UK car driving license

Preferable criteria include:

• CITB card (wheeled loading shovel, wheeled 360, telehandler)
• Basic plant maintenance
• Logistics operation experience
• Basic knowledge of environmental compliance issues associated with waste disposal
• Knowledge of SCADA systems

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You are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a tangible impact in the world of semiconductor innovation. You thrive in collaborative environments, working alongside diverse teams to solve complex technical challenges. With 1–3 years of experience and a solid academic background in Electronics or Electrical Engineering, you bring a keen understanding of CMOS processes and are adept at navigating deep submicron technologies. Your curiosity drives you to stay current with industry standards, including JEDEC requirements for DDR interfaces, and you are enthusiastic about mastering new methodologies and tools. You value quality and efficiency, consistently delivering robust designs that meet rigorous specifications. Your communication skills enable you to articulate technical concepts clearly and foster productive relationships within cross-functional teams. You are detail-oriented, self-motivated, and embrace opportunities to learn and grow. Whether tackling circuit design tasks or collaborating with system engineers, you demonstrate adaptability, integrity, and a commitment to excellence. Your proactive approach, analytical mindset, and willingness to take initiative make you an invaluable contributor to the team. If you are excited about working on cutting-edge memory interface solutions and contributing to the next generation of high-performance chips, Synopsys is the place for you.

Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability. Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals. Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards. Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies. Contributing to the ASIC design flow, from concept to implementation, including verification and documentation. Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process. Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.

Accelerate the development of high-performance memory interfaces, integral to next-generation computing platforms. Enhance product quality and reliability by applying best practices in analog circuit design and layout. Drive innovation in deep submicron CMOS technologies, enabling advanced chip functionalities. Contribute to Synopsys’ leadership in DDR/HBM IP solutions, helping customers achieve breakthrough results. Foster a culture of collaboration and technical excellence across multidisciplinary teams. Support the delivery of robust, standards-compliant IP that powers industry-leading silicon solutions. Enable seamless integration and performance optimization for customers worldwide.

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At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are:

You are an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology. With 5-8 years of industry experience,primarily in Physical Verification (PV),you thrive on solving complex layout and verification challenges for advanced process nodes. You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus. Your proficiency in scripting languages like Perl, Tcl, and Python enables you to automate and optimize PV runset development, ensuring high-quality deliverables.

What You'll Be Doing:

Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies. Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python. Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions. Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team. Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys' technical edge.

The Impact You Will Have:

Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market. Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps. Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges. Contribute to the development of next-generation verification methodologies and best practices within Synopsys. Strengthen Synopsys' reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.

What You'll Need:

B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field. 8-10 years of hands-on experience in the Physical Verification (PV) domain. Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS. Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development. Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements. Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks. Exposure to competitive EDA tools and awareness of their strengths and limitations.

Who You Are:

An analytical thinker with strong problem-solving abilities and meticulous attention to detail. A collaborative team player who fosters knowledge sharing and mentorship. Effective communicator, capable of translating technical concepts to diverse audiences. Adaptable and proactive, with a passion for continuous learning and innovation. Customer-focused, with a commitment to delivering high-quality solutions on time. Self-driven, organized, and able to manage multiple priorities in a fast-paced environment.

The Team You'll Be A Part Of:

You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You'll work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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You Are: You are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a tangible impact in the world of semiconductor innovation. You thrive in collaborative environments, working alongside diverse teams to solve complex technical challenges. With 2+yrs experience and a solid academic background in Electronics or Electrical Engineering, you bring a keen understanding of CMOS processes and are adept at navigating deep submicron technologies.

What You'll Be Doing: Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability. Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals. Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards. Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies. Contributing to the ASIC design flow, from concept to implementation, including verification and documentation. Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process. Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.

The Impact You Will Have: Accelerate the development of high-performance memory interfaces, integral to next-generation computing platforms. Enhance product quality and reliability by applying best practices in analog circuit design and layout. Drive innovation in deep submicron CMOS technologies, enabling advanced chip functionalities. Contribute to Synopsys' leadership in DDR/HBM IP solutions, helping customers achieve breakthrough results. Foster a culture of collaboration and technical excellence across multidisciplinary teams. Support the delivery of robust, standards-compliant IP that powers industry-leading silicon solutions. Enable seamless integration and performance optimization for customers worldwide.

What You'll Need: B.Tech/M.Tech degree in Electronics or Electrical Engineering. 2+ years of hands-on experience in CMOS circuit design, preferably with exposure to deep submicron process technologies. Proficiency in analog/mixed signal design methodologies and layout flows. Familiarity with JEDEC DDR interface requirements, DDR Timing, ODT, and SDRAM functionality is a strong plus. Basic understanding of ESD concepts and ASIC design flow. Demonstrated ability to execute assigned circuit design tasks with high quality and efficiency. Strong written and verbal communication skills for effective team interactions.

Who You Are: Analytical thinker with strong problem-solving skills. Collaborative and adaptable, thriving in dynamic team settings. Detail-oriented and quality-driven, with a commitment to excellence. Proactive, self-motivated, and eager to learn new technologies. Effective communicator, capable of conveying technical concepts clearly. Resilient and resourceful, able to navigate complex challenges.

The Team You'll Be A Part Of: You will join a highly skilled engineering team specializing in DR I/O circuit design for memory interfaces. The team is focused on developing innovative DDR/HBM solutions, collaborating closely with PHY, package, and system engineers. Together, you will drive advancements in chip performance, reliability, and integration, shaping the future of semiconductor technology.

Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Your core responsibilities will include: Inspecting, repairing, and maintaining trade waste bins to company standards, including replacing lids, wheels, and other parts. Carrying out regular washing and cleaning of various sized wheeled containers. Using power tools and equipment safely and correctly to complete repairs and maintenance tasks. Performing basic welding tasks where required (training can be provided). Maintaining a clean and organised workshop and yard area through good housekeeping practices. Following all health and safety guidelines, working safely in a physically demanding role. Working well independently and as part of a small, hands-on maintenance team. Being flexible, self-motivated, and able to follow both verbal and written instructions accurately.

Our essential requirements include: Previous experience within a workshop environment. Previous experience of working in a production targeted environment. Previous experience of using air tools and power tools in a workshop environment.

Benefits include: Competitive salary. Ongoing career development, training and coaching. Generous pension scheme. Medical and dental scheme. Retail and leisure discounts. Holiday and travel discounts. Bike to work scheme.

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We are seeking an experienced RTL designer to join our team in Ho Chi Minh City. As an RTL Design Sr Staff Engineer, you will be responsible for designing and verifying DDRPHY/LPDDRR/HBM test chips using SystemVerilog/Verilog. You will also collaborate with analog and mixed-signal teams, automate workflows with scripting languages, debug complex hardware issues in lab bring-up and validation, document specifications and processes, and drive improvements in design and DFT/DFM flows.

Delivering reliable, high-speed memory IP for next-gen platforms, supporting rapid customer time-to-market, enhancing testchip team capabilities and innovation, mentoring and sharing expertise with peers, ensuring product quality through robust verification, and promoting a collaborative, learning-focused culture are some of the key responsibilities of this role.

To be successful in this position, you should have 6+ years of experience in RTL design/verification (SystemVerilog/Verilog), experience with high-speed interfaces (DDR/HBM preferred), skill in scripting (Python, Perl, Tcl, Shell), knowledge of ASIC/IP flows and DFT/DFM, and experience debugging complex hardware issues.

As a clear communicator and team player, analytical, proactive, and adaptable, open to learning and mentoring, you will thrive in this role.

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Our team is focused on developing innovative DDR/HBM solutions, collaborating closely with PHY, package, and system engineers. Together, you will drive advancements in chip performance, reliability, and integration, shaping the future of semiconductor technology.

Key Responsibilities:

• Designing DDR/HBM Memory Interface I/O circuits, including GPIO and Special IOs, ensuring optimal performance and reliability.
• Collaborating with DDR/HBM PHY teams, package engineers, and system engineers to meet stringent design specifications and project goals.
• Executing circuit design tasks with a focus on quality, efficiency, and adherence to industry standards.
• Developing and refining analog/mixed signal circuitry, leveraging advanced CMOS technologies and layout methodologies.
• Contributing to the ASIC design flow, from concept to implementation, including verification and documentation.
• Communicating effectively with internal development teams, providing technical insights and feedback throughout the design process.
• Participating in design reviews, troubleshooting, and optimization activities to ensure robust and scalable solutions.

Requirements:

• B.Tech/M.Tech degree in Electronics or Electrical Engineering.
• 2+ years of hands-on experience in CMOS circuit design, preferably with exposure to deep submicron process technologies.
• Proficiency in analog/mixed signal design methodologies and layout flows.
• Familiarity with JEDEC DDR interface requirements, DDR Timing, ODT, and SDRAM functionality is a strong plus.
• Basic understanding of ESD concepts and ASIC design flow.
• Demonstrated ability to execute assigned circuit design tasks with high quality and efficiency.
• Strong written and verbal communication skills for effective team interactions.

Benefits:

• Comprehensive medical and healthcare plans that work for you and your family.
• In addition to company holidays, we have ETO and FTO Programs.
• Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.
• Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.
• Save for your future with our retirement plans that vary by region and country.
• Competitive salaries.

Experience Level: Senior Employment Type: Full-time Workplace Type: Onsite Category: Engineering Industry: Technology Salary Range: Not stated Salary Min: Not stated Salary Max: Not stated Salary Currency: USD Salary Period: Year Required Skills: CMOS circuit design, analog/mixed signal design methodologies, layout flows, JEDEC DDR interface requirements, DDR Timing, ODT, SDRAM functionality, ESD concepts, ASIC design flow Preferred Skills: Not stated

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You are a passionate engineer with a strong foundation in analog and mixed-signal circuit design, eager to make a meaningful impact through your expertise. With a BTech or MTech and substantial hands-on experience (BTech+5 years / MTech+3 years), you have mastered the nuances of CMOS processes and deep submicron technologies. You enjoy solving complex challenges in DDR I/O circuit design and thrive in collaborative environments where your technical insights drive innovation.

Designing and developing DDR I/O circuits, ensuring robust performance and compliance with industry standards. Collaborating with cross-functional teams on analog and mixed-signal circuit architecture and implementation. Performing circuit simulations, layout reviews, and post-layout analysis to optimize designs for performance and reliability. Integrating ESD protection and addressing deep submicron process challenges in circuit development. Contributing to ASIC design flows and participating in design reviews to ensure quality and manufacturability. Documenting design methodologies, results, and communicating effectively with internal development teams. Interfacing with verification and validation teams to support the testing and debugging of DDR I/O circuits.

Deliver innovative DDR I/O circuit designs that enable high-speed, reliable data transfer in advanced silicon products. Enhance product quality and efficiency through rigorous design practices and attention to detail. Drive the adoption of best practices in CMOS and mixed-signal design across teams. Support Synopsys' leadership in chip design by contributing to differentiated IP solutions. Facilitate faster time-to-market for cutting-edge semiconductor products by ensuring robust design and integration. Mentor and collaborate with junior engineers, fostering a culture of excellence and continuous improvement. Strengthen Synopsys' reputation for technical innovation and reliability in the semiconductor industry.

BTech+5 years or MTech+3 years in Electrical/Electronics Engineering or related discipline. Expertise in CMOS circuit design and layout methodology, with experience in deep submicron process technologies. Understanding of analog/mixed signal circuitry and basic ESD concepts. Familiarity with ASIC design flow and JEDEC DDR interface standards, including DDR Timing, ODT, and SDRAM functionality. Strong skills in executing assigned circuit design tasks efficiently and to the highest quality standards. Proficiency in circuit simulation tools and layout review processes.

Detail-oriented, methodical, and committed to delivering high-quality results. Collaborative and effective in cross-team communication. Adaptable and able to manage multiple priorities in a fast-paced environment. Curious and eager to learn about new technologies and industry trends. Proactive problem-solver with strong analytical skills. Clear communicator, both verbally and in writing.

You will join a dynamic team of analog and mixed-signal engineers focused on developing industry-leading DDR I/O solutions. The team fosters an inclusive culture, values diverse perspectives, and collaborates closely with digital, verification, and layout experts to deliver world-class products. Together, you'll push the boundaries of semiconductor innovation, leveraging collective expertise to solve complex challenges and achieve technical excellence.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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Key Responsibilities:

• Readily interact with all visitors/tenants within the shopping centre, delivering first class customer focused service
• Carry out regular patrols of the shopping centre as detailed in the site assignment Instructions, being always proactive
• Continuously look for opportunities to be of assistance to visitors at the shopping centre, proactively helping wherever opportunities arise
• Safeguard all the sites are safe and non-threatening environment for all visitors/tenants.
• Ensuring all incidents are managed in accordance with site policies and procedure
• Liaising with site control room proactively reacting to incidents and ensuring colleagues are fully briefed and always supported
• Ensure any unsecure areas of the site are reported to Control Room immediately and action taken to resolve
• Record/log all non-conformances and emergencies with the appropriate control room operatives
• Deal efficiently and effectively with all emergencies ensuring the Centre team are kept fully always informed
• Intelligent understanding of human behaviour, monitoring and surveillance of suspect individuals, logging, and reporting incidents in line with site/company polices
• Maintain vigilance and highlight/manage unauthorised access by banned individuals
• Ensure radio procedures are always adhered to
• Ensure all events/incidents are recorded in the Security Officer notebook correctly and notebook policies are always adhered to
• Undertake any other reasonable duties as required to meet the needs of the business.
• Any other reasonable duties as requested by your line manager
• Ensure a timely response to all security issues and events
• Complete all training requirements as requested by line manager
• Be available to cover at least one additional shift per month if requested to cover absence/annual leave
• Liaise closely with the Environmental Services team delivering one service and highlight opportunities in working as one team
• Any other duties as assigned by your manager to support the team and ensure the smooth operation of the business will be communicated to you

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Key Responsibilities -------------------

• Interact with all visitors/tenants within the shopping Centre, delivering first-class customer-focused service.
• Carry out regular patrols of the shopping Centre as detailed in the site Assignment Instructions.
• Be professional, pleasant, friendly, courteous, and helpful always.
• Ensure exemplary standards in personal grooming, strictly adhering to the site uniform requirements.
• Ensure that the site is a safe and non-threatening environment for all visitors/tenants.
• Liaise with site control room proactively reacting to incidents.
• Help third-party contractors/visitors ensuring all site procedures/policies are adhered to.
• Liaise closely with statutory authorities, dealing with incidents.
• Ensure radio procedures are always adhered to.
• Undertake any other reasonable duties as required to meet the needs of the business.

Required Skills and Experience ----------------------------

• Have knowledge of Assignment Instructions (AI's).
• Excellent written and verbal communication skills.
• Customer/Client focused.
• Must be able to work under pressure.
• Basic computer literacy required.
• SIA Guarding or Door Supervisor license.
• SIA CCTV license.

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In this position, you will be responsible for developing Windows-based desktop applications using .NET technologies, conceptualising, designing, and implementing graphical user interface, organising and preparing software development plans, debugging and fixing problems, performing customer support tasks, conducting design and code reviews, and listening to customer needs and creating a development plan in order to implement new features.

Tasks and responsibilities may vary according to projects. Flexibility to face different challenges is required.

We offer a starting salary that is commensurate with experience and is negotiable. We also provide medical and life insurance as well as a retirement fund contribution.

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The successful candidate will be responsible for supporting the hiring process with pre-employment assessments and delivering a comprehensive 5-day Driver Induction aligned with standards and legislation.

Key responsibilities include:

• Recruitment and Onboarding: Support the hiring process with pre-employment assessments and deliver a comprehensive 5-day Driver Induction aligned with standards and legislation.

• Ongoing Driver Training: Provide regular refresher and additional mode training to enhance driver skills and customer experience.

• Record Management: Maintain accurate driver competence and training records using Express Class.

• Post-Incident Support: Offer reassessment and retraining for drivers following incidents.

• Driving Performance Reviews: Regularly analyse driving data with management to identify and address support needs.

• Behavioural Interventions: Conduct targeted support for drivers requiring improvements in actions or behaviours.

• Vehicle Updates Communication: Stay updated on vehicle technical changes and share relevant information with drivers.

• Continuous Improvement and Development: Enhance training delivery, optimise driver learning, and pursue personal professional development.

In return, you can expect a competitive salary of £42,000, flexible working hours, and opportunities for professional growth and development.

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Your primary focus will be on selling premium oil and customization products to Toyota car users. You will work closely with our lunch partners to develop and implement sales strategies, and provide excellent customer service to build strong relationships with our customers.

In this role, you will have the opportunity to work with a dynamic team and contribute to the growth and success of our company. If you are a motivated and results-driven individual with a passion for the automotive industry, we encourage you to apply.

Responsibilities:

• Expand business with Toyota dealerships in the Kyushu region
• Sell premium oil and customization products to Toyota car users
• Develop and implement sales strategies with our lunch partners
• Provide excellent customer service to build strong relationships with customers

Requirements:

• 2 years or more of experience in oil sales
• Strong planning and execution skills
• Proficiency in Excel and PowerPoint
• Basic business skills
• Knowledge of oil products

Preferred Qualifications:

• Experience in sales at an automobile dealership

Working Hours:

• Monday to Friday, 9:00 AM to 6:00 PM (with occasional weekend work for events)

Salary:

• Estimated annual salary: ¥400-700 million

Entry:

Apply through the link provided

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Your theoretical knowledge and hands-on expertise in imaging will be applied to all Video components of the camera system resulting in optimized and balanced performance.

Key qualifications include a basic understanding of good camera image quality, knowledge of camera imaging systems, experience in using IQ measurement tools, and experience in testing both objective and subjective image quality.

A Bachelor's degree in Computer Science, Electrical Engineering, or equivalent with 5+ years of relevant working experience in the camera Image Quality field is required. Alternatively, qualified candidates with less experience will be considered as Imaging QA Engineer.

Color Science, Image Science, Camera Image Signal Processing knowledge is a plus, as is C/C++/Python software programming, Linux and Android OS environment experience.

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You'll be the primary editor in a small social team, crafting native, thumb-stopping video for TikTok, Instagram Reels, YouTube Shorts, X/Twitter, Facebook, Twitch highlights, and more. You combine elite editing craft with a marketer's mindset: you care about retention graphs, watch time, and shares just as much as transitions and color grading.

Alongside the Content, Insights & Planning Manager, you'll be a key navigator for the Social Media Director, Community Manager, and Esports & Influencer Managers,helping them see what formats, hooks, and stories are truly working and what we should scale globally. You treat attention as something you “day trade” every week: constantly cutting, testing, and iterating in response to what audiences are actually responding to.

High-volume, high-quality editing

• Edit a high volume of platform-native videos with speed and precision,multiple pieces per day/week,while maintaining a consistently high bar for quality and brand voice.
• Produce videos optimized for mobile-first, sound-on and sound-off viewing (9:16, 4:5, 1:1, etc.) with strong hooks in the first seconds, tight pacing, and clear storytelling.
• Rapidly turn live streams, gameplay, product reveals, sponsor moments, and creator collaborations into short-form highlights and longer-form cutdowns when needed.

Creative testing & data-informed iteration

• Partner closely with the Content, Insights & Planning Manager to test hooks, intros, formats, captions, and thumbnails; use performance data to decide which edits to scale, tweak, or kill.
• Treat analytics as creative feedback: you're excited to change your edit style based on watch-time drop-offs, replay rates, or comment sentiment.
• Help the team build a culture of constant, low-friction experimentation rather than chasing one “perfect” hero asset.

Trend and culture-native storytelling

• Stay deeply plugged into gaming culture, memes, slang, platform-native humor, and niche sub-communities (competitive players, casual gamers, streamers, etc.) and reflect that fluently in your edits.
• Ensure we show up authentically on each platform and for each region,respecting local nuances while protecting the core SteelSeries brand voice.

Systems, templates & speed for the whole team

• Curate and maintain a library of editable project files, templates, lower-thirds, color presets, motion graphics, SFX, and music beds that make it easier and faster for you and others to execute.
• Build repeatable systems and checklists that shorten production cycles and allow the team to scale content output without losing consistency.
• Collaborate with the broader social, creative, and influencer teams to define best practices for shooting, framing, and delivering footage so downstream edits are faster and cleaner.

Quality, compliance & organization

• Implement platform best practices for captions, on-screen text, motion graphics, and sound design to maximize view-through and engagement.
• Ensure all edits meet accessibility, copyright, and brand safety standards (e.g., captioning, subtitles, music licensing).
• Maintain clean project structure, version control, and documentation so other editors can easily pick up your work.

Experience & craft

• Extensive experience editing social-first content for TikTok, Instagram Reels, YouTube Shorts, X/Twitter, Facebook, and similar platforms, with a portfolio that proves it.
• Deep proficiency in Adobe Premiere Pro (or equivalent) and strong skills in After Effects/motion graphics, basic color correction, and audio mixing.
• Demonstrated ability to work fast at scale,delivering multiple strong edits per week without losing narrative clarity or brand consistency.
• Experience with captioning, subtitles, sound design, and accessibility best practices across platforms.

Mindset & behaviors

• You see yourself as a marketer-editor: you care about the numbers and the storytelling equally.
• A passion for making: your instinct is to open the timeline and start cutting, not to over-theorize. You ship, learn, and ship again.
• Data doesn’t offend you,it excites you. If a format you love underperforms, you’re the first to propose a new hook or structure and test it.
• You speak the language of gaming communities while keeping us on-brand; you know when a meme will land and when it will backfire.
• You’re comfortable giving and receiving feedback quickly and directly, and you actively help the rest of the team improve their video instincts.

Bonus points

• Experience with 3D text/graphics, motion templates, or web-native templates that speed up re-edits.
• Familiarity with clipping workflows from livestreams, VO/ADR coordination, or sponsor integration.
• Evidence that your edits have moved the numbers (e.g., projects where your approach increased CTR, watch time, or shares).

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Maxis is seeking a Production Lead to join our dynamic European team. This is a unique opportunity to lead the creation of innovative new content for The Sims, working alongside some of the industry’s most talented professionals. As Production Lead you are the guardian of the player promise. You’ll oversee the development of DLC and collaborate closely with internal partners to successfully bring these experiences to players worldwide. You’ll also serve as the people manager for the Production craft, championing and representing your team within studio leadership. You will be reporting to the studio Senior Development Director.

Responsibilities:

• Ownership of DLC or business initiative.
• Lead pre-production efforts to ensure success and help define the initial vision for new projects.
• Manage external relationships for your project, collaborating with marketing, brand, legal, and campaign teams.
• Be accountable for your project’s key performance indicators (KPIs).
• Clearly articulate and communicate your area’s vision and strategy, ensuring alignment within the broader studio and project context.
• Play a key role in staffing and budget planning for your team and project.
• Spot new business opportunities, champion them to leadership, and drive their successful execution.
• Lead the scoping and prioritization process for your project, considering wider impacts on other teams and projects.
• Deliver compelling presentations to senior leaders and your own teams, championing the business vision and design. You will own and lead Gate (or equivalent) review processes, serving as the front-line vision holder.
• You will be the people manager for our Producer team.
• You will be part of the studio leadership planning and preparing for the future of the team
• In your daily work you will be balancing the short and long term objectives.
• Collaborating with partners and Stakeholders in North America.

Qualifications:

• You are an effective communicator, proactive, and enjoy collaborating with teams to make great games.
• You are able to jump into scenario planning or strategy planning with ease. Comfortable dealing with uncertainty.
• You are able to operate independently; escalating problems you cannot solve on your own, with proposed solutions.
• You understand how to interpret staffing, budget planning and financial data.
• You have Producer or Product Owner experience on several published games for PC, console, or mobile.
• You have direct experience as a people manager and have mentored more junior team members.
• Comfortable working in a matric organization.
• Knowledge of The Sims is a bonus!

XML job scraping automation by YubHub

This is a hybrid quality reviewing and tooling role: you'll spend the majority of your time reviewing and auditing code annotations against rubrics to ensure data used for training and evaluating AI models meets a high bar, and the remainder building, maintaining, and troubleshooting the internal tooling that annotators rely on day-to-day.

You'll collaborate closely with the annotators, technical program manager, and engineer stakeholders, and contribute to refining the guidelines and processes that shape how our data is produced.

Key Responsibilities

• Generate and validate high-quality data annotations, based on guidelines and continuous feedback, for the development and evaluation of AI models
• Surface systemic issues, edge cases, and gaps in guidelines back to annotation operations and technical stakeholders
• Produce annotations yourself when needed, modeling the quality bar expected of the team
• Build and maintain internal tools and automation that streamline annotator workflows such as visualization dashboards, batch configuration scripts, output management utilities, and similar
• Troubleshoot environment, tooling, and CLI/git issues for annotators on their local machines, liaising with IT and engineering as needed

About You

• A degree in computer science, engineering, or a related field. Alternatively, 2 to 5 years of professional experience in software engineering, technical support, or developing tools
• Hands-on experience using code agents (e.g. Mistral’s vibe) in your own development workflow, and genuine interest in how they're evolving
• Proficient in at least one programming language (e.g. Python, JavaScript, or similar), with enough breadth to read and reason about code across a few core languages
• Able to apply consistent judgment against a rubric and surface edge cases, ambiguities, or gaps in guidelines
• Sustained focus and accuracy on detail-oriented, high-volume review work
• Comfortable working in a Unix-like terminal: shell basics, package managers, environment setup, and git workflows (branches, merges, resolving conflicts)
• Able to troubleshoot local development environment issues (dependencies, virtual environments, paths, permissions) across common operating systems
• Professional proficiency in English, with strong writing and comprehension skills

Nice to Have

• Prior experience in data annotation for AI/ML, especially LLM training (SFT, RLHF, preference data), evals/benchmarks, or agentic data
• Experience building an annotation team through interviews and training
• Experience supporting technical users or troubleshooting developer environments (internal tools support, DevRel, teaching assistant for coding courses, etc.)
• Fluency across multiple programming languages, or domain depth in one of: frontend, backend, DevOps, MLOps, data engineering
• Familiarity with rubric-based evaluation concepts, inter-annotator agreement, or quality measurement for human-labeled data
• Experience developing, deploying, and managing internal tooling or automation scripts

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Responsibilities

• Work directly with enterprise customers,via tickets, Slack, and sometimes calls,to diagnose and resolve their most complex technical and product questions, acting as the “last line of defense” before Product and Engineering step in.

• Leverage Perplexity’s own AI tooling and workflow automations to democratize world-class support at scale, continuously identifying opportunities to replace repetitive tasks with agentic, self-service solutions that feel personalized.

• Build durable relationships with Enterprise users, advising on best practices, capturing structured feedback, and championing customer needs in roadmap discussions.

• Own end-to-end troubleshooting: reproduce issues, isolate root causes, collaborate with engineers, and communicate clear, low-jargon explanations.

• Design and maintain detailed use-case flows, playbooks, and internal runbooks that empower teammates and customers to solve recurring challenges faster.

• Create and update external documentation (FAQs, help center, guides, tutorials) and internal knowledge bases to ensure information is discoverable and up-to-date.

• Track and report support KPIs (response time, CSAT, resolution rates) and propose data-driven process improvements.

• Participate in an on-call rotation,including some holidays or weekends,to guarantee timely global coverage.

Requirements

• Minimum 3+ years in B2B enterprise customer support with exposure to U.S. and E.U. markets, or similar fast-paced tech environments.

• Hands-on experience prompting large-language models, plus a solid grasp of AI fundamentals (tokens, context windows, embeddings, latency vs. cost trade-offs, etc.).

• Ability to translate complex technical concepts,APIs, SSO/SAML, cloud integrations,into clear, actionable guidance for non-technical stakeholders.

• Demonstrated strength in critical thinking, rapid context-switching, and ruthless prioritization when juggling multiple escalations.

• Proficiency with modern support platforms (Intercom, Zendesk, Jira) and basic data-analysis tools (e.g., SQL, Looker, Snowflake).

• Exceptional written and spoken English; business-level fluency in at least one additional language such as Spanish, French, or German is strongly preferred.

• Passion for continuous learning, high ownership, and a “do-what-it-takes” mindset in ambiguous situations.

Bonus Points

• Prior experience supporting AI, search, or knowledge-management products.

• Familiarity with payment platforms (Stripe), enterprise identity (SSO/OAuth), and API integrations.

• Knowledge of enterprise cloud-storage ecosystems (Google Drive, SharePoint, Dropbox) and data-governance best practices.

Why Perplexity?

• Impact at Scale – Your work directly influences hundreds of enterprise clients and millions of end-users at an unprecedented scale to encourage personalized support

• Velocity & Ownership – Ship improvements quickly in a culture that values curiosity, speed, and quality

• Cutting-Edge Tech – Operate at the forefront of applied LLMs and help invent how AI can redefine customer support itself.

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Your responsibilities will include:

• Owning the infrastructure underpinning our Data and Automations teams - setting up internal services, building and maintaining ETLs, and connecting systems with one another.
• Taking end-to-end ownership of platform reliability and security, with a particular focus on improving security across our internal systems.
• Collaborating closely with the Infrastructure team to bridge platform needs with infra capabilities.
• Partnering with Growth, Finance and other internal teams to ensure they have the data and tooling they need.

You will be working with a range of technologies including cloud infrastructure, container orchestration, deployment systems, and security fundamentals. We are looking for someone with strong background in infrastructure engineering, software engineering fundamentals, and experience with cloud infrastructure, container orchestration, deployment systems, and security fundamentals.

In return, you will have the opportunity to work with a talented team of engineers and researchers, and contribute to the development of cutting-edge AI technology. You will also have access to a range of benefits, including a competitive salary, flexible working hours, and opportunities for professional development.

If you are interested in this opportunity, please submit your application, including your resume and a cover letter explaining why you are a good fit for this role. We look forward to hearing from you!

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This includes onboarding support, API and library education, troubleshooting, index configuration, communication, and process improvement.

Key responsibilities include collaborating with customers to understand their technical integration needs, assisting them through the integration process, providing expert guidance on integrating with Constructor's APIs and utilizing open source libraries, helping resolve technical challenges and integration issues alongside Customer Success teams, working with customers to ensure their product catalogs are properly configured, and acting as a liaison between customers and other technical resources.

We're looking for someone with proven experience in customer support or technical support roles, knowledge of REST-based web services, APIs, and integration best practices, excellent communication and interpersonal skills, a detail-oriented mentality with a commitment to delivering exceptional customer support, strong problem-solving skills, and a proactive approach to issue resolution.

Preferred qualifications include familiarity with structured data formats (JSON, CSV) and basic search/index concepts, familiarity with debugging tools such as browser developer tools, API clients (e.g., Postman), or logs, familiarity with A/B testing, understanding of server side and client side contexts, network request routing / HTTP, and familiarity working with open source libraries, JavaScript web application development, and integration patterns.

Benefits include working with smart and empathetic people who will help you grow and make a meaningful impact, regular team offsite events to connect and collaborate, fully remote team - choose where you live, unlimited vacation time - we strongly encourage all of our employees take at least 3 weeks per year, work from home stipend, Apple laptops provided for new employees, training and development budget for every employee, refreshed each year, maternity & paternity leave for qualified employees, and a base salary range between $80k and $110k USD.

XML job scraping automation by YubHub

This includes onboarding support, API and library education, troubleshooting, index configuration, communication, and process improvement.

You will be working with customers to understand their technical integration needs and assist them through the integration process.

You will provide expert guidance on integrating with Constructor's APIs and utilizing open-source libraries.

You will help resolve technical challenges and integration issues alongside Customer Success teams.

You will work with customers to ensure their product catalogs are properly configured, including uploading catalog data, configuring facets, searchabilities, sort orders, and retrieving results.

You will act as a liaison between customers and other technical resources, responding promptly to inquiries with clear explanations.

You will document customer interactions, common issues, and solutions, improving integration documentation and customer onboarding.

Requirements:

• Proven experience in customer support or technical support roles.

• Knowledge of REST-based web services, APIs, and integration best practices.

• Excellent communication and interpersonal skills, with the ability to explain technical concepts to non-technical audiences.

• Detail-oriented mentality with a commitment to delivering exceptional customer support.

• Strong problem-solving skills and a proactive approach to issue resolution.

Preferred qualifications:

• Familiarity with structured data formats (JSON, CSV) and basic search/index concepts.

• Familiarity with debugging tools such as browser developer tools, API clients (e.g., Postman), or logs.

• Familiarity with A/B testing, understanding of server-side and client-side contexts, network request routing / HTTP.

• Familiarity working with open-source libraries, JavaScript web application development, and integration patterns.

Benefits:

• Work with smart and empathetic people who will help you grow and make a meaningful impact.

• Regular team offsite events to connect and collaborate.

• Fully remote team - choose where you live.

• Unlimited vacation time - we strongly encourage all of our employees take at least 3 weeks per year.

• Work from home stipend!

• Apple laptops provided for new employees.

• Training and development budget for every employee, refreshed each year.

• Base salary: $80k–$110k USD, depending on knowledge, skills, experience, and interview results.

• Stock options - offered in addition to the base salary.

XML job scraping automation by YubHub

We're looking for an Associate Producer to join our team at GameSim. As a core coordinator for our production team, you'll be responsible for maintaining the organizational framework of our projects, facilitating cross-disciplinary communication, and ensuring that our project management tools accurately reflect real-time progress.

Responsibilities:

• Project Tracking: Manage the scheduling, assignment, and tracking of art assets through the development pipeline to ensure on-time delivery to clients.

• Operational Maintenance: Update and audit task management software (e.g., Jira, Shotgrid) to maintain data integrity and project transparency.

• Meeting Facilitation: Schedule and attend internal and client-facing meetings; distribute clear, actionable notes and follow-up on outstanding items.

• Milestone Support: Collaborate with project leadership to execute against milestones and assist in scoping and scheduling discussions.

• Process Improvement: Identify workflow inefficiencies and assist in implementing solutions to improve team productivity.

• Documentation: Create and maintain comprehensive studio documentation, internal wikis, and project presentations.

• Client Coordination: Act as a secondary point of contact for external clients under the oversight of senior production staff.

Requirements:

• Professional Experience: 1-3+ years of experience in a production or project coordination role within the Games, Tech, or Creative Media industries.

• Methodologies: Foundational knowledge of Agile, Scrum, and Waterfall project management frameworks.

• Technical Proficiency: Demonstrated experience with task management software (Jira, Trello, Shotgrid, or equivalent) and standard office suites (Microsoft/Google).

• Communication: Strong written and verbal communication skills with a high degree of professional discretion and attention to detail.

• Problem Solving: Ability to remain organized and productive in a fast-paced, multi-client environment.

Nice to Haves:

• Basic Art Pipeline Knowledge: Experience working with or along teams creating 3D models, rigs, and animations.

• Software: Experience with Adobe Creative Suite (Photoshop, Illustrator, or Premiere Pro).

• Game Development: Basic familiarity with Unreal Engine or Unity.

• Global Logistics: Experience working across multiple time zones and diverse cultural environments.

• Automation: Foundational understanding of task automation and cross-platform documentation tools.

Benefits:

• Opportunity to work on different projects

• 3 weeks of paid leave

• Benefits package including medical, dental and vision

• Sick Leave

• Disability Coverage

• Corporate holidays

• Professional Development

GameSim is an equal opportunity employer. We welcome applicants of all backgrounds and identities and evaluate candidates based on skills, experience, and alignment with the role.

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Responsibilities:

• Strategic Sourcing & Negotiation:
• Conduct appropriate sourcing activities that deliver a quality part at the best material cost to Ford Motor Company within the program timing requirements.
• Understand upcoming program sourcing and key milestones in support of launch.
• Align with the Category Manager on the supplier bid list, considering industry trends, technologies, and strategic supplier analysis.
• Develop supplier strategies based on Category Manager input, allowing team to source programs at target, on time while managing cost, quality and risk.
• Possess effective presentation skills to executive leadership to demonstrate the “why” behind a particular sourcing decision.
• Provide feedback to valued supply partners on cost position relative to market and build effective long-term, productive relationships.
• Support Quality initiatives by holding suppliers accountable and sourcing Q1 sites or achieving Q1 sites where targeted/aligned.
• Business Plan Development:
• Develop and successfully execute negotiations strategies to deliver material efficiencies (TVM) and minimize inflationary costs, which requires developing deeper understanding of cost drivers and levers.
• Develop material cost roadmaps that deliver corporate objectives and ensure long-term viability.
• Work with the strategic Category Manager, the Global Commodity Team, and Product Development to understand the latest supply base footprint, financial health ratings, technologies, and trends.
• Work directly with Supply Chain and the Finance organization to develop a holistic year-over-year commodity cost position.
• Understand and set cost savings goals to achieve on an annual basis by identifying pure commercial leverage versus design efficiencies and end-to-end supply chain improvements.
• Possess effective presentation skills to executive leadership to demonstrate the “Why” behind a particular commercial settlement and outlook.
• Lead supplier Quarterly Business Reviews and/or Supplier Quality/Cost/Delivery meetings.
• Supply Continuity and Support:
• Provide support to the Critical Supply Team and Supplier Technical Assistance where part quality and shortages become prevalent.
• Work with engineering to identify alternative technologies or sources of supply to maintain a consistent flow of product into Ford production facilities.
• Other Responsibilities:
• Ad hoc travel as required to supply partners.
• Be a leader - look at all existing processes and challenge if improvements can be made, regardless of scale.
• Accountable to work closely with others to meet deadlines with excellence; drive others to deliver required materials on time and with quality.
• Attend internal and external workshops with key stakeholders for continued process improvements.
• Hold effective working-level meetings with Supply partners for fast issue closure and relationship development.

Qualifications:

• Bachelor's Degree
• 3+ years of experience in procurement, preferably within the Automotive industry
• 3+ years of manufactured commodities and manufacturing processes experience
• Even better, you may have:
• Master’s Degree
• 5+ years of experience in procurement, preferably within the Automotive industry
• Proficiency in Microsoft Office Suite and basic procurement software
• Experience with Stampings and Structural Assemblies
• Strong business and commercial acumen and excellent written and verbal abilities.
• Ability to build solid relationships with teammates, suppliers, and cross-functional team members by fostering teamwork and collaboration in a virtual and face-to-face environment.
• Proficient with juggling multiple responsibilities simultaneously, staying focused on deadlines, handling complex projects efficiently, and solving open issues in a timely manner.
• Strong analytical skills (sourcing evaluations, business case studies).
• Strong negotiation skills (creating leverage in both offensive and defensive situations).
• Cost analytics (understand commodity cost drivers, part cost breakdowns, gap to optimal cost).
• Strategic mindset and the ability to understand current challenges facing the automotive industry.
• Possess creativity, energy and pursuit of learning and development to drive commodity expertise.
• Persuasive and convincing communication skills (e.g., proposals, reports, plans) to secure commitment from business leaders.
• Ability to interpret organizational needs and commercial strategies as input into global Category Strategies.
• Strong working knowledge of Purchasing policies, procedures, and systems.

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Your main duties will include managing customer requests across various channels and platforms, investigating and understanding the root causes of customer inquiries, documenting all customer interactions to track activities effectively, and inputting data into Ford systems as required.

To succeed in this role, you will need to have a strong understanding of consumer protection legislation, good knowledge of automotive warranty systems and rules, and excellent communication skills across various channels, encompassing both verbal and non-verbal communication.

In return, you will be part of a fully supportive, collaborative, and dynamic team, working in an environmentally friendly and well-equipped office in the XIII. district of Budapest. You will also have access to a cafeteria, benefits package, annual bonus, and the opportunity to use your discount for new and used car purchase.

If you are a native speaker or very advanced of Czech and proficient in English (written and spoken), and have a Bachelor's Degree or equivalent work experience, we encourage you to apply for this exciting opportunity.

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In this role, you will test Ford's latest powertrain control strategies in-vehicle and/or in a Hardware-In-the-Loop (HIL) environment. This is an exciting and challenging environment as Ford Motor Company continues to grow the amount of development and validation using analytical methods.

Responsibilities:

• Perform Software Validation testing, analysis, and reporting for production software on either HIL or in vehicle
• Report issues using automated reporting systems such as JIRA
• Store and retain documents and test records according to established Ford guidelines
• Implement new or updated design verification methods (DVMs) into the validation process
• Develop automated validation methods using Python and MATLAB
• Maintain test scripts in the version control system

Qualifications:

• Bachelor's Degree
• 3+ years' experience in automotive embedded systems software
• Solid understanding of CAN networks and OBD systems and demonstrated ability to utilize CAN and diagnostics tools (CANalyzer, PTDiag, etc.)
• Understanding of calibration methodologies and demonstrated ability to utilize calibration tools (ATI Vision and ETAS INCA)
• Understanding of Module Hardware/Software Architectures (PCM, HCM, TCM, BCM, Satellite processors – ABS, SJB…)
• Must have a valid driver's license

Even better, you may have:

• Master's Degree in Electrical Engineering, Computer Science or related field
• Valid Ford Tier II certification or ability to attain it
• Must be capable of performing normal driving procedures on public roads in various conditions and in all Ford produced vehicles
• Solid understanding of vehicle structure, subsystems, and components (GAS, HEV and BEV)
• Familiar with module emulators and interfaces (M5, M6, A7, A8, etk, xetk)
• Understanding of testing methodologies and ability to utilize test equipment (multi meter, scope, logic analyzer, etc.)
• Debug of complex vehicle systems (both software and hardware)
• Good understanding of bench testing environments and capabilities
• Understanding of the software build and release process
• Experience with Python, Visual Basic, C/C++, JIRA, CFX, ECUTest
• Technical writing and data presentation skills helpful

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Responsibilities: Conduct initial EDS impact packaging studies for new program content or implementation of new electrical architectures. Generate cost estimates (EDS Provisions) based on new program changes and ensure precise cost targets are established by the program. (Piece Price, ED&T & Tooling) Ensure optimal implementation of EDS content in new programs by minimising wire length, EDS components, and wiring complexity. Comply with program cost, weight, quality, performance, and timing targets. Initiate Robustness Engineering Disciplines (Quality history, P-Diagram, FMEA Plan, etc.). Knowledge and application of six sigma and 8D Leads EDS TDR Design Reviews Audit and update FEDEBOM with correct part levels and usage, for Pre-TSC audits. Resolution of EDS issues in early design stages. Analyse and breakdown early PDL and Trim Spiders. Generate proposals to minimise giveaway cost and reduce total part count. Generate proposals to minimise use of EDS brackets and jumpers. Identify opportunities to optimise topology and wire length. Perform initial Harness Complexity Analysis. Perform engineering cost estimates. Perform quality analysis of surrogate program to avoid issue recurrence. Comply with GPDS deliverables (applicable to EDS) for each milestone. Initiate and complete EDS sourcing for LV wiring.

Qualifications: Engineering Degree (electrical/electronic desirable) or related disciplines. Strong English Proficiency (written, read, and oral). Basic 3D CAD Knowledge (TCE, Catia V5) Microsoft Office Usage (Excel, Word, PowerPoint, and Visio). Time and Project Management. Ford GPDS. Understanding of EDS design Understanding of feature partitioning. Understanding of automotive systems.

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This is not a management role, however you'll own delivery end-to-end: embedding with customers to map workflows and success criteria, ensuring components ship on time, and leading readiness and change management for adoption. You’ll track progress, manage dependencies, make sequencing decisions, and drive 0→1 prototypes through MVP and scale. You will also share field insights with Product and Research to guide roadmap and priorities.

Success will be measured first and foremost by impact - deployments that deliver measurable value against customer goals, drive adoption, and become critical to their workflows. Additional measures of success include delivery reliability (milestones hit, low reopen/churn), operating leverage (patterns reused across deployments), judgment under pressure, and product impact (field signal that shifts roadmaps/architectures).

This is a high-trust, high-autonomy role. Success requires deep technical project management expertise, extreme ownership of outcomes, and an ability to immerse in customer workflows and partner with customer teams to solve complex engineering problems at pace.

This role is based in Tokyo. We use a hybrid model of 3 days in office and offer relocation assistance. Travel up to 25-50% is required.

In this role, you will:

• Own the technical delivery plan for multiple interdependent workstreams. Translate business objectives into a roadmap with milestones, dependencies, and acceptance criteria.

• Run day-to-day engineering execution. Track and drive delivery across OpenAI FDE and customer teams. Keep progress unblocked and sequenced. Make real-time trade-offs on scope and priority to protect the critical path.

• Embed with customer teams to land production deployments and drive adoption. Map workflows, shape tools/integrations, and translate requirements into a delivery plan. Lead onboarding, adoption, and change management.

• Partner with Product and Research so platform components and research workstreams land in time to support deployment goals.

• Codify solution patterns and evals. Extract reusable patterns and package field signals to improve product and models.

• Own value cases and ROI. Set impact hypotheses, baselines, and KPIs; run pre-/post-deployment measurement and report to exec sponsors.

You’ll thrive in this role if you:

• Bring 7+ years of customer-facing technical delivery leadership.

• Track record of successfully leading large, complex, high-stakes customer engagements where customer outcomes depended on tight coordination and fast decision making, ideally involving AI.

• Excel in high ambiguity environments. Know how to simplify complex and dynamic work.

• Move fluidly between system level understanding and execution level detail; can dive into customer workflows/data, map constraints, sketch architectures and move ambiguous problems to shipped systems.

• Think strategically and pattern-match. Able to step back from execution detail, recognise broader trends across deployments, and connect customer needs to scalable, reusable solutions.

• Have strong technical fluency and sharp sequencing instincts. Confident discussing technical details, pressure-testing architectures, and making trade-offs.

• Have shipped AI/LLM systems. You understand solution patterns, integration basics, and production pitfalls.

• You’re a translator with executive presence. You make complex technical trade-offs legible to business leaders and convert strategy into day-to-day technical execution.

• Enjoy being onsite with customers to accelerate delivery (often 25-50%, sometimes higher).

• Have expertise in at least one major sector (e.g., healthcare, energy, financial services, semiconductors, IT) to elevate solution framing and credibility.

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Responsibilities:

• Willingness and ability to work on any assigned schedule, change shifts, work more than 8 hours per day and/or work overtime, all while maintaining good attendance.
• Ability and willingness to learn and follow safety rules and procedures, to work in a team environment, treat co-workers with dignity and respect regardless of personal differences, and accept and follow instructions and requests from leadership.
• Ability to perform tasks of the trade, work with limited supervision, stand for extended periods, work at heights, work overhead including on ladders and platforms and manipulate tools typical of the trade.
• Tasks will require a certain amount of reaching, lifting, twisting, bending, and use of a PMHV.
• Ability to perceive differences in details and prints related to trade.
• Must be able to effectively maneuver about vehicles, equipment, assembly lines, or stations, and about facility.

Qualifications:

• Technical knowledge of paints and their properties.
• At least 8 years of previous experience in painting/body repair and blending.
• Knowledge and ability to demonstrate the following skills:

+ Spot repair, water sand, run a D.A machine and a polishing wheel + Dent Repair + Body filler + Spraying Automotive Refinish Paint + Color Matching + Reading of Illustrations + Finish Sanding and Polishing + Basic Feel for Spraying OEM High Bake Paint preferred + Phosphate and water treatment preferred

• Successful completion of a job interview, pre-employment drug screen, physical, and background check are required. Drug panel does not include THC.

Benefits:

• Immediate access to Best-in-Class Company provided healthcare!
• Company provided premium coverage for Hospital-Surgical-Medical plus Drug, Hearing, Dental, and Vision.
• Basic Life Insurance and Accidental Death and Dismemberment Insurance.
• Accident and Sickness and Extended Disability Benefits.
• Automatic enrollment in TESPHE, the hourly employee 401(k) plan, at an initial pre-tax contribution rate of 3%. Also eligible for Company TESPHE contributions of 10% of base pay and $1 per compensated hour.
• Eligible for holiday pay, profit sharing and lump sum bonuses, paid time off, tuition assistance, and immediate vehicle discount purchase plans.

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This is not a management role, however you'll own delivery end-to-end: embedding with customers to map workflows and success criteria, ensuring components ship on time, and leading readiness and change management for adoption. You’ll track progress, manage dependencies, make sequencing decisions, and drive 0→1 prototypes through MVP and scale. You will also share field insights with Product and Research to guide roadmap and priorities.

Success will be measured first and foremost by impact - deployments that deliver measurable value against customer goals, drive adoption, and become critical to their workflows. Additional measures of success include delivery reliability (milestones hit, low reopen/churn), operating leverage (patterns reused across deployments), judgment under pressure, and product impact (field signal that shifts roadmaps/architectures).

This is a high-trust, high-autonomy role. Success requires deep technical project management expertise, extreme ownership of outcomes, and an ability to immerse in customer workflows and partner with customer teams to solve complex engineering problems at pace.

This role is based in London. We use a hybrid model of 3 days in office and offer relocation assistance. Travel up to 50% is required.

Key responsibilities include:

• Own the technical delivery plan for multiple interdependent workstreams. Translate business objectives into a roadmap with milestones, dependencies, and acceptance criteria.

• Run day-to-day engineering execution. Track and drive delivery across OpenAI FDE and customer teams. Keep progress unblocked and sequenced. Make real-time trade-offs on scope and priority to protect the critical path.

• Embed with customer teams to land production deployments and drive adoption. Map workflows, shape tools/integrations, and translate requirements into a delivery plan. Lead onboarding, adoption, and change management.

• Partner with Product and Research so platform components and research workstreams land in time to support deployment goals.

• Codify solution patterns and evals. Extract reusable patterns and package field signals to improve product and models.

• Own value cases and ROI. Set impact hypotheses, baselines, and KPIs; run pre-/post-deployment measurement and report to exec sponsors.

You will thrive in this role if you:

• Bring 7+ years of customer-facing technical delivery leadership.

• Track record of successfully leading large, complex, high-stakes customer engagements where customer outcomes depended on tight coordination and fast decision making, ideally involving AI.

• Excel in high ambiguity environments. Know how to simplify complex and dynamic work.

• Move fluidly between system level understanding and execution level detail; can dive into customer workflows/data, map constraints, sketch architectures and move ambiguous problems to shipped systems.

• Think strategically and pattern-match. Able to step back from execution detail, recognise broader trends across deployments, and connect customer needs to scalable, reusable solutions.

• Have strong technical fluency and sharp sequencing instincts. Confident discussing technical details, pressure-testing architectures, and making trade-offs.

• Have shipped AI/LLM systems. You understand solution patterns, integration basics, and production pitfalls.

• You’re a translator with executive presence. You make complex technical trade-offs legible to business leaders and convert strategy into day-to-day technical execution.

• Enjoy being onsite with customers to accelerate delivery (often 25-50%, sometimes higher).

• Have expertise in at least one major sector (e.g., healthcare, energy, financial services, semiconductors, IT) to elevate solution framing and credibility.

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$380K – $555K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the Team

The Foundations team focuses on how model behavior changes as we scale models, data, and compute. The team studies the interactions between model architecture, optimization, and training data, and uses those insights to guide how new models are designed and trained.

About the Role

In this role, you will build the systems that enable advanced AI models to run efficiently at scale. You will operate at the intersection of model research and systems engineering, translating new architectural ideas into high-performance inference systems that surface real tradeoffs in performance, memory, and scalability.

Your work will directly influence how models are designed, evaluated, and iterated on across the research organization. By developing and evolving high-performance inference infrastructure, you will enable researchers to explore new ideas with a clear understanding of their computational and systems implications.

This is not a product-serving role. Instead, it is a research-enabling systems role focused on performance, correctness, and realism - ensuring that AI research is grounded in what can actually scale.

In this role, you will:

• Design and build high-performance inference runtimes for large-scale AI models, with a focus on efficiency, reliability, and scalability.

• Own and optimize core execution paths, including model execution, memory management, batching, and scheduling.

• Develop and improve distributed inference across multiple GPUs, including parallelism strategies, communication patterns, and runtime coordination.

• Implement and optimize inference-critical operators and kernels informed by real-world workloads.

• Partner closely with research teams to ensure new model architectures are supported accurately and efficiently in inference systems.

• Diagnose and resolve performance bottlenecks through profiling, benchmarking, and low-level debugging.

• Contribute to observability, correctness, and reliability of large-scale AI systems.

You might thrive in this role if you:

• Have experience building production inference systems, not just training or running models.

• Are comfortable with GPU-centric performance engineering, including memory behavior and latency/throughput tradeoffs.

• Have worked on multi-GPU or distributed systems involving batching, scheduling, or runtime coordination.

• Can reason end-to-end about inference pipelines, from request handling through execution and output streaming.

• Are able to understand research ideas and implement them within real system and performance constraints.

• Enjoy solving hard, ambiguous systems problems that only emerge at scale.

• Prefer hands-on technical ownership and execution over abstract design work.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

Benefits

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

Required Skills

• Experience building production inference systems, not just training or running models

• Comfortable with GPU-centric performance engineering, including memory behavior and latency/throughput tradeoffs

• Multi-GPU or distributed systems involving batching, scheduling, or runtime coordination

• Reasoning end-to-end about inference pipelines, from request handling through execution and output streaming

• Understanding research ideas and implementing them within real system and performance constraints

• Solving hard, ambiguous systems problems that only emerge at scale

• Hands-on technical ownership and execution over abstract design work

Preferred Skills

• Experience working with large-scale AI models

• Distributed inference across multiple GPUs

• Parallelism strategies, communication patterns, and runtime coordination

• Implementing and optimizing inference-critical operators and kernels

• Observability, correctness, and reliability of large-scale AI systems

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends

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Responsibilities include:

Providing health services and administering surveillance evaluations to company employees, recording observations, assessments, and treatments in accordance with company policy. Performing routine nursing tasks associated with medical screenings, tests, and clinical procedures. Collecting appropriate samples and specimens from patients, and performing hearing and vision screening following clinical protocols. Monitoring patient vitals, behaviors, and assisting in medical emergencies that may occur on company premises such as accidents, injuries, sudden illnesses, etc. Following established policies and procedures, identifying roadblocks, and effectively communicating issues to the medical team's attention. Providing patient-centered care with empathy, kindness, and professionalism. Communicating health screening results, communicating physical rehabilitation programs information to patients requiring treatment, and assisting with medication administration while managing medication protocols. Maintaining accurate and confidential records, ensuring compliance with regulatory developments and infection control protocols. Supporting emergency procedures preparation and adherence to infection control practices. Maintaining an understanding of all relevant regulatory developments defining patient privacy and medical record confidentiality, infection control protocols to prevent the spread of infectious diseases, accreditation Standards, etc. Working all shifts (days, overnights, and weekends) as needed.

Schedules may vary: 3:00 - 11:30 pm, 12:00 am - 8:30 am, 7:00 pm - 7:00 am, 7:00 am - 7:00 pm Monday through Friday plus weekends as needed.

Must have availability for 8 week days and 2 weekends of every month.

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$198K – $335K • Offers Equity

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

About the team

OpenAI’s Forward Deployed Engineering (FDE) team turns research breakthroughs into production-grade systems. We embed deeply with customers to solve high-leverage problems and act as the delivery engine for our most complex large-scale engagements. We move quickly from prototype to production and surface reusable patterns that shape our platform. We operate at the intersection of deployment and development – working closely with OpenAI Research, Product and Partnerships.

About the Role

As a Technical Deployment Lead (TDL), you will define how OpenAI delivers complex systems to customers. You will own how they are built, shipped, and adopted. You’ll translate business outcomes into a technical plan, run day-to-day execution across FDEs, Researchers, and Customer Engineers, and partner with customer teams to ensure delivery supports their goals.

You will own delivery end-to-end: embedding with customers to map workflows and success criteria, ensuring components ship on time, and leading readiness and change management for adoption. You’ll track progress, manage dependencies, make sequencing decisions, and drive 0→1 prototypes through MVP and scale. You will also share field insights with Product and Research to guide roadmap and priorities.

Success will be measured first and foremost by impact - deployments that deliver measurable value against customer goals, drive adoption, and become critical to their workflows. Additional measures of success include delivery reliability (milestones hit, low reopen/churn), operating leverage (patterns reused across deployments), judgment under pressure, and product impact (field signal that shifts roadmaps/architectures).

This is a high-trust, high-autonomy role. Success requires deep technical project management expertise, extreme ownership of outcomes, and an ability to immerse in customer workflows and partner with customer teams to solve complex engineering problems at pace.

In this role, you will:

• Own the technical delivery plan for multiple interdependent work streams. Translate business objectives into a roadmap with milestones, dependencies, and acceptance criteria.

• Run day-to-day engineering execution. Track and drive delivery across OpenAI FDE and customer teams. Keep progress unblocked and sequenced. Make real-time trade-offs on scope and priority to protect the critical path.

• Embed with customer teams to land production deployments and drive adoption. Map workflows, shape tools/integrations, and translate requirements into a delivery plan. Lead onboarding, adoption, and change management.

• Partner with Product and Research so platform components and research work streams land in time to support deployment goals.

• Codify solution patterns and evals. Extract reusable patterns and package field signals to improve product and models.

• Own value cases and ROI. Set impact hypotheses, baselines, and KPIs; run pre-/post-deployment measurement and report to exec sponsors.

You’ll thrive in this role if you:

• Bring 7+ years of customer‑facing technical delivery leadership.

• Track record of successfully leading large, complex, high-stakes customer engagements where customer outcomes depended on tight coordination and fast decision making, ideally involving AI.

• Excel in high ambiguity environments. Know how to simplify complex and dynamic work.

• Move fluidly between system level understanding and execution level detail; can dive into customer workflows/data, map constraints, sketch architectures and move ambiguous problems to shipped systems.

• Think strategically and pattern-match. Able to step back from execution detail, recognize broader trends across deployments, and connect customer needs to scalable, reusable solutions.

• Have strong technical fluency and sharp sequencing instincts. Confident discussing technical details, pressure-testing architectures, and making trade-offs.

• Have shipped AI/LLM systems. You understand solution patterns, integration basics, and production pitfalls.

• You’re a translator with executive presence. You make complex technical trade-offs legible to business leaders and convert strategy into day-to-day technical execution.

• Have expertise in at least one major sector (e.g., healthcare, energy, financial services, semiconductors, IT) to elevate solution framing and credibility.

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.

For additional information, please see [OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement](https://cdn.openai.com/policies/eeo-policy-statement.pdf).

Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the

XML job scraping automation by YubHub

The base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. If the role is non-exempt, overtime pay will be provided consistent with applicable laws. In addition to the salary range listed above, total compensation also includes generous equity, performance-related bonus(es) for eligible employees, and the following benefits.

• Medical, dental, and vision insurance for you and your family, with employer contributions to Health Savings Accounts

• Pre-tax accounts for Health FSA, Dependent Care FSA, and commuter expenses (parking and transit)

• 401(k) retirement plan with employer match

• Paid parental leave (up to 24 weeks for birth parents and 20 weeks for non-birthing parents), plus paid medical and caregiver leave (up to 8 weeks)

• Paid time off: flexible PTO for exempt employees and up to 15 days annually for non-exempt employees

• 13+ paid company holidays, and multiple paid coordinated company office closures throughout the year for focus and recharge, plus paid sick or safe time (1 hour per 30 hours worked, or more, as required by applicable state or local law)

• Mental health and wellness support

• Employer-paid basic life and disability coverage

• Annual learning and development stipend to fuel your professional growth

• Daily meals in our offices, and meal delivery credits as eligible

• Relocation support for eligible employees

• Additional taxable fringe benefits, such as charitable donation matching and wellness stipends, may also be provided.

More details about our benefits are available to candidates during the hiring process.

About the Team

OpenAI didn't begin as a traditional company. It began as an idea: that artificial intelligence could be developed in a way that benefits everyone. As a creative team, our role is to help make sure the work behind that idea is understood, as it leaves the lab and meets the world.

This company works at the frontier of intelligence. Like any frontier, it's unfinished, constantly shifting, and still being explored. Our job is to stay close to that uncertainty and help shape how this story gets told, in a way that feels grounded and human. We do this through campaigns, launches, films, brand systems, and work that doesn't fit neatly into any of those categories yet. This team is for people who want to help shape something from the beginning.

The Marketing Operations team has an extraordinary opportunity to build at scale without falling into big-tech thinking. We are designing a new way of working and operating in the era of AI to help shape our company, org and team. We pride ourselves on thinking like researchers, we expect change to be constant, we use AI to amplify our impact, and we build systems so teams can move faster.

About the Role

OpenAI's internal Marketing team is looking for a Marketing Operations, Technology & Tools Lead to own and evolve our tools, technology, data flows, and operating model while driving the evolution of our AI-enabled workflows. This role will help our marketers move faster while maintaining industry standard security and privacy requirements to ensure the technology we deploy utilizes OpenAI's tools to their fullest while aligning with the mission.

You'll be the connective tissue between Marketing, Engineering, Security, and Legal/Privacy translating marketing goals into scalable systems, clean measurement, and secure workflows.

In this role, you will:

• Be the go-to expert who designs and oversees our full tech stack and standards across our planning, project management, resource management, production and DAM tools (internal tools and external SaaS tools).

• Ensure our tech stack is built for mid-term/long-term growth from the beginning (tools are connected, taxonomy is consistent, vendor selection is intentional and custom tools are built to last).

• Have an AI-first mindset and have successfully deployed AI based solutions at scale for marketing workflows including production, intake, reporting, resource management, asset management, etc.

• Develops our team standards for tech security and governance (in accordance with OAI requirements, SOX compliance, etc.).

• Key partner to our IT, Privacy and Security XFNs to build trust and allow Marketing to function how it needs to.

• Drive projects independently and in partnership with product experts (security, DAM, Proj Mgmt, Resource Mgmt and AI).

• Ensures our tech has a throughline, is integrated and informed across all tools.

• Own decisions around vendor selection and management.

• Informs and drives custom development in partnership with engineers.

You might thrive in this role if you:

• 7+ years in Marketing Technology / Marketing Operations / Growth Ops in a fast-moving tech environment.

• Hands-on experience owning or administering at least two of: CRM, marketing automation, CDP/audience activation, analytics/tagging, experimentation, data warehouse integrations.

• Strong working knowledge of:

• data concepts (identifiers, events, schemas, segmentation)

• integrations (APIs, webhooks, ETL/reverse ETL)

• measurement fundamentals (UTMs, attribution constraints, experimentation basics)

• Demonstrated ability to lead cross-functional programs and ship durable systems (not just one-off fixes).

• Comfort operating in a highly scrutinized environment: documentation, auditability, change management, and risk mitigation.

Nice to haves

• Experience operating in a public-company or public-company-grade controls environment (SOX-ish rigor, audit trails, vendor risk management).

• Familiarity with cybersecurity risk governance concepts (e.g., NIST CSF 2.0 emphasizes governance as a core function).

• Experience with responsible AI enablement and risk management (e.g., NIST AI RMF's 'govern/map/measure/manage' framing).

• Ability to prototype/build: SQL, lightweight scripting, automation, basic application building, or 'solutions SWE' adjacent work.

• Experience driving adoption through enablement (training, documentation, office hours, templates).

About OpenAI

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.

We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.

For additional information, please see OpenAI's Affirmative Action and Equal Employment Opportunity Policy Statement.

Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a

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Responsibilities include:

Providing health services and administering surveillance evaluations to company employees, recording observations, assessments, and treatments in accordance with company policy. Performing routine nursing tasks associated with medical screenings, tests, and clinical procedures. Collecting appropriate samples and specimens from patients, and performing hearing and vision screening following clinical protocols. Monitoring patient vitals, behaviours, and assisting in medical emergencies that may occur on company premises such as accidents, injuries, sudden illnesses, etc. Following established policies and procedures, identifying roadblocks, and effectively communicating issues to the medical team's attention. Providing patient-centred care with empathy, kindness, and professionalism. Communicating health screening results, communicating physical rehabilitation programs information to patients requiring treatment, and assisting with medication administration while managing medication protocols. Maintaining accurate and confidential records, ensuring compliance with regulatory developments and infection control protocols. Supporting emergency procedures preparation and adherence to infection control practices. Maintaining an understanding of all relevant regulatory developments defining patient privacy and medical record confidentiality, infection control protocols to prevent the spread of infectious diseases, accreditation Standards, etc. Working all shifts as needed, weekends as needed.

Schedules may vary: 4:00 pm - 12:00 am, Monday-Friday.

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