Your responsibilities will include:

• Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.
• Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.
• Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.
• Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges.
• Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions.
• Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team.
• Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys' technical edge.

You will accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. You will ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market. You will drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps. You will enhance customer satisfaction by providing timely and expert solutions to complex verification challenges. You will contribute to the development of next-generation verification methodologies and best practices within Synopsys. You will strengthen Synopsys' reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.

To be successful in this role, you will need:

• B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field.
• 5-8 years of hands-on experience in the Physical Verification (PV) domain.
• Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS.
• Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.
• Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements.
• Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks.
• Exposure to competitive EDA tools and awareness of their strengths and limitations.

You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You will work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

Rewards and benefits include a comprehensive range of health, wellness, and financial benefits to cater to your needs. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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As a Sr Engineer, you will collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. You will automate qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.

Responsibilities:

• Develop and validate DRC, LVS, and Fill runsets for the Synopsys IC Validator tool
• Collaborate with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes
• Automate qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python
• Troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges
• Interface directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions
• Mentor junior team members, share best practices, and contribute to a knowledge-sharing culture within the team

Impact:

• Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses
• Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market
• Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps
• Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges
• Contribute to the development of next-generation verification methodologies and best practices within Synopsys
• Strengthen Synopsys' reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support

Requirements:

• B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field
• 5-8 years of hands-on experience in the Physical Verification (PV) domain
• Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS
• Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development
• Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements
• Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks
• Exposure to competitive EDA tools and awareness of their strengths and limitations

Who You Are:

• An analytical thinker with strong problem-solving abilities and meticulous attention to detail
• A collaborative team player who fosters knowledge sharing and mentorship
• Effective communicator, capable of translating technical concepts to diverse audiences
• Adaptable and proactive, with a passion for continuous learning and innovation
• Customer-focused, with a commitment to delivering high-quality solutions on time
• Self-driven, organized, and able to manage multiple priorities in a fast-paced environment

The Team You’ll Be A Part Of:

You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You’ll work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process

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You are an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology. With 5-8 years of industry experience,primarily in Physical Verification (PV),you thrive on solving complex layout and verification challenges for advanced process nodes. You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus. Your proficiency in scripting languages like Perl, Tcl, and Python enables you to automate and optimize PV runset development, ensuring high-quality deliverables.

You are committed to continuous learning and improvement, keeping pace with evolving foundry processes and design for manufacturability (DFM) requirements. As a natural collaborator and mentor, you enjoy guiding junior team members and fostering a supportive team environment. Your excellent communication skills empower you to engage confidently with customers and field application engineers (FAEs), translating complex requirements into innovative solutions. You are detail-oriented, resourceful, and dedicated to exceeding customer expectations, making you a valuable asset to any high-performing engineering team.

Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies. Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python. Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions. Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team. Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys’ technical edge.

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You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You will work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

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They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.

These engineers play a crucial role in advancing technology and enabling innovations in various industries.

We are seeking an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology.

With 5-8 years of industry experience—primarily in Physical Verification (PV)—you thrive on solving complex layout and verification challenges for advanced process nodes.

You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus.

Your proficiency in scripting languages like Perl, Tcl, and Python enables you to automate and optimize PV runset development, ensuring high-quality deliverables.

You are committed to continuous learning and improvement, keeping pace with evolving foundry processes and design for manufacturability (DFM) requirements.

As a natural collaborator and mentor, you enjoy guiding junior team members and fostering a supportive team environment.

Your excellent communication skills empower you to engage confidently with customers and field application engineers (FAEs), translating complex requirements into innovative solutions.

You are detail-oriented, resourceful, and dedicated to exceeding customer expectations, making you a valuable asset to any high-performing engineering team.

Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.

Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.

Automating qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python.

Troubleshooting and resolving complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges.

Interfacing directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions.

Mentoring junior team members, sharing best practices, and contributing to a knowledge-sharing culture within the team.

Staying up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys’ technical edge.

Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses.

Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market.

Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps.

Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges.

Contribute to the development of next-generation verification methodologies and best practices within Synopsys.

Strengthen Synopsys’ reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.

B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field.

5-8 years of hands-on experience in the Physical Verification (PV) domain.

Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS.

Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.

Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements.

Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks.

Exposure to competitive EDA tools and awareness of their strengths and limitations.

An analytical thinker with strong problem-solving abilities and meticulous attention to detail.

A collaborative team player who fosters knowledge sharing and mentorship.

Effective communicator, capable of translating technical concepts to diverse audiences.

Adaptable and proactive, with a passion for continuous learning and innovation.

Customer-focused, with a commitment to delivering high-quality solutions on time.

Self-driven, organized, and able to manage multiple priorities in a fast-paced environment.

Join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design.

Work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.

Our total rewards include both monetary and non-monetary offerings.

Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work.

Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

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We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.

You Are: You are an experienced and passionate engineer with a strong foundation in Electronics or VLSI, eager to work at the forefront of semiconductor technology. With 5-8 years of industry experience—primarily in Physical Verification (PV)—you thrive on solving complex layout and verification challenges for advanced process nodes. You possess a deep understanding of transistor CMOS layouts, ASIC design flows, and have hands-on expertise with industry-standard EDA tools such as IC Validator, Calibre, and Pegasus. Your proficiency in scripting languages like Perl, Tcl, and Python enables you to automate and optimize PV runset development, ensuring high-quality deliverables.

Responsibilities: Develop and validate DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies. Collaborate closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes. Automate qualification processes for IC Validator runsets using scripting languages such as Perl, Tcl, and Python. Troubleshoot and resolve complex layout verification issues, including LVS discrepancies, DRC violations, and DFM challenges. Interface directly with customers and FAEs to gather requirements, provide technical support, and ensure successful deployment of PV solutions. Mentor junior team members, share best practices, and contribute to a knowledge-sharing culture within the team. Stay up-to-date with the latest EDA tool advancements, competitive products, and foundry process innovations to maintain Synopsys’ technical edge.

Impact: Accelerate the adoption and success of Synopsys IC Validator among leading semiconductor foundries and design houses. Ensure robust and reliable PV runsets, enabling customers to achieve first-pass silicon success and reduce time-to-market. Drive continuous improvement in automation and process efficiency, reducing manual intervention and error-prone steps. Enhance customer satisfaction by providing timely and expert solutions to complex verification challenges. Contribute to the development of next-generation verification methodologies and best practices within Synopsys. Strengthen Synopsys’ reputation as a trusted partner in the global EDA ecosystem through technical excellence and customer-centric support.

Requirements: B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field. 5-8 years of hands-on experience in the Physical Verification (PV) domain. Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS. Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development. Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements. Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks. Exposure to competitive EDA tools and awareness of their strengths and limitations.

Who You Are: An analytical thinker with strong problem-solving abilities and meticulous attention to detail. A collaborative team player who fosters knowledge sharing and mentorship. Effective communicator, capable of translating technical concepts to diverse audiences. Adaptable and proactive, with a passion for continuous learning and innovation. Customer-focused, with a commitment to delivering high-quality solutions on time. Self-driven, organized, and able to manage multiple priorities in a fast-paced environment.

The Team You’ll Be A Part Of: You will join a dynamic and diverse team of physical verification experts, tool developers, and field support engineers dedicated to enabling the next generation of semiconductor design. The team thrives on technical collaboration, innovation, and a shared commitment to delivering best-in-class PV solutions to customers worldwide. You’ll work closely with foundry partners, internal R&D, and field teams, ensuring that Synopsys remains a leader in EDA technology and customer satisfaction.

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What you'll do

• Providing technical guidance and hands-on support to customers integrating Synopsys Interface IP (PCI Express and High Speed SerDes design) into their ASIC SoC/systems
• Conducting detailed integration reviews at key customer milestones and troubleshooting complex integration challenges throughout the SoC design flow.

What you need

• Bachelor's and/or masters with a minimum 10+yrs of Industry experience or equivalent
• At least 5+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional candidates with strong silicon debug and academic background considered)
• Solid understanding of ASIC design flows, including simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure
• Hands-on expertise in integration and validation of High Speed SerDes IPs for PCIe, ETH, USB

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What you'll do

• Supporting post-sales integration and silicon bring-up of Memory Interface PHY IPs and Controller IPs.
• Delivering insightful technical presentations and hands-on training sessions to both internal teams and external customers.
• Creating clear, detailed documentation and user collateral to facilitate customer understanding and product usability.

What you need

• Direct experience with Memory Interface PHY IPs and Controller IPs integration and bring-up.
• Solid knowledge of AMBA/AXI bus interfaces, floor-planning, and backend engineering for ASIC design.
• Proficiency with Linux, Verilog/VHDL, and modern ASIC design flows.

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What you'll do

• Developing and validating DRC, LVS, and Fill runsets (rule deck files) for the Synopsys IC Validator tool, targeting state-of-the-art semiconductor technologies.
• Collaborating closely with leading foundries to understand process requirements and deliver high-quality PV runsets for advanced nodes.

What you need

• B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field.
• 5-8 years of hands-on experience in the Physical Verification (PV) domain.
• Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS.
• Strong scripting skills in Perl, Tcl, and Python for automation and rule deck development.
• Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements.
• Experience in writing and debugging DRC, LVS, ERC, and DFM rule decks.
• Exposure to competitive EDA tools and awareness of their strengths and limitations.

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What you'll do

You will be responsible for delivering post-sales technical expertise throughout the runset programming, implementation, and ongoing maintenance cycles.

• Managing and providing ICV runset support for key foundry partners, ensuring seamless integration and optimal performance of Synopsys products.
• Delivering post-sales technical expertise throughout the runset programming, implementation, and ongoing maintenance cycles.
• Translating detailed customer installation requirements into actionable solutions, customizing product configurations as needed.
• Collaborating with clients to ensure their needs are fully met and Synopsys solutions function according to specifications.
• Offering pre-sales technical support, contributing to sales efforts by addressing technical queries and demonstrating product capabilities.
• Serving as a subject matter expert in EDA tool products, guiding customers through verification, place and route, design reuse, and physical design challenges.

What you need

• Basic understanding of the design process; familiarity with Design Rule Manuals (DRM) is preferred.
• Strong communication skills, capable of conveying technical concepts clearly to diverse audiences.
• Solid grasp of ASIC design flows, VLSI, and/or CAD engineering principles.
• Experience or knowledge of competitive EDA tool products, with expertise in verification, place and route, design reuse, and/or physical design.

What you'll be doing

You will be working as a Sr Staff Engineer in the R&D Engineering team, responsible for delivering post-sales technical expertise and managing ICV runset support for key foundry partners.

Why this matters

This role is critical in ensuring the successful implementation of Synopsys solutions and meeting customer needs.

Why you'll love it

You will have the opportunity to work with a talented team of engineers and contribute to the development of cutting-edge EDA tools.

What you'll need

• 5+ years of experience in EDA tool development, with a focus on ASIC design flows, VLSI, and/or CAD engineering principles.
• Strong understanding of competitive EDA tool products, with expertise in verification, place and route, design reuse, and/or physical design.
• Excellent communication and problem-solving skills, with the ability to convey technical concepts clearly to diverse audiences.
• Experience working with foundry partners and delivering post-sales technical expertise.

What you'll get

• Competitive salary and benefits package.
• Opportunity to work with a talented team of engineers and contribute to the development of cutting-edge EDA tools.
• Professional development opportunities, including training and mentorship.

How to apply

If you are a motivated and experienced engineer looking for a new challenge, please submit your application, including your resume and a cover letter, to [insert contact information].

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