{"version":"0.1","company":{"name":"YubHub","url":"https://yubhub.co","jobsUrl":"https://yubhub.co/jobs/skill/apb"},"x-facet":{"type":"skill","slug":"apb","display":"Apb","count":3},"x-feed-size-limit":100,"x-feed-sort":"enriched_at desc","x-feed-notice":"This feed contains at most 100 jobs (the most recently enriched). For the full corpus, use the paginated /stats/by-facet endpoint or /search.","x-generator":"yubhub-xml-generator","x-rights":"Free to redistribute with attribution: \"Data by YubHub (https://yubhub.co)\"","x-schema":"Each entry in `jobs` follows https://schema.org/JobPosting. YubHub-native raw fields carry `x-` prefix.","jobs":[{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_7419ab94-e4f"},"title":"Senior Software Engineer - Full Stack","description":"<p>About Cyngn</p>\n<p>Cyngn is a publicly-traded autonomous technology company that deploys self-driving industrial vehicles to factories, warehouses, and other facilities throughout North America.</p>\n<p>We are looking for a Senior Software Engineer - Full Stack to join our team. As a key member of our engineering team, you will play a crucial role in developing our innovative fleet management system for autonomous industrial vehicles.</p>\n<p>Responsibilities</p>\n<ul>\n<li>Develop and maintain both backend and frontend components of our cloud-based fleet management system</li>\n<li>Collaborate with Backend and Frontend Tech Leads to implement new features and improve existing functionality</li>\n<li>Write clean, efficient, and maintainable code in languages such as Python, Go or Java for backend, and React, Redux and TypeScript for frontend</li>\n<li>Contribute to the design and implementation of RESTful APIs and real-time data processing pipelines</li>\n<li>Assist in developing and optimizing database schemas and queries for both SQL and NoSQL databases</li>\n<li>Implement responsive and intuitive user interfaces</li>\n<li>Contribute to the development of advanced mapping features and geospatial data processing</li>\n<li>Participate in code reviews, providing constructive feedback to peers</li>\n<li>Assist in troubleshooting and resolving production issues across the full stack</li>\n<li>Implement and maintain unit tests, integration tests, and end-to-end tests</li>\n<li>Contribute to the continuous improvement of our development processes and tooling</li>\n</ul>\n<p>Requirements</p>\n<ul>\n<li>5+ years of professional software development experience in full stack roles</li>\n<li>Strong proficiency in backend development using Python, Go, Java, or similar languages</li>\n<li>Solid experience with frontend development using React, Redux, and TypeScript</li>\n<li>Familiarity with cloud platforms (AWS, Azure, or GCP) and microservices architectures</li>\n<li>Experience with database design and management, both SQL and NoSQL</li>\n<li>Knowledge of RESTful API design and implementation</li>\n<li>Understanding of event-driven architectures and message queuing systems</li>\n<li>Experience with containerization technologies such as Docker and Kubernetes</li>\n<li>Familiarity with version control systems (e.g., Git) and CI/CD pipelines</li>\n<li>Strong problem-solving skills and ability to debug complex issues across the full stack</li>\n<li>Good understanding of software design patterns and architectural principles</li>\n<li>Excellent communication skills and ability to work effectively in a collaborative team environment</li>\n</ul>\n<p>Nice to Have</p>\n<ul>\n<li>Experience with WebSocket implementations</li>\n<li>Familiarity with mapping libraries (e.g., Mapbox) and geospatial data handling</li>\n<li>Knowledge of IoT platforms or autonomous systems</li>\n<li>Experience with data visualization and dashboard creation</li>\n<li>Experience with performance optimization for both backend and frontend systems</li>\n<li>Familiarity with time-series databases for handling sensor data</li>\n</ul>\n<p>Benefits &amp; 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As a member of our team, you will be responsible for developing specifications and RTL for High Bandwidth Interface PHY IP. You will collaborate with Verification teams to ensure design accuracy and coordinate logic implementation phases across teams. You will also apply scripting skills for design automation and participate in onboarding in Da Nang and transitioning to Hanoi or Ho Chi Minh City.</p>\n<p>The successful candidate will have a BS/MS/PhD in Electronics Engineering or Telecommunications and 2+ years of experience in RTL design for ASIC or PHY IP. You will have experience with VCS, Verdi, Spyglass, Perl/TCL/Python and knowledge of clock domain crossing, APB, JTAG. Good English communication skills are essential.</p>\n<p>As a member of our team, you will advance industry-leading high bandwidth interface IP, ensure robust design and verification processes, drive innovation in RTL design and workflows, and enhance productivity through automation.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a href=\"https://yubhub.co\">YubHub</a></p>","url":"https://yubhub.co/jobs/job_7026ea72-dd8","directApply":true,"hiringOrganization":{"@type":"Organization","name":"Synopsys","sameAs":"https://careers.synopsys.com","logo":"https://logos.yubhub.co/careers.synopsys.com.png"},"x-apply-url":"https://careers.synopsys.com/job/ho-chi-minh-city/rtl-design-sr-engineer-in-hanoi-hcmc-da-nang/44408/92454718896","x-work-arrangement":"onsite","x-experience-level":"senior","x-job-type":"employee","x-salary-range":null,"x-skills-required":["RTL design","ASIC design","PHY IP","VCS","Verdi","Spyglass","Perl","TCL","Python","clock domain crossing","APB","JTAG"],"x-skills-preferred":[],"datePosted":"2026-04-05T13:22:17.483Z","jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Ho Chi Minh City"}},"occupationalCategory":"Engineering","industry":"Technology","skills":"RTL design, ASIC design, PHY IP, VCS, Verdi, Spyglass, Perl, TCL, Python, clock domain crossing, APB, JTAG"},{"@context":"https://schema.org","@type":"JobPosting","identifier":{"@type":"PropertyValue","name":"YubHub","value":"job_85ea872e-b5f"},"title":"RTL Design, Staff Engineer","description":"<p>Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions.</p>\n<p>They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products.</p>\n<p>These engineers play a crucial role in advancing technology and enabling innovations in various industries.</p>\n<p><strong>Job Description</strong></p>\n<p>We are seeking an experienced RTL design engineer with a strong background in electronics or telecommunications.</p>\n<p>With over five years in ASIC or PHY IP development, you’re passionate about solving technical challenges, collaborating with cross-functional teams, and mentoring others.</p>\n<p>Your communication skills and attention to detail ensure projects run smoothly from specification to silicon debug.</p>\n<p>You thrive in fast-paced environments and are eager to contribute to groundbreaking technology.</p>\n<p><strong>Responsibilities</strong></p>\n<ul>\n<li>Develop RTL specifications and architectures for High Bandwidth Interface PHY IP.</li>\n</ul>\n<ul>\n<li>Define synthesis constraints and resolve STA and gate-level simulation issues.</li>\n</ul>\n<ul>\n<li>Collaborate with verification, controller, and lab teams for design and debugging.</li>\n</ul>\n<ul>\n<li>Support RTL to GDS flow during logic implementation.</li>\n</ul>\n<ul>\n<li>Lead projects and train junior engineers.</li>\n</ul>\n<ul>\n<li>Work with customers to resolve technical RTL issues.</li>\n</ul>\n<p><strong>The Impact You Will Have</strong></p>\n<ul>\n<li>Deliver robust RTL designs for advanced silicon solutions.</li>\n</ul>\n<ul>\n<li>Drive successful project completion and tape-outs.</li>\n</ul>\n<ul>\n<li>Enhance design quality and verification efficiency.</li>\n</ul>\n<ul>\n<li>Support customer success and strengthen Synopsys’ reputation.</li>\n</ul>\n<ul>\n<li>Mentor and grow engineering talent within the team.</li>\n</ul>\n<ul>\n<li>Contribute to digital flow improvements and innovation.</li>\n</ul>\n<p><strong>What You’ll Need</strong></p>\n<ul>\n<li>BS/MS/PhD in Electronics Engineering or Telecommunications.</li>\n</ul>\n<ul>\n<li>5+ years of RTL design experience for ASIC or PHY IP.</li>\n</ul>\n<ul>\n<li>Expertise in VCS, Verdi, Spyglass, and scripting (Perl, TCL, Python).</li>\n</ul>\n<ul>\n<li>Knowledge of clock domain crossing, APB, JTAG protocols.</li>\n</ul>\n<ul>\n<li>Strong English communication skills.</li>\n</ul>\n<p><strong>Who You Are</strong></p>\n<ul>\n<li>Responsible, result-oriented, and self-motivated.</li>\n</ul>\n<ul>\n<li>Collaborative and proactive problem solver.</li>\n</ul>\n<ul>\n<li>Effective communicator and mentor.</li>\n</ul>\n<p><strong>The Team You’ll Be A Part Of</strong></p>\n<p>Join a collaborative engineering team delivering innovative PHY IP solutions.</p>\n<p>Work alongside experts in Ho Chi Minh City, Da Nang, or Hanoi, and contribute to Synopsys’ global leadership in semiconductor technology.</p>\n<p><strong>Rewards and Benefits</strong></p>\n<p>We offer a comprehensive range of health, wellness, and financial benefits.</p>\n<p>Your recruiter will provide more details about salary and benefits during the hiring process.</p>\n<p style=\"margin-top:24px;font-size:13px;color:#666;\">XML job scraping automation by <a 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