Strong candidates will have a track record of solving large-scale systems problems and low-level optimization. They should have significant experience optimizing ML systems for TPUs, GPUs, or other accelerators, and be results-oriented with a bias towards flexibility and impact.

Responsibilities:

• Identify and address performance issues across multiple ML systems
• Design and optimize kernels for the TPU
• Provide feedback to researchers on model changes and their impact on performance

Requirements:

• Bachelor's degree or equivalent combination of education, training, and/or experience
• Relevant field of study
• Years of experience required will correlate with the internal job level requirements for the position

Benefits:

• Competitive compensation and benefits
• Optional equity donation matching
• Generous vacation and parental leave
• Flexible working hours
• Lovely office space in which to collaborate with colleagues

Note: This job description is a rewritten version of the original ad, focusing on the key responsibilities, requirements, and benefits.

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Key responsibilities include:

• Leading the design, implementation, benchmarking, and maintenance of core compute kernels optimized for various hardware backends (GPU, accelerators)
• Driving the performance roadmap for kernel-level improvements: vectorization, tensorization, tiling, fusion, mixed precision, sparsity, quantization, memory reuse, scheduling, auto-tuning, etc.
• Integrating kernel optimizations with higher-level ML systems
• Building and maintaining profiling, instrumentation, and verification tooling to detect correctness, performance regressions, numerical issues, and hardware utilization gaps
• Leading performance investigations and root-cause analysis on inference bottlenecks, e.g. memory bandwidth, cache contention, kernel launch overhead, tensor fragmentation
• Establishing coding patterns, abstractions, and frameworks to modularize kernels for reuse, cross-backend portability, and maintainability
• Influencing system architecture decisions to make kernel improvements more effective (e.g. memory layout, dataflow scheduling, kernel fusion boundaries)
• Mentoring and guiding other engineers working on lower-level performance, providing code reviews, and helping set best practices
• Collaborating with infrastructure, tooling, and ML teams to roll out kernel-level optimizations into production, and monitoring their impact

Requirements include:

• BS/MS/PhD in Computer Science, or a related field
• Deep hands-on experience writing and tuning compute kernels (CUDA, Triton, OpenCL, LLVM IR, assembly or similar sort) for ML workloads
• Strong knowledge of GPU/accelerator architecture: warp structure, memory hierarchy (global, shared, register, L1/L2 caches), tensor cores, scheduling, SM occupancy, etc.
• Experience with advanced optimization techniques: tiling, blocking, software pipelining, vectorization, fusion, loop transformations, auto-tuning
• Familiarity with ML-specific kernel libraries (cuBLAS, cuDNN, CUTLASS, oneDNN, etc.) or open kernels
• Strong debugging and profiling skills (Nsight, NVProf, perf, vtune, custom instrumentation)
• Experience reasoning about numerical stability, mixed precision, quantization, and error propagation
• Experience in integrating optimized kernels into real-world ML inference systems; exposure to distributed inference pipelines, memory management, and runtime systems
• Experience building high-performance products leveraging GPU acceleration
• Excellent communication and leadership skills , able to drive design discussions, mentor colleagues, and make trade-offs visible
• A track record of shipping performance-critical, high-quality production software
• Bonus: published in systems/ML performance venues (e.g. MLSys, ASPLOS, ISCA, PPoPP), experience with custom accelerators or FPGA, experience with sparsity or model compression techniques

The pay range for this role is $190,900-$232,800 USD per year, depending on location and experience.

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