Responsibilities:

• Design and implement AI-powered quality processes and automation frameworks that go beyond traditional QA methods.
• Build and maintain automations to streamline quality tracking, reporting, and alerting , from smart dashboards to automated reporting pipelines.
• Leverage AI tools and large language models (LLMs) to accelerate root cause analysis, anomaly detection, and incident prediction.
• Track and analyze customer quality incidents, applying AI-assisted techniques to identify patterns, resolve issues faster, and prevent reoccurrence.
• Assist in driving software quality from concept to release delivery using data-driven KPIs and quality targets.
• Explore and introduce emerging AI methodologies to improve the quality mindset across engineering teams.
• Contribute to quality process improvement initiatives and help maintain quality process documentation and records.

Requirements:

• B.Sc. in Computer Science, Software Engineering, or another relevant technical degree.
• 2+ years of experience in software development, QA, or SW quality roles.
• Hands-on experience with AI tools, LLMs, and automation workflows , especially Claude, web-building tools, and AI-assisted development environments.
• Demonstrated ability to think creatively, challenge existing processes, and push things forward independently.
• Outstanding interpersonal and communication skills , comfortable working with global teams and presenting ideas clearly across levels.
• Strong analytical mindset with the ability to translate data into actionable quality insights.
• Organized, independent, and able to juggle multiple workstreams.
• Fluent English , written and spoken.

Nice to Have:

• Proven track record of using AI to automate or improve a quality or engineering process.
• Experience building AI-assisted workflows, prompt engineering, or integrating LLM APIs.
• Familiarity with Networking protocols and technologies.
• Experience with Agile/DevOps methodologies.
• Proficiency with BI tools and data visualization.

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Responsibilities:

• Lead projects as a board designer in the HW team
• Define product specifications, create electrical schematics, select components, and guide layout
• Hands-on development and testing in a lab environment, supporting production and qualification processes

Requirements:

• B.Sc./M.Sc. in Electrical Engineering, or equivalent experience
• At least 5 years of practical experience
• Project management skills, independent, with excellent interpersonal relationships

Preferred qualifications:

• Knowledge of analog and digital electrical circuits, system-level understanding
• Background in board design: schematics, layout, thermal design, mechanical design
• Experience with PCB fabrication, product qualification, and lab work

NVIDIA is committed to fostering a diverse work environment and is an equal opportunity employer.

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Job Description:

As a Senior Business Intelligence Analyst at NVIDIA, you will lead the architectural design of complex, scalable data solutions for enterprise-level environments. You will evaluate and implement advanced technologies to drive innovation and enhance organisational analytical capabilities. Your responsibilities will include developing end-to-end Business Intelligence solutions, collaborating with internal business and IT partners globally, providing visualisation solutions using tools such as Tableau, Power BI, and other in-house developed tools, designing and maintaining data models, and creating and optimising ETL processes.

Requirements:

• Bachelor’s degree in Computer Science, Information Systems, or a related field, or equivalent experience.
• A minimum of 10+ years of consistent experience in implementing full-cycle business intelligence projects.
• Expert-level knowledge of SQL with the ability to write complex queries and stored procedures efficiently.
• Hands-on experience with at least one of the visualisation tools like Tableau or Power BI.
• Experience with cloud data platforms such as Snowflake or Databricks.
• A portfolio of successful Business Intelligence projects or case studies.
• Excellent written and verbal English language skills.

Nice to Have:

• Functional knowledge of Operations and Supply Chain domains.
• Hands-on experience with Python and PySpark for large-scale data processing.
• Experience with LLMs, embeddings, vector databases or RAG workflows, implementation of AI solutions / algorithms for advanced data analysis.
• A proven track record of designing complex data architectures and successfully implementing new technologies.
• Proficiency in Jira.

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Responsibilities

• Utilize testers and different hardware in combination with optical fault isolation techniques such as Laser stimulations (OBIRCH, LADA, etc.), Laser probing and emission microscopy, to detect defects, chip design marginalities, process issues, etc.
• Modify test programs to fit failure analysis requirements.
• Interpret ATPG diagnosis reports.
• Based on the OFI/diagnosis findings, prepare plans for nano-probing and guide Physical Failure Analysis engineers in their work and Physical Failure Analysis plan.
• Prepare technical reports summarizing the findings.
• Develop novel and existing debug techniques.
• Work directly with job requestors (Q&R, Foundry, physical design) and supporting teams (Test, DFT, SW, physical design).

Requirements

• B.Sc. in Electrical/Computer Engineering, Physics, Materials Science, or related field with 5+ years of relevant experience; or M.Sc. with 3+ years; or Ph.D.
• Good understanding of VLSI circuit design, and/or device physics, and/or process engineering.
• Ability to work independently and as part of a team.
• Strong sense of ownership, commitment, and responsibility.
• Effective oral and written communication skills.
• Strong analytical problem-solving skills.

Preferred Qualifications

• Experience in Failure analysis, Si debug, ATE test development, or nanoprobing.
• Familiarity with ATE Test Programs and ability to adopt Test Patterns per debug needs.
• Statistical/data analysis experience (Matlab, JMP, etc.).
• Hands-on experience with different OFI techniques such as laser stimulations, laser probing, photon emission, thermal emission.
• Background with electronic test equipment: scopes, spectrum analyzers, lock-in amplifiers, parametric analyzers, VNA, TDR, etc.

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As a Senior Networking ASIC Functional Characterization Engineer, you will lead the execution of system-level functional characterization of networking ASICs. Your focus will be on functional stress testing to ensure flawless performance and optimal power consumption. You will complete and analyze results, correlating performance parameters with parametric data from ATE (production). You will also evaluate the effects of silicon/environmental considerations on key parameters.

Responsibilities:

• Lead the execution of system-level functional characterization of networking ASICs.
• Focus on functional stress testing to ensure flawless performance and optimal power consumption.
• Complete and analyze results, correlating performance parameters with parametric data from ATE (production).
• Evaluate effects of silicon/environmental considerations on key parameters.
• Build relevant DOEs, write required scripts/functions/envelopes, and debug HW and SW issues.
• Collaborate with premier design, architecture, and validation teams to develop robust characterization plans, product power management policy, and drive power features to implementation.
• Partner with multi-functional teams to meet project achievements and drive products to production with high quality.

Requirements:

• A Bachelor's degree in Electrical Engineering or a related field, or equivalent experience.
• Confirmed experience of 5+ years in networking ASIC functional validation or characterization.
• Strong understanding of IC networking power and performance aspects, and proficiency in HW debug techniques and tools.
• Knowledge in python/C/C++ and experience with writing software for hardware interaction.
• Excellent problem-solving skills and attention to detail.
• Ability to lead execution teams in a dynamic, high-paced environment.
• Experience in building AI agents and integrating them in your daily work.

Benefits: NVIDIA offers highly competitive salaries and a comprehensive benefits package. You can learn more at www.nvidiabenefits.com/

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As a Senior System Design Test Architect, you will lead the definition of system hardware testability for NVIDIA's Networking systems. Your responsibilities will include:

• Leading optimal product testing definitions, including HW, SW, FW, Mechanical fixtures, and cables/harnesses for customized production testing set-ups
• Presenting new product testing architectures, DFT, and testing methods to large audiences
• Creating testing specification documents and production test flow processes for each system
• Collaborating with the engineering team during product development, influencing product design from DFT aspects
• Supporting production ramp-up and scalability, and leading responses to ECR/ECO implications
• Examining new technologies, testing capabilities, and their implementation for next-generation products
• Ensuring testing set-ups and coverage meet DFT requirements and timetables
• Leading DFT risk assessments and driving mitigations to reduce risks

To be successful in this role, you will need:

• BSc or MSc in Electrical Engineering
• Integration capabilities, self-task management, vast electronic knowledge, and production and testing process know-how
• Background in working with contract manufacturers and suppliers
• At least 5 years of experience as a DFT engineer at chip/system level, Board Design engineer, or system architect
• Strong personal skills, including proactivity, self-instruction, good interpersonal relationships, multitasking, organization, and quick learning

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You will work closely with NVIDIA Driver developers, verification teams, and performance architects to gain a deep understanding of NVIDIA's Networking products and technologies.

Your responsibilities will include:

• Working with developers to test new components, including crafting and executing unit, functional, and performance tests.
• Developing a verification environment and tools to qualify the product from functional and performance perspectives.
• Investigating performance-related issues in networking Linux drivers.
• Analyzing coverage measures to identify verification holes and show progress toward product development and releases.
• Identifying and writing all types of coverage measures for stimulus and corner cases.
• Incorporating AI mindset and practices in your daily work.

Requirements:

• B.Sc. or equivalent experience in Computer Science or SW/Computer Engineering.
• 1+ years of work experience in low-level software development.
• Strong programming skills in Python and/or C.
• Strong orientation towards performance aspects in low-level code design.
• Background with Networking and protocols.
• Creative, motivated, and results-driven worker.

Nice to have:

• Background in Linux Operating Systems.
• Strong debugging and analytical skills.
• Proven experience in performance analysis and debug of low-level code.

We offer competitive salaries and a generous benefits package.

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We are looking for a senior architect or technical leader with deep expertise in networking protocols and the broader interconnect ecosystem to help define the next generation of capabilities across our platforms. This role is ideal for someone who combines strong protocol knowledge with architectural judgment, product sense, and credibility in industry forums.

Responsibilities

• Define and guide protocol and architecture direction for RDMA and sophisticated transport technologies across next-generation networking platforms, with particular focus on performance, scalability, interoperability, and adaptability.
• Lead technical work spanning RDMA semantics, congestion management, multipath transport, reliability, ordering, virtualization, and software-visible interfaces.
• Develop NVIDIA's viewpoint and contributions across major ecosystem and standards organizations, including UEC, IBTA, IEEE, and OCP.
• Work closely with architects, hardware, firmware, software, validation, and product teams to transform protocol concepts into practical features and prioritized roadmap investments.
• Evaluate standards proposals, protocol extensions, and ecosystem requirements; identify tradeoffs early and drive streamlined technical recommendations.
• Engage with contributors from inside and outside the organization to advance interoperability, performance portability, and adoption within the RDMA ecosystem.
• Use analysis, modeling, experimentation, traces, and system-level reasoning to validate architectural decisions and expose bottlenecks or protocol gaps.
• Represent the technical direction of the work clearly to senior leaders, engineering teams, and external collaborators.

Requirements

• B.Sc, M.Sc, or PhD in Computer Science, Electrical Engineering, Computer Engineering, or equivalent experience.
• More than 10 years of proven experience in networking protocols, interconnect architecture, systems research, or related areas.
• Strong technical knowledge in one or more fields such as RDMA technologies (InfiniBand, RoCE, verbs and transport semantics), NIC or switch architecture, congestion control algorithms, or multipath transport.
• Strong understanding of modern data center networking, including Ethernet, congestion management, routing and switching interactions, and large-scale system behavior.
• Proven background in protocol definition, contributing to standards, interoperability efforts, or technical leadership within an ecosystem.
• Ability to reason across hardware, firmware, software, and system architecture boundaries and make well-grounded technical tradeoffs.
• Strong record of influencing technical direction across multi-functional teams and aligning diverse collaborators around architecture decisions.
• Strong interpersonal skills, including the ability to convey complex technical perspectives clearly in both internal and external environments.

Nice to Have

• Experience engaging in or leading initiatives in UEC, IBTA, IEEE, OCP, or comparable industry standards and ecosystem organizations.
• Expertise in SmartNICs, DPUs, NIC architecture, switch architecture, or hardware/software co-design for sophisticated networking systems.
• Deep background in congestion control , algorithm development, analysis, simulation, or deployment at scale in data center or HPC environments.
• Experience with multipath transport protocols, load balancing, or adaptive routing across large-scale fabrics.
• Familiarity with GPU networking, GPUDirect RDMA, collective communication patterns, or AI and HPC workload behavior over RDMA fabrics.

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Responsibilities:

• Design and develop advanced features for our world-class embedded processing

• Write clean, efficient, and maintainable code using advanced AI-based tools

• Collaborate with team members, SW R&D, Architects, compiler team, and FW

Requirements:

• B.Sc. degree or equivalent experience in Computer Science / Software Engineering

• 5+ years of experience

• Proficient knowledge and experience in C for an embedded environment

• Strong design, coding, analytical, debugging, and problem-solving skills

• Full ownership & end-to-end responsibility

• Excellent social and written communication skills

Preferred Qualifications:

• Can do attitude, independency and agility

• Ability to quickly adapt to new technology and go deep into new areas

• Knowledge of embedded processing, especially with the RISC-V processor, is an advantage

• Knowledge of Linux kernel and driver development is an advantage

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The ideal candidate brings strong expertise in routing, switching, and network automation, along with the ability to design, plan, and lead large-scale Enterprise Networking initiatives from concept through deployment.

Responsibilities:

• Designs, plans, and coordinates the implementation of network technologies in support of defined requirements generated by business and growth demands
• Validates project requirements, defines project scope, develops project schedules, and produces detailed designs for assigned projects
• Produces work breakdown structures that demonstrate understanding of proposed changes and how the change will be implemented with minimal service impact
• Performs analysis and diagnosis of highly sophisticated networking problems
• Builds simulated networks in test labs to resolve highly significant problems and compatibility issues
• Prepares and maintains up-to-date documentation detailing configuration of deployed solutions
• Plans and drives highly complex network upgrade and migration activity, including highly automated environments
• Provides mentorship and technical leadership for existing network team members and partner teams during outages and downtimes

Requirements:

• BSc or equivalent experience
• 10+ years of experience in network engineering support environment
• Experience and expertise in network operations and service optimisation in highly available, network infrastructure solutions in a multi-vendor, large-scale, multi-site, international environment
• WAN circuits and protocols (SR-TE, MPLS, DWDM, DMVPN)
• Dynamic IP Routing protocols (OSPF, ISIS, EIGRP, eBGP/BGP, PIM Multicast)
• Diverse skills in client and network operating systems such as Cumulus, Cisco IOS, Arista EOS, etc.
• Virtualisation and Overlay technologies, both networking (VxLAN, BGP-MP, VRFs) and compute (VMware, Kubernetes, Docker) and their various methods for integration
• High-level internetworking problem-solving in an enterprise and web-scale network environment
• Expertise in collaborating with vendors to run circuit delivery, problem-solving, and migrations
• CCIE or equivalent certifications are a plus

Nice to Have:

• Take initiative and be resourceful to achieve goals independently as well as work effectively in groups
• Flexibility to adjust to changing requirements, schedules, and priorities
• AI-Driven Network Engineering: Demonstrated ability to build, integrate, and leverage AI agents within network engineering workflows
• Effective communication skills, both oral and written, to technical and non-technical audiences at all levels in the organisation

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You will drive cross-functional initiatives that improve execution and strengthen coordination across the materials supply chain.

Responsibilities:

• Own the end-to-end supply chain and procurement readiness for the NPI phase, ensuring a smooth transition from NPI to full-scale Mass Production (MP).
• Ensure material readiness to support program achievements, including production ramp-up, and full-scale manufacturing.
• Proactively identify and resolve supply constraints, lead-time risks, and BOM gaps that could jeopardize a successful MP ramp.
• Lead cross-functional readiness reviews, driving alignment between Engineering, Operations, CM, and procurement stakeholders.
• Monitor and track Single-source parts, proactively identifying supply chain risks and escalating the need for dual/multi-manufacturer strategies to ensure supply continuity.
• Collaborate cross-functionally with Planning and Business Units to drive demand analysis across NPI and high-volume production portfolios.
• Drive innovation in supply chain analytics by deploying BI and AI solutions to improve CM reporting accuracy, strengthen supply–demand alignment, and enable predictive, insight-based decision-making.

Requirements:

• B.Sc. in Industrial Engineering, related field or equivalent experience.
• Minimum of 5+ overall years of experience in materials management, procurement, or supply chain management within a semiconductor OEM environment.
• Strong understanding of supply chain processes, NPI cycles, and material planning systems.
• Strong technical knowledge of semiconductor materials and contract manufacturing processes.
• Excellent communication, negotiation, and leadership skills.
• Strong understanding of ERP/MRP systems, tools driven by artificial intelligence, and platforms for analyzing supply chain data.
• Ability to thrive in a fast-paced, dynamic environment and effectively prioritize tasks.

Preferred Qualifications:

• Master's degree.
• Experience with agentic AI systems in supply chain applications.

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What You'll Be Doing:

• Integration and testing of next-generation, large-scale thermal, pressure, and liquid management solutions. Perform qualification tests for cutting-edge cooling and sensing solutions.
• Analyse and summarise thermal performance data and fluid dynamics results to support design reviews and decision-making.
• Primary onsite focal point for malfunctions in thermal liquid cooling stations. Diagnose and resolve hardware/software issues to maintain continuous development labs activity.
• Maintain and update hardware (manifolds, connectors, sensors) and software versions across all thermal systems according to engineering specifications.
• Perform initial RCA on thermal system failures. Extract detailed fail reports and corrective/preventing suggestions.
• Build and maintain practical documentation including thermal assembly instructions, fluid loop installation procedures, and troubleshooting guides.
• Manage inventory for critical thermal components and define maintenance cycles routine.
• Own full responsibility for the thermal and liquid cooling solutions lab.

What We Need to See:

• B.Sc. in Mechanical Engineering – a must.
• Minimum 4 years of expertise in liquid cooling thermal integration and implementation.
• Hands-on experience with liquid cooling management, including chillers, CDUs, and monitoring systems.
• Strong communication skills, with the ability to bridge gaps between diverse technical and functional groups.
• A consistent track record of supporting multiple complex projects simultaneously.
• Ability to travel to CM sites to support troubleshooting of thermal systems, perform fluid loop audits, or assist in specialised installations as needed.
• Self-motivated learner with a commitment to high-quality execution and innovative problem-solving.
• Cross-functional collaboration and strong teamwork skills.

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At NVIDIA, we are dedicated to pushing the boundaries of pioneering technology. The Senior Product Quality Engineer will provide leadership and management for the Networking system product quality within the organization. Establish, maintain, and optimize an effective quality management methods and target to achieve high quality performance.

As part of our team, you will work on networking IC products and ensure their readiness for production stage. Leading and mentoring root cause analysis for issues related to design, manufacturing or customers. Enhance and improve products performance by proactive risk assessment and other prevention methods. This is an outstanding opportunity to be part of a company that is crafting the future of AI and computing.

What You'll Be Doing

• Integrated Circuits (IC) quality manager will coordinate and lead the quality function and sustain the quality philosophy for the organization.
• Establish, maintain and optimize an effective quality management system.
• Build and implement a quality plan to achieve the levels of quality established through organizational goals, customer expectations, and related partners.
• Improve products by working towards problem-solving tools, prevention methods, quality-at-the-source and continual improvement techniques.
• Maintain and improve product build development, verification and validation processes, to allow high quality of interconnects and systems products throughout the entire product life cycle.

What We Need to See

• Bachelor’s degree or master’s degree or equivalent experience in electrical engineering or material science.
• Experience: 5+ years preferred in leadership and manufacturing
• Knowledge in semiconductor design and process
• Strong interpersonal and project management skills
• Strong problem-solving skills and analytical ability, processes oriented

Ways to Stand Out from the Crowd

• Integrator experience in the semiconductor industry
• Experience in Silicon Photonics develop and manufacturing
• Leadership capabilities

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Job Summary: As a Mechanical Design Team Manager, you will lead a team of mechanical design engineers, define priorities, create project plans, and allocate resources for mechanical programs in coordination with Product Managers. You will drive all electro-mechanical, automated JIG and thermal design aspects of production test setups, ensure readiness of test and assembly infrastructure for high-volume manufacturing, develop multiple early design concepts in fast-paced product development cycles, lead task forces to investigate and resolve production issues, reliability concerns, and conduct failure analysis, and perform risk assessments and implement mitigation strategies during product design.

Responsibilities:

• Lead a team of 8+ mechanical design engineers.
• Define priorities, create project plans, and allocate resources for mechanical programs in coordination with Product Managers.
• Drive all electro-mechanical, automated JIG and thermal design aspects of production test setups, ensure readiness of test and assembly infrastructure for high-volume manufacturing.
• Develop multiple early design concepts in fast-paced product development cycles.
• Lead task forces to investigate and resolve production issues, reliability concerns, and conduct failure analysis.
• Perform risk assessments and implement mitigation strategies during product design.

Requirements:

• B.Sc. in Mechanical Engineering or higher.
• 10+ overall years of relevant experience including 4+ years of experience managing teams of engineers in R&D environment.
• Proven expertise in developing, testing, and manufacturing of complex automated connection systems with precise moving parts, pneumatic and electro-mechanical systems design.
• Strong hands-on experience with 3D CAD tools (Creo preferred) static and dynamic mechanical simulation.
• Solid background in designing components and sub systems and systems for high-volume manufacturing technologies such as sheet metal, stamping, and injection molding.
• High awareness of quality and manufacturability for robust production.
• Excellent verbal and written communication skills in English and Hebrew.

Nice to Have:

• Experience in precise electro-mechanic moving connection elements, Pneumatic mechanical design.
• Background in electro-mechanical product design (including PCB/PCBA).
• Solid experience working in a fast pace, demanding R&D environment.
• Experience collaborating with OEMs/ODMs and drafting Statements of Work.
• Background in developing and implementing new design methodologies.

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The Advanced Research team has a need for a Principal Engineer in Supplier Engineering and Strategic Sourcing. This role involves activities related to the development of Automotive, NVIDIA’s Gaming, Shield, High Performance Compute, intelligent production systems, and other products. It emphasizes linking early proof of concepts and development to product applications.

As part of a multi-functional team, your task would be to build suppliers eco-systems in support of all business segments including but not limited to Desktops, Servers, Automotive, AI factories and NVIDIA Shield products.

Responsibilities:

• Own the strategy and execution for vendor and collaborator engagement across all technology categories, ensuring the supply ecosystem never limits NVIDIA's pace of innovation.
• Serve as the main technical and commercial link between NVIDIA's development groups and the global supplier ecosystem, translating complex technology requirements into actionable supply strategies.
• Drive early supplier involvement in advanced technology programs, enabling co-development and co-investment that accelerates time-to-market and de-risks technology transitions.
• Lead commercial and technical negotiations, structuring agreements including SOW, NRE investment models, capacity commitments, and long-term partnership frameworks.
• Partner with Engineering, Research, Program Management, and Operations to provide supply feasibility input early in the development cycle.
• Apply deep knowledge of emerging technology trends to identify strategic partnership opportunities and ensure NVIDIA has access to the right capabilities ahead of industry adoption.
• Build supplier development programs that raise engineering maturity, process capability, and operational stability across NVIDIA's vendor base.
• Lead executive-level supplier relationships and strategic business reviews, driving alignment on technology roadmaps, performance, and long-term direction.

Requirements:

• 10+ years of relevant experience in Supplier Engineering & Strategic Sourcing
• BSc. or MSc. in Industrial Engineering & Management
• Ability to translate product needs from fundamental concepts through ecosystem considerations, ensuring optimized, cost-effective designs
• End-to-end product coverage experience, including assessment of manufacturing and supply partners , with hands-on experience in volume manufacturing, working with overseas manufacturers, and leading external resources including component suppliers and manufacturing partners
• Proven track record in leading supplier selection and qualification processes in partnership with engineering and research teams, including establishing and maintaining a resilient, strategically aligned Recommended Vendor List across relevant technology areas
• Technical knowledge across electrical components, PCB, optical components, mechanical, and thermal domains
• Proficiency with ERP and PLM systems, with demonstrated use of AI tools

NVIDIA provides attractive compensation and an extensive benefits package.

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The Networking Business Unit (NBU) builds high-speed interconnects that switch thousands of GPUs into a single AI supercomputer.

As a Software Architect, you will:

• Design and implement network validation methodologies for system-level testing
• Build systems that orchestrate millions of concurrent IO operations, inject chaos at the infrastructure layer, and expose system faults
• Develop systems that capture, store, and process TBs of telemetry data for root-cause analysis and system-level insights
• Advance AI-driven approaches to test automation
• Establish engineering practices and produce clear, data-driven reports

Requirements:

• B.Sc. / B.A. in Computer Science, Electrical Engineering, or equivalent experience
• 12+ years of experience in developing large-scale software projects
• Strong distributed system experience and system-level debugging skills
• Strong software skills: C/C++/Rust, Python, Bash
• Experience building automation frameworks and validation tools
• Experience building large-scale infrastructure platforms or reliability engineering systems
• Deep understanding of distributed systems: concurrency, consistency models, fault tolerance, and large-scale system behavior under stress

Preferred qualifications:

• Background with RDMA / RoCE / AI networking (NCCL)
• Experience with L2/L3/L4 networking protocols
• Familiarity with NVIDIA networking solutions (ConnectX, SpecX, BlueField)
• Background in performance analysis, Kubernetes, or cloud environments
• Background in chaos engineering, fault injection, or simulation systems

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Job Summary: As a Technical Lead, you will develop validation methodologies and automation frameworks, debug, analyze performance, and work on cutting-edge AI networking technologies at scale.

Responsibilities:

• Review system and product requirements, design validation methodologies, and develop comprehensive test plans for networking technologies in large-scale AI cluster solutions.
• Develop and maintain benchmarks, automation tools, and scripts for test execution, environment setup, log collection, and data analysis.
• Lead end-to-end investigation of complex issues, reproduce real-world scenarios, analyze logs, and drive issues to root cause and resolution.
• Read and understand source code (C/C++/Python) to investigate defects, validate fixes, and improve logging, instrumentation, and debugging capabilities.
• Collaborate with software and hardware development teams to debug networking technologies.
• Profile and research AI training and inference workloads, correlating application behavior with network and system telemetry.
• Document findings, communicate technical results, and continuously improve validation methodologies, automation environments, and engineering processes.

Requirements:

• B.Sc. / B.A. in Computer Science, Electrical Engineering, or equivalent experience.
• 8+ years of experience in networking, system validation, or related domains.
• Proven experience debugging complex production systems.
• Ability to read, debug, and reason about C/C++ code.
• Strong scripting and automation experience using Python, Bash, and/or Ansible.
• Deep understanding of distributed systems.
• Ability to drive technical alignment across teams and make high-quality architectural decisions.

Nice to Have:

• Experience with large-scale clusters or distributed systems.
• Familiarity with NVIDIA networking solutions.
• Background in performance analysis, Kubernetes, or cloud environments.
• Background in chaos testing, fault injection, or simulation systems.

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Responsibilities

• Build and implement Linux kernel drivers for brand new networking devices, along with supporting user-space libraries.

• Collaborate with global engineering teams to troubleshoot issues and deliver effective solutions for customers.

• Write high-quality code for the Linux kernel and other open-source environments.

• Work in a continuous deployment environment with rapid development and release cycles.

• Join an experienced, collaborative team with a strong engineering culture.

Requirements

• B.Sc. in Computer Science or equivalent experience in practice.

• At least 2+ years of hands-on industry experience.

• Strong native C programming skills.

• Excellent problem-solving and debugging abilities.

• Ability to work independently while communicating clearly and effectively with others.

Preferred Qualifications

• Prior experience contributing to Linux kernel development or open-source communities.

• Strong understanding of data structures and operating systems.

• Experience developing device drivers.

• Solid networking knowledge.

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You will combine deep storage expertise with strong automation and SRE practices to design, build, and operate highly available storage systems at scale.

Responsibilities:

• Lead design, deployment, and operations of production NAS, SAN, and Object Storage platforms, ensuring reliability, performance, and security.
• Capture requirements from partner teams, architect storage solutions, and drive end-to-end implementation for new and existing services.
• Develop, maintain, and improve automation for provisioning, configuration, monitoring, incident response, and lifecycle management of storage infrastructure.
• Participate in on-call and incident response, lead troubleshooting of complex storage and performance issues, and drive root cause analysis and preventive actions.
• Define and track SLOs/SLIs and error budgets for storage services, using observability and analytics to continuously improve reliability and efficiency.
• Build and maintain runbooks, standard operating procedures, and comprehensive documentation for storage services and automation.
• Analyze capacity and usage trends, perform forecasting, and recommend scaling or optimization strategies to support business growth.
• Collaborate closely with SRE, infrastructure, networking, and application teams in a follow-the-sun model to deliver consistent, high-quality service.
• Mentor junior engineers, share best practices, and help drive adoption of SRE principles across the team.

Requirements:

• 12+ years of experience in Site Reliability, DevOps, or Infrastructure Engineering, with significant focus on storage systems.
• Bachelor’s degree in Computer Science, Computer Engineering, or a related technical field or equivalent practical experience.
• Strong hands-on experience with design, deployment, and operations of enterprise-grade NAS, SAN, and/or Object Storage platforms.
• Solid understanding of SRE concepts (SLOs/SLIs, error budgets, incident management, observability, postmortems).
• Proficiency with Infrastructure as Code and configuration management tools (e.g., Terraform, Ansible, Puppet, SaltStack) and source control systems.
• Experience building and operating highly available, scalable infrastructure, including automation for provisioning, monitoring, and remediation.
• Experience with container and virtualization platforms (e.g., Docker, Kubernetes, hypervisors) and modern CI/CD and version control tools.
• Strong scripting or programming skills (e.g., Python, Go, Shell) to build tools, automate workflows, and integrate systems.
• Excellent communication and collaboration skills, with the ability to work effectively across distributed and cross-functional teams.

Benefits:

• Competitive salaries
• Generous benefits package

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Job Description: As a Physical Design Power Optimization and Modeling Engineer, you will be responsible for power optimization of physical design, including blocks, top-level, and fc under challenging constraints.

Key responsibilities include:

• Power optimization of physical design, involving synthesis, power and clock distribution, place and route, timing closure, power and noise fixes
• Power estimation and power modeling

Requirements:

• B.Sc./M.Sc. or equivalent experience in Electrical Engineering/Computer Engineering
• 1+ years of experience in physical design and/or BE power optimization aspects
• Familiarity with physical design EDA tools such as Synopsys, Cadence, etc.
• Native ability to leverage modern AI tools to accelerate engineering workflows, productivity, and problem-solving
• Knowledge in physical design flows and methodologies (PNR, STA, physical verification) is an advantage
• FE design experience is an advantage
• Excellent problem-solving, partnership, and interpersonal skills

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You will be a key player in developing and enabling new technologies that scale across NVIDIA's product lines. If you are passionate about front-end micro-architecture and design and want to see your blocks come to life in silicon, we want to hear from you!

Responsibilities

• Owning the front-end micro-architecture and design of Power Management IP ASIC blocks, from the IP definition phase through the full design cycle and into post-silicon bring-up and enablement.
• Serving as a key player in the development and enablement of new power management technologies across NVIDIA's product lines.
• Delivering high-quality, synthesizable RTL as part of the IP Chip Design team.
• Partnering closely with architecture, verification, physical design, and validation teams to drive successful tape-out and silicon bring-up.
• Leading post-silicon debug, characterization, and enablement activities to bring your blocks from concept to working silicon.

Requirements

• BSc or MSc in Electrical Engineering, Computer Engineering, or a related field (or equivalent experience).
• 12+ years of hands-on RTL design experience.
• Proven experience bringing a block from the development phase all the way through to post-silicon bring-up and enablement.
• Strong background in front-end ASIC micro-architecture and design.
• Solid command of the full IP/ASIC design flow, from definition through post-silicon.
• A collaborative mindset and the drive to be a key contributor within a world-class design team.

Nice to Have

• Hands-on experience with Power Management IP.
• A track record of contributing to new technology development and enablement.
• Deep post-silicon validation and debug expertise.
• Familiarity with low-power design techniques and methodologies.

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As an IC Test Engineer, you will play a crucial role in transferring Network Silicon ICs products from design engineering to mass production.

Responsibilities include:

• Defining and developing tests for Network-ICs from wafer level to final test
• Designing and improving factory test plans to enhance coverage, time, cost, and yield
• Ensuring scalable testing and manufacturing for high-speed interfaces
• Collaborating with overseas manufacturing teams to increase yields, test coverage, and capacity, while reducing production costs

Requirements:

• B.Sc. degree in Electrical Engineering
• 2+ years of relevant experience
• Excellent communication skills with diverse teams and functional groups
• Ability to multi-task and high self-learning skills
• High execution quality standards

Preferred qualifications:

• Background in IC test development
• Experience with UltraFlex or other IC testers

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You will develop physical design, STA, Logic eq, Power Integrity flows and methodologies for implementing networking chips and SOCs.

Key responsibilities include:

• Working closely with block owners and full Chip STA engineers to ensure high-quality and timely convergence
• Creating unique solutions to state-of-the-art physical design problems
• Participating in and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification

Requirements:

• B.Sc./M.Sc. in Electrical Engineering/Computer Engineering (or equivalent experience)
• 2+ years of full-time relevant experience in Physical Design, Backend CAD, STA and Timing closure methodologies
• Proven experience with industry-standard tools like PrimeTime and PrimePower
• Self-motivation, attention to detail, and good written, verbal, and presentation skills

Preferred qualifications:

• Experience in Signoff domains: STA, Power Estimation, Power Integrity, Formal eq.
• Knowledge of Tcl/Perl/Python
• Versatility and teamwork skills

NVIDIA offers a meaningful, growing, and highly professional environment where you can make a significant impact.

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As an ASIC Power Project Lead, you will manage the pre-silicon Power activities of NVIDIA's most advanced and complex switch ASICs.

Responsibilities:

• Lead the ASIC Power execution from architecture stages until tape-out.
• Post-Silicon Power Activities: Monitor and support chip Power from power-on and bring-up, quality phases, to mass production.
• Power Execution Plans: Define and implement Power execution plans in collaboration with cross-discipline leaders.

Requirements:

• BS or MS in Computer or Electrical Engineering or equivalent experience.
• 15+ overall years of proven experience in chip design.
• 8+ years of experience in VLSI / chip design, leading teams of at least 8 direct reports.
• High system view with ability to collaborate with multiple interfaces.
• Strong analytical and problem-solving skills.
• Excellent communication and teamwork abilities.
• Experience in ASIC power optimization, ASIC power modelling, thermal, reliability, Power Integrity, Package and Board design is a plus.

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In this role, you will lead a team that provides infrastructure platforms and hands-on engineering support for internal customers across firmware, driver, hardware, software, and verification organizations. The position combines deep technical leadership with people management, execution ownership, customer support, and operational excellence in a fast-paced R&D environment.

Responsibilities:

• Lead and grow an infrastructure engineering team responsible for bare-metal provisioning, VM infrastructure, server fleet automation, CI/CD infrastructure, customer-facing debug support, and high-performance networking environments.
• Own the team's technical roadmap, priorities, execution plans, and delivery commitments across multiple infrastructure initiatives, while balancing long-term platform improvements with day-to-day customer needs.
• Drive ownership of VM box inventory and lifecycle management across many Linux distributions.
• Build infrastructure capabilities that enable engineering and verification teams to run provisioning, testing, validation, and debug workflows efficiently and reliably.
• Lead customer support, debug, and optimization of internal customer flows.
• Guide complex system debug and recovery in a firmware R&D environment.
• Provide technical leadership for Linux-based automation platforms.
• Partner closely with firmware, driver, hardware, software, cloud, and verification teams to define requirements and deliver infrastructure solutions.

Requirements:

• B.Sc. in Computer Engineering, Computer Science, Electrical Engineering, or a related technical field, or equivalent experience.
• 8+ overall years of experience in Linux systems administration, infrastructure automation, DevOps, system software, firmware infrastructure, lab infrastructure, or related engineering domains.
• 3+ years of experience leading or managing engineering teams, technical projects, or cross-functional infrastructure initiatives.
• Strong technical background in Linux environments.
• Hands-on experience designing, implementing, and debugging automation software using Python, scripting, CI/CD workflows, and modern software development practices.
• Experience managing infrastructure across multiple Linux distributions.
• Proven ability to support internal customers in complex technical environments.
• Strong people leadership skills.

Benefits:

• Competitive salaries
• Generous benefits package

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You will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the world's most advanced data centers. You will enjoy working in a meaningful, growing environment where you make a huge impact in a technology-focused company.

Responsibilities:

• Full-Chip Verification & Execution: Own system-level features by defining verification plans and driving the end-to-end execution.
• System-Level Debug & Analysis: Gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance.
• Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the NIC.
• AI-Enhanced Development: Accelerate development by leveraging cutting-edge AI coding tools and frameworks.

Requirements:

• Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
• 3-5 years of experience in Verification or HW simulation.
• Strong debugging, problem-solving and analytical skills.
• Innovation Mindset - a proactive approach to adopting new methodologies and coding tools to solve complex challenges.
• A team player with good communication and interpersonal skills.

Nice to Have:

• Prior verification experience of SoC.
• Knowledge in network flows and protocols.

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The group builds mission-critical tools used worldwide by leading technology companies and open-source communities to configure, manage, and debug NVIDIA's cutting-edge networking hardware,the infrastructure powering NVIDIA AI supercomputers.

In this role, you will manage and develop a team of talented engineers while remaining closely connected to the technology. Working with the group's leadership and peer managers, you will guide detailed software design and drive the delivery of reliable, scalable, cross-platform solutions in a fast-paced and highly collaborative environment.

Responsibilities:

• Lead, mentor, and grow a high-performing software development team, including hiring, onboarding, performance management, feedback, and career development.
• Own the team's priorities and execution within the group roadmap, driving projects from provided system architecture and requirements through detailed software design, implementation, testing, deployment, and maintenance.
• Provide technical and design leadership for high-performance C++ and Python management tools that interact with NVIDIA networking devices across Linux and Windows.
• Drive engineering excellence through design and code reviews, automation, testing, release practices, quality standards, and the effective adoption of AI-assisted development tools.
• Collaborate with the group's leadership, peer teams, hardware, firmware, QA, product, and program-management partners to manage dependencies, resolve risks, and deliver cross-functional initiatives.

Requirements:

• BSc or MSc in Computer Science, Computer Engineering, or a related field, or equivalent practical experience.
• 8+ overall years of hands-on software development experience building complex, production-quality software, with strong proficiency in C++, Python, object-oriented design, Linux, Git, debugging, and modern development practices.
• 3+ years of software engineering management experience, including responsibility for people development, performance management, and successful project delivery.
• Proven ability to translate system architecture and ambiguous requirements into detailed software designs and actionable execution plans while managing priorities, risks, dependencies, and delivery.
• Excellent leadership and communication skills, with a proactive and collaborative approach and the ability to influence stakeholders across teams and organizational levels.

Nice to Have:

• Experience developing software for networking devices, embedded systems, hardware-management tools, or data-center infrastructure.
• Knowledge of networking technologies, device configuration, telemetry, diagnostics, or hardware-debugging workflows.
• Experience leading the development of cross-platform software for Linux and Windows.
• Experience managing geographically distributed teams and contributing to large cross-organizational programs.
• Demonstrated success improving engineering productivity, development processes, automation, or AI-assisted software development workflows.

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Key Responsibilities:

• Foster quality, automation, and scalability
• Oversee development and optimization of APIs, tools, and libraries, and maintain OS verification infrastructure
• Enhance automation workflows for rapid and reliable SDK releases and drive CI/CD pipeline evolution
• Collaborate with hardware, firmware, DevOps, and software teams
• Align on verification methodologies and infrastructure improvements
• Guide design reviews and architecture discussions, defining best practices for verification excellence

Requirements:

• B.Sc. or higher in Computer Science, Software, Electrical Engineering, or similar
• 3+ years of experience in software development or verification
• Strong Python coding skills
• Experience with large-scale verification or automation frameworks
• Strong networking background (L2/L3)
• Solid Linux knowledge
• Proficiency with CI/CD & DevOps tools (Jenkins, Git, Gerrit, Docker)
• Excellent communication and organization skills, with the ability to align multiple teams and deliver results

Preferred Qualifications:

• Background in scalable or distributed systems
• Experience with multi-node testing or performance validation
• Strong debugging skills, especially for concurrency issues
• Deep understanding of networking and system architecture

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You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.

Key responsibilities include:

• Working closely with block owners and full Chip STA engineers to ensure high-quality and timely convergence
• Creating unique and creative solutions to physical design problems
• Participating in and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects

Requirements:

• B.Sc./M.Sc. in Electrical Engineering/Computer Engineering (or equivalent experience)
• 2+ years of full-time relevant experience in Physical Design, STA, and Timing closure methodologies
• Proven experience with industry-standard tools like PrimeTime (STA) and PrimePower (Power Estimation)
• Self-motivation, attention to detail, and good written, verbal, and presentation skills
• Strong sense of ownership, self-learning skills, and ability to work independently and collaboratively

Preferred qualifications:

• Experience in Signoff domains: STA (PrimeTime), Power Estimation (PrimePower), Power Integrity (RedHawk), Formal eq. (Formality), Backend CAD
• Knowledge in Tcl/Perl/Python

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Responsibilities:

• IC Test definition & development
• Write, execute and debug FW code
• Manage Failure Analysis of field and production failures
• Provide DFT recommendations to the design teams
• Build expertise on production of network products

Requirements:

• B.Sc. degree in Electrical/Computer engineering, Computer Science or equivalent experience
• 5+ years of experience with IC test development
• Good communication skills with diverse teams and functional groups
• Multi-tasking capabilities
• High self-learning skills
• High execution quality standards
• An innovative approach to problem solution

Preferred Qualifications:

• Experience with UltraFlex or/and other IC testers
• C/C++ Experience
• Serdes/PCIe specification / testing knowledge

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Responsibilities:

• Handle various types of testing of Nvidia ICs.
• Perform IC testing to produce reliable and precise data to support IC devices analysis.
• Maintain and operate laboratory equipment such as IC evaluation systems, HTOL system, Scopes, DVMs, and other tooling.
• Read schematics of electronic circuits.
• Support related activities such as IQC, OQC, IC Inventory management, and shipments.
• Carry out Q&R tasks and follow strict execution methodologies.
• Follow and ensure strict safety procedures and safety checks.

Requirements:

• 3+ years of Electronic Practical Engineer experience.
• High School diploma or equivalent experience.
• Knowledge of operating laboratory equipment such as Scopes, DVM.
• Self-learner, independent, motivated, and reliable person.
• Excellent interpersonal skills.
• Highly organized, flexible, and has a Can-Do approach to handle constantly evolving and fast-paced environment.
• Basic knowledge in Networking, computers & operating systems.
• Knowledge of SW programming (C++, Perl, Linux, Python…).
• Good English skills – written & verbal.
• High-quality execution of tasks in a high level of integrity.

Preferred qualifications:

• Knowledge of ATE, SVB, and SLT operations.
• Understanding of electronic circuits.
• Proven understanding of Automated Test Equipment (IC testers, System Level test, and reliability equipment).

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As a Senior PCB Layout Engineer, you will work closely with board design engineers to perform PCB layout of high-speed/high-density value-conscious PCBs for the product engineering unit at NVIDIA, using Cadence PCB design tools Allegro 22.1 and Capture.

Responsibilities:

• Perform complete development of PCB layout, floor planning and detailed component placement, and constraint management, with a concept of topology and signal/trace integrity
• Generate artwork files, ODB++, test reports, and electronic PCB documentation
• Ensure designs follow SI constraints
• Respond to PCB manufacturer EQ/TQ
• Review Gerber/ODB++ files
• Create PCB footprint

Requirements:

• Practical Electrical Engineer, or BSc in Electrical Engineering
• 5+ years of experience in high-speed PCB design
• Knowledge of PCB design and consideration for layout, routing, and timing constraints, DFM, DFA
• Deep understanding of High-Density Interconnect PCB layout and PCB Signal Integrity
• Proven ability to work with a team while taking personal responsibility for your own contributions
• Agility in changing focus as the needs of our effort evolve
• Excellent interpersonal and communication skills

Nice to have:

• Experience in 8GHz+ range PCB design using back-drilling stacked/stager uVIA technology with minimum laminations
• Building complex multi-layer HDI PCBs for very dense placement and routing
• DFT constraints in volume manufacturing

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Responsibilities:

• Learn and understand the NIC microarchitecture thoroughly across all aspects
• Define the next-generation NVIDIA systems with GPU and CPU teams
• Balance architecture requirements with backend, execution, and design considerations for sophisticated features
• Understand system requirements and help define the POR of our NIC and DPU product line
• Address Full-Chip correctness and performance issues requiring cross-unit understanding
• Collaborate with board and package design on design limitations
• Understand SoC flows, PCIe, Ethernet, InfiniBand, and NvLink protocols

Requirements:

• B.Sc./M.Sc in Electrical Engineering from a reputable university
• Excellent grades
• 5+ years of experience in ASIC design/uarch/arch/performance
• 4+ years of hands-on experience with Verilog/VHDL
• Strong analytic capabilities, problem-solving skills, and communication skills

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As a Senior QA Specialist in this group, you will own the quality of the frameworks, core libraries, and tools our developers build, ensuring they are stable, reliable, and production ready.

Responsibilities

• Define and own QA strategy, test plans, and quality standards for testing platforms, essential libraries, and utilities.
• Build and maintain automated test pipelines; integrate quality gates into CI/CD workflows.
• Maintain regression suites that catch breakages as frameworks evolve.
• Develop test fixtures, mocks, and simulators for testing code in isolation.
• Track quality metrics and generate summary reports of testing activities.
• Collaborate with teams across ITPE including NPI, MP, data intelligence, and R&D.

Requirements

• B.Sc. in Computer Science, Software Engineering, or a related field, with equivalent experience also considered.
• At least 8 years of proven experience in software QA/SDET roles.
• Strong C# programming skills.
• Deep experience with test automation frameworks (unit test, mock, etc.).
• Hands-on experience with CI/CD pipelines and automated quality gates.
• Familiarity with QA methodologies, test design, bug prioritization, and SW release workflows.
• Clear verbal and written communication in English.

Nice to Have

• Experience in networking or semiconductor domain.
• Experience testing data pipelines, CLI tools, or web-based dashboards.
• Background in TDD/BDD methodologies.
• Knowledge of Linux/Windows OS.

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You will own and drive cybersecurity standards across production environments and testing lifecycles, spanning networking product lines manufactured at internal and contract manufacturing sites.

Responsibilities:

• Implement, automate, and maintain a robust and secure PKI infrastructure; build secure Key Provisioning and Code Signing workflows within ATE pipelines.
• Own lifecycle management of digital certificates and cryptographic identities across all product families (LinkX, switches, NICs).
• Partner with test developers to harden the Test Engineer Datapath, preventing data tampering or leakage.
• Implement security baselines, endpoint protection, and AD Privilege Management across test stations and MES systems.
• Define, enforce, and audit security policies across all internal and external production sites (Contract Manufacturers).
• Implement network segmentation between corporate IT, engineering networks, and the manufacturing floor.
• Own recurring security syncs and present security status updates to ITPE leadership.

Requirements:

• B.Sc. in Computer Science, Electronic/Electrical Engineering, Cybersecurity, or equivalent experience.
• At least 5 years of hands-on experience in a technical cybersecurity role (Infrastructure Security, OT/Industrial Security).
• Strong practical understanding of PKI, digital certificates, encryption, TLS, and key management.
• Experience with factory production flows, ATE data paths, or hardware production pipelines.
• Hands-on experience with network segmentation, OS hardening (Windows/Linux), and secure access controls.
• Proven track record of driving security projects end-to-end in sophisticated environments.
• Ability to enforce compliance standards across third-party manufacturing sites.
• Clear verbal and written communication in English.
• Self-reliant, proactive, and highly motivated.

Preferred Qualifications:

• Certifications: GICSP, CISSP, or specialized PKI/Crypto certifications.
• Scripting skills (Python, Bash, PowerShell) for security automation.
• Familiarity with OT/ICS security frameworks (NIST 800-82, IEC 62443).
• Experience in PE, chip validation, or manufacturing test environments.
• Familiarity with NVIDIA’s product security lifecycle or similar silicon vendor environment.

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Responsibilities

• Define and develop characterization and validation techniques for post-silicon bring up and production test, spanning electrical, functional, and performance characterization.
• Work in close coordination with test engineering, yield, NPI, FW and other teams, leading methodology planning for future products and serving as the synchronization point between our Israel and US-based teams.
• Drive alignment on tooling, flows, and coverage requirements ahead of tape-out and first silicon.
• Translate product requirements and silicon behavior into structured characterization plans with clear coverage targets, risk areas, and data collection strategies.
• Lead methodology transfer into execution , working with team managers to ensure tooling, methods, and engineers are in place for a smooth handoff.
• Identify methodology gaps early in the program cycle and resolve them through cross-functional collaboration.

Requirements

• B.Sc. in Electrical Engineering (or equivalent experience).
• 8+ years of experience with IC silicon characterization, validation, product engineering, test engineering, or system integration.
• Ability to work in a fast-paced, multifaceted work environment with a focus on technical excellence, innovative thinking, and strong analytical skills.
• Ability to self-manage, show leadership, and possess good social skills.
• Deep hands-on engineering background , this role leads, but is encouraged to be technically authoritative and roll up sleeves when needed.
• Strong cross-functional communication skills; comfortable aligning with US-based teams across time zones and organizational boundaries.

Nice to Have

• Programming and data analysis experience.
• Understanding of BE procedures and knowledge of power terminology and measurement methods.
• Power management characterization and reliability & validation engineering experience.

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Responsibilities:

• Simulation Infrastructure & Acceleration: Identify bottlenecks in the verification flow and develop creative solutions, including building frameworks, optimizing regressions, and accelerating simulation throughput.
• Multi-Language Development: Work with a diverse technology stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting), writing code and solving problems across various layers.
• System-Level Debug & Analysis: Understand chip micro-architecture and features, investigate and resolve cross-block issues to ensure feature correctness and compliance.
• AI-Enhanced Development: Leverage cutting-edge AI coding tools and frameworks for verification and infrastructure challenges.
• Cross-Team Collaboration: Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware, and all units inside the NIC.

Requirements:

• B.Sc. in Electrical Engineering or Computer Engineering with high scores or equivalent experience.
• 8+ years of experience in verification, HW simulation, or infrastructure development for silicon projects.
• Proven ability to enhance and scale verification systems, including regression frameworks, simulation performance, tooling, and flow automation.
• Creativity, proactivity, and innovation mindset with a proactive approach to adopting new methodologies and coding tools.
• Strong debugging, problem-solving, and analytical skills.
• Good communication and interpersonal skills.

Preferred Qualifications:

• Experience with AI tools for verification automation or infrastructure acceleration.
• Experience working in multi-language environments.

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You’ll be part of a forward-thinking team dedicated to advancing the tools and frameworks that are used to develop the cutting-edge networking adapter technologies.

Your role will be to drive the success of NVIDIA's current and upcoming networking devices by working across various platforms, including C++ object-oriented simulation, verification frameworks and C layer interfacing hardware and firmware.

Responsibilities

• Develop a network adapter simulator that will be used for both development and testing of pre-silicon networking features
• Take part in implementing and assimilating frameworks for Design and Verification both for real-time and simulator environments
• Addressing and solving automation and performance challenges
• Collaborate with chip design, software, and architecture teams to define and craft legacy and new firmware flows

Requirements

• B.Sc./M.Sc. in Computer Science or Computer Engineering
• 5+ years of proven experience with verification and testing methodologies
• Good understanding of the Linux operating system and computer structure
• Solid knowledge in C++ and Object-Oriented Programming
• Strong multi-disciplinary capabilities and ability to work with wide entities – chip design, verification, FW, SW, and architecture
• Ability to lead feature development and take full ownership of tasks from A to Z
• Outstanding teammate, strong interpersonal skills, and self-learning ability

Nice to Have

• Experience in simulator development for real-time systems
• Background in Embedded C programming
• Knowledge in networking protocols and scripting languages
• Strong interests towards groundbreaking technologies and ability to take initiatives and drive them across multiple functional teams

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What you'll be doing:

• Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
• Work on a variety of challenging designs, including high cell count and HS blocks, resolving complex timing and congestion problems.
• Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
• Take part in inflow development.

What we need to see:

• B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.
• 2+ years of relevant experience.
• Proven experience in RTL2GDS flows and methodologies.
• Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
• Deep understanding of all aspects of Physical construction and Integration.
• Knowledge in Physical Design Verification methodology LVS/DRC.
• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
• Great teammate.

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The selected candidate will work as part of a multi-disciplinary team, supporting the development of future components and systems, for current and next generations.

Responsibilities:

• Take part in research and development of next-generation electro-optical devices and EO sub-systems for high-speed communication.
• Tasks include electrical specification of EO sub-systems and evaluation boards, schematic design, component selection and characterization, layout considerations and implementation, Fabrication and Assembly guidance.
• Hands-on development and testing within Data Center interconnect lab environment.

Requirements:

• B.Sc./M.S.c in Electrical Engineering or Practical Engineer certificate or equivalent experience.
• 10+ years experience with electro-optical and High-Speed Board Design.
• Strong background in high-frequency and broadband (>20GHz) design.
• Strong system-level understanding.
• Background in thermal and mechanical design considerations.
• Good SI/PI understanding in perspective of multi-layer PCB design.
• Experience in electro-optical and High-Speed lab environment – High-end measurements.
• Knowledge of electro-optical components: Drivers, CDR, Gearbox, DSP, Lasers, Detectors, Amplifiers…etc.
• Strong abilities to work as part of a team. Highly motivated.

Preferred Qualifications:

• Design and knowledge with Data-Center environment [Switches/CPU/DPU/GPU].
• Experience in layout extraction and board-level simulation.
• Knowledge with board-design tools (Cadence environment).
• Familiar with NRZ/PAM-4 signaling schemes as well as familiar with various communication protocols: SPI, I2C, SerDes, PCIe, Ethernet.
• Previous experience as a technician/Practical Engineer at IDF technology units.

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We are seeking a Senior System Management Architect to join our growing team. You will be the resident expert for system management, ensuring that AI factory management components operate in perfect unison.

Responsibilities:

• System Architecture & Flow Definition: Define and document comprehensive production, provisioning, update, recovery, and reset flows for AI factory sub-systems.
• Ensure system-level architectural alignment and orchestrate seamless coordination between all the AI-Factory building blocks.
• Protocol Implementation & Guidance: Specify the use of standard management protocols across sub-system interfaces to implement the management tasks.
• Hardware/Software Intersect: Define system-level hardware and software behavior, including CPLD logic requirements, power-sequencing dependencies, and reset orchestration.
• Interface Management: Architect intra-board communication pathways using PCIe, I2C/I3C, USB, and SPI, ensuring robust out-of-band and in-band management connectivity.
• Cross-Functional Leadership: Collaborate with Production, Hardware and Firmware Engineering, ASIC FW/Driver teams, SW/NOS teams and QA to translate architectural specifications into implementable, testable solutions.
• Technical Documentation: Author rigorous technical specifications, test plans, and architectural design documents to guide development and factory production.

Requirements:

• Deep System-Level Perspective: Proven ability to understand complex computing or networking systems top-to-bottom, with a background in networking architectures and efficiency and power saving methods.
• Protocol Fluency: Strong working knowledge of modern platform management and security protocols.
• Hardware Interface Knowledge: Familiarity with board-level communication buses and system interconnects.
• Analytical Documentation Skills: Exceptional ability to write clear, unambiguous technical specifications, state-machine descriptions, and sequence diagrams.
• Experience: BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 5+ years of relevant industry experience.

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In this role, you will help build and evolve systems that support performance analysis, telemetry, and optimisation for large-scale GPU- and CPU-based clusters used in AI and high-performance computing environments.

Responsibilities:

• Profile, benchmark, and analyse AI and HPC workloads on GPU and CPU clusters
• Explore performance characteristics of high-performance networking and collective communications (e.g., NCCL, RDMA, MPI, RoCE)
• Identify performance bottlenecks across networking, compute, memory, and system architecture
• Develop and enhance performance analysis, benchmarking, and diagnostic tools
• Define performance test plans and establish expectations for new technologies and platforms
• Collaborate across hardware, firmware, networking, systems, and software teams to provide actionable performance insights
• Support telemetry collection and data refinement efforts to enable accurate performance analysis
• Maintain high standards for data quality, reproducibility, and traceability of performance results

Requirements:

• B.Sc. or M.Sc. in Computer Science, Computer Engineering, Software Engineering, or equivalent experience
• 5+ years of experience in performance analysis, systems engineering, or HPC/AI infrastructure
• Demonstrated expertise in performance analysis skills and methodologies
• Hands-on experience with high-performance networking (RDMA, MPI, NCCL, congestion control)
• Strong understanding of system performance metrics (latency, throughput, resource utilisation)
• Exposure to hardware, firmware, or embedded telemetry environments
• Strong analytical, problem-solving, and communication skills
• Ability to work effectively in cross-functional, fast-paced R&D teams

Preferred Qualifications:

• Knowledge of CUDA, NCCL internals, and congestion control algorithms
• Deep system-level understanding of CPU architectures, GPUs, HCAs, memory, and PCIe
• Experience with NVIDIA GPUs, CUDA, and deep learning frameworks such as PyTorch or TensorFlow
• Experience with cloud platforms
• Proficiency in Python; experience with Bash and C/C++ is a plus as well as a strong experience working in Linux environments

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As a Senior Software Engineer in the DOCA verification team, you will play a key role in designing and developing the verification infrastructure for the NVIDIA DOCA™ SDK. This infrastructure is a complex system that executes thousands of tests every night across multiple hardware platforms and configurations. It includes mechanisms for error handling and fault recovery, while test results are stored, analyzed using advanced tools, and presented through live dashboards and reports.

Requirements:

• Bachelor's or Master's degree in Computer Science, Software Engineering, or a related field.
• 5+ years of experience as a software engineer,
• Proficiency in programming languages such as Python, Java, or similar.
• Deep understanding of software development methodologies and engineering best practices.
• Excellent problem solving skills and the ability to address complex technical challenges.
• Strong communication and collaboration skills, with the ability to work effectively in a team environment.
• Proven track record of delivering high quality work on time and meeting project deadlines.

Nice to have:

• Expert level knowledge of the Python programming language.
• Experience with Kubernetes networking.
• Strong knowledge of the Linux operating system.

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As a Senior Networking Electrical Validation Engineer, you will play a crucial role in ensuring the quality of advanced products. Your responsibilities will include:

• Creating and implementing electrical validation plans for new products
• Analyzing and interpreting validation results to identify potential issues
• Collaborating with design and architecture teams to define required validation and optimize and solve electrical issues
• Designing and developing test scripts and frameworks to automate validation processes
• Working closely with software and firmware teams to ensure seamless integration
• Providing technical expertise and guidance to junior team members
• Maintaining accurate documentation of validation activities and results

To be considered for this role, you will need:

• A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience
• 5+ years of proven experience in electrical validation
• Ability to analyze analog circuits and analog issues
• Familiarity with I/O protocol and electrical compliance and validation
• Proficiency in scripting languages such as Python, Perl, or Shell
• Excellent problem-solving and analytical skills
• Ability to work collaboratively in a fast-paced and dynamic environment
• Exceptional communication and interpersonal skills
• Fluency in English

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In this role, you will be responsible for developing, validating, and supporting digital test content for NVIDIA's advanced Network Silicon ICs (Switches, NICs, SmartNICs). You will work closely with DFT, design, and test engineering teams to ensure high-quality and scalable test content from wafer to final product.

Responsibilities:

• Develop ATPG, LBIST, and MBIST content based on DFT architecture
• Run validation flows (simulation/emulation/silicon), analyze failures, and debug pattern issues
• Collaborate with DFT teams to ensure alignment between test logic and content implementation
• Support test program bring-up and pattern integration on production testers
• Continuously improve coverage, pattern quality, and pattern generation efficiency
• Work with product and test engineering to support yield improvement and debug activities

Requirements:

• B.Sc. in Electrical Engineering
• Strong understanding of scan, ATPG, BIST (MBIST/LBIST), and DFT concepts
• 3 years of experience in digital test content development or related roles
• Scripting skills (Python/TCL/Perl) – an advantage
• Strong analytical and debug skills, independent and detail-oriented

Preferred Qualifications:

• Familiarity with ATE test environments (e.g., UltraFlex)
• Experience with silicon validation and failure analysis
• Knowledge in STA, RTL simulation, or gate-level netlist analysis

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Responsibilities:

• Take an active part in development, integration, and verification with R&D

• Develop and maintain test automation frameworks and scripts using Python

• Identify, analyze, and report software defects, inconsistencies, and other quality issues

• Drive design verification flows and methodologies improvements

• Perform functional, integration, and regression of software applications and networking protocols

• Work with planning and tracking systems to manage the release progress and build release indicators

• Participate in code reviews, provide feedback, and suggest improvements to enhance the quality and maintainability of the software

• Continuously monitor and evaluate the effectiveness of test processes and methodologies, recommending improvements as necessary

• Stay up to date with industry best practices, new technologies, and emerging trends in software verification and QA

• Improve test coverage to ensure better product quality

Requirements:

• Bachelor's degree in computer science, Software Engineering, or a related field (or equivalent experience)

• Good background in designing, implementing, and debugging Software

• At least 5 years of experience in writing programs using Python

• Strong analytical and problem-solving skills, with the ability to troubleshoot and isolate software defects

• Ability to work effectively both independently and collaboratively within a team environment

• Strong attention to detail and a commitment to delivering high-quality software solutions

• Experience with CI methodology & tools (Git, Gerrit, Jenkins, etc.)

• Experience in Linux distributions (Centos/RedHat, Ubuntu, Fedora, SLES)

• Excellent written and verbal communication skills in English

Preferred Qualifications:

• Experience with network equipment (switches, Network Cards) and understanding of network protocols (e.g., IP, Ethernet)

• Background with Networking applications and protocols

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You will take part in leading a development team in our Firmware group while taking part hands-on with development activities.

The Firmware team develops cutting edge networking features for enabling the AI revolution, cloud, HPC and storage.

Responsibilities:

• Lead a group of engineers and provide technical guidance and career mentorship to the team.
• Work closely with the architecture and different software design teams.
• Implement new features in the core of NVIDIA NIC firmware in pre and post silicon environment.
• Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.
• Gain a deep understanding of system debug, networking technology and stacks, as well as the HW/FW/SW relationship.
• You will learn how a big software project is operated, maintained, qualified and released, and how Hardware and Firmware are developed.

Requirements:

• B.Sc. in Computer Science/ Software Engineering / Computer Engineering / Electrical Engineering
• 2+ years of managerial experience
• 6+ overall years of professional experience
• Strong C/C++ capabilities
• Excellent understanding of data structures and algorithm fundamentals
• Strong analytical, debugging and problem-solving skills
• Motivated and independent with strong interpersonal skills

Preferred Qualifications:

• Knowledge of network protocols
• Real time programming
• Experience with Agile methods
• Working with Git, Gerrit, Jenkins, Docker

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The engineer will take ownership of networking products post-release, provide technical leadership for product availability and cost reduction, and resolve hardware-related quality issues.

Requirements include:

• B.Sc. in Electrical Engineering or equivalent experience
• 2+ years of board design experience in complex hardware projects
• Hands-on lab skills
• Multilayer PCB design background
• High current power delivery design experience
• Project management skills and excellent interpersonal relationships

Preferred qualifications:

• Experience in data-center switch products design for high-volume manufacturing
• High-speed design knowledge
• Embedded systems design experience
• Advanced PCB technology knowledge

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Through rapid prototyping and proof-of-concepts (POCs), we evaluate emerging technologies and transform innovative ideas into validated solutions.

Our projects are driven by where technology is heading,not by a single domain. While our current work focuses on AI infrastructure, distributed computing, and modern data centers, our mission is to tackle the technologies that will matter next.

We investigate, prototype, and deliver solutions across a broad spectrum of areas, including HPC, cloud infrastructure, storage, networking, virtualization, and more.

Our engineers work across the entire software stack,from user-space applications and middleware to Linux kernel networking, device drivers, firmware, and GPU programming.

Together with teams across NVIDIA, strategic customers, industry partners, and the open-source community, we turn ambitious ideas into practical technologies with real-world impact.

What you’ll be doing:

• Design and implement solutions throughout all layers from high-level application, OS, and driver subsystem to firmware
• Work on impactful projects involving state-of-the-art high-performance computing hardware and software
• Provide insight and technical guidance and collaborate with peers from across the company - including software architecture, chip architecture, and engineering departments to improve our future technology
• Collaborate with NVIDIA partners and customers

What we need to see:

• B.Sc. in Computer Science, Electrical Engineering, or Computer Engineering
• 2+ overall years of industry experience
• Understanding of multi-core hardware, operating systems design, concurrency, virtual memory, caching, interrupts, device drivers, real-time
• Excellent programming skills
• Ability to learn complex concepts in a fast-paced environment
• A teammate with a can-do attitude, high energy, and excellent interpersonal skills

Ways to stand out from a crowd:

• Familiarity with networking protocols
• Familiarity with RDMA
• Experience with open-source projects (coursework, personal, or contributions)
• Working in a fast-paced and dynamic environment

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In this role, you will lead a team of engineers who measure, analyze, and improve NIC, host, DOCA networking stack, and system-level performance across NVIDIA networking products and platforms.

What You'll Be Doing

• Lead, coach, and develop a team focused on NIC, host, DOCA networking stack, and system-level performance. You will define performance test plans, methodologies, metrics, and success criteria for new NVIDIA networking technologies.
• Guide pre-silicon and post-silicon performance planning, analysis, reporting, and readiness reviews. Your team will benchmark and profile workloads across RDMA, RoCE, InfiniBand, Ethernet, MPI, NCCL, DOCA, storage, security, and host networking stacks.
• Identify bottlenecks across NIC, DPU, CPU, memory, PCIe, firmware, drivers, Linux networking, DOCA, and full-system architecture. We will look to you to lead root-cause analysis, coordinate mitigation plans, and help hardware, firmware, software, architecture, validation, and product teams align on performance goals.

What We Need To See

• B.Sc. or M.Sc. in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience.
• Experience in performance analysis, systems engineering, networking, or HPC/AI infrastructure.
• 10+ years of software engineering experience, including 4+ years in a leadership or management role.
• Experience with high-performance networking technologies such as RDMA, RoCE, InfiniBand, Ethernet, MPI or NCCL.
• Hands-on experience with system performance analysis, benchmarking, profiling, and root-cause analysis.
• Understanding of host architecture, including CPUs, memory hierarchy, NUMA, PCIe, Linux OS, drivers, firmware, and DPU/NIC interactions.
• Experience creating performance test plans for pre-silicon or post-silicon phases.
• Programming or scripting experience with Python and Bash; C/C++ experience is helpful.
• Ability to communicate technical findings clearly and work across engineering teams.

Ways To Stand Out from the Crowd

• Experience with NICs or DPU architecture, networking offloads, host datapath behavior, networking services, or DPU offloads.
• Experience with AI/HPC cluster performance, distributed training, inference workloads, collective communication libraries, telemetry pipelines, benchmark automation, CUDA, NCCL internals.
• Linux kernel networking, DPDK, OVS, storage acceleration, or security offloads can also help you succeed in this role.

We support our people with competitive compensation, health and wellness programs, financial benefits, time away from work, family support, learning opportunities, and resources that help employees do their best work. Benefits may vary by location, role, and eligibility.

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What you will be doing:

• Work closely with the architecture and different software design teams.
• Implement new features in the core of NVIDIA NIC firmware.
• Implement verifiers for advanced features in our advanced random Firmware testing environment.
• Gain a deep understanding of system debug, networking technology and stacks, as well as the HW/FW/SW relationship.
• You will learn how a big software project is operated, maintained, qualified and released, and how Hardware and Firmware are developed.

What we need to see:

• B.Sc. in Computer Science/Engineering or equivalent experience.
• 2+ years of experience in FW or embedded SW.
• Strong C/C++ capabilities.
• Excellent understanding of data structures and algorithms fundamentals.
• Strong analytical, debugging and problem solving skills.

Ways to stand out from the crowd:

• Knowledge of network protocols.
• Prior verification experience.
• Real time programming.
• Knowledge in storage protocols as well as experience with Agile methods.

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The role is cross-disciplinary, collaborating with hardware and software teams across the wider NVIDIA. You will solve complex problems, develop innovative solutions, and be instrumental in determining the architecture of our next-generation networking solutions.

Responsibilities:

• Define the Network Adapter chip architecture end-to-end from market requirements through design and all product life cycles.
• Collaborate with teams across physical design, logic design, system software, firmware, and applications.
• Develop cycle-accurate simulation components to evaluate and analyze micro-architecture and architectural options.
• Explore innovative ideas to improve and optimize our chip systems' performance.
• Serve as a focal point within the organization and distribute the knowledge you acquire.

Requirements:

• BSc/MSc in Electrical Engineering, Computer Science from a recognized university.
• Experience in developing simulation models.
• 4+ years of experience in a relevant role as chip architecture or system integration.
• Knowledge and understanding of computing and networking systems.
• Strong debug skills.
• A can-do attitude and high energy with leadership and excellent interpersonal skills.
• Utmost passion for attention to detail in design and a high focus on design quality.

Preferred Qualifications:

• Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking.
• Master's degree in Electrical Engineering, Computer Science, or a related technical field.
• 5+ years of relevant practical experience.
• Experience with network simulation tools (Omnet, NS3, SST, Gem5).

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The role involves:

• Full responsibility for electrical specification, schematic design, components selection and layout considerations
• Extensive lab bring-up and debugging until the testing platform efficiently implemented in the Production floor
• Work with multiple R&D and Production groups: Mechanics, Signal Integrity, Layout, DFT, Firmware and Testing
• Work with the most advantage ATE product in the market - UF Tester & Prober - wafer sort products

Requirements:

• B.Sc. in Electrical Engineering
• 3+ years of experience as a Board Design Engineer
• Experience with Digital circuits, Power and High-speed design
• Project Management skills
• Advantages: system-level understanding and familiarity with production environment - Wafer sort and final test
• Personal skills: Self-instruction, Multi-disciplined, Multi-Tasking and good interpersonal relationship

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The role involves defining the Network Adapter chip architecture end-to-end, from market requirements through design and all product life cycles. The ideal candidate will collaborate with teams across physical design, logic design, system software, firmware, and applications.

Key responsibilities include:

• Defining the Network Adapter chip architecture
• Collaborating with cross-functional teams
• Working on proof of concepts and advance development projects
• Performing research and analysis for current and future architectures
• Crafting product design specifications
• Serving as a focal point within the organization and distributing acquired knowledge

Requirements:

• BSc or MSc in electrical engineering or equivalent experience
• 4+ years of experience in a relevant role as chip architecture or system integration
• Deep understanding of building and integrating systems with various technology components
• Knowledge of computing and networking systems
• A can-do attitude and high energy with leadership and excellent interpersonal skills
• Utmost passion for attention to details in design and a high focus on design quality

Preferred qualifications:

• Experience and love for system architecture, CPU/GPU/Memory/Storage/Networking

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Key Responsibilities:

• Define the roadmap for AI-driven architecture flows, including data collection, modelling, and micro-architecture agents.
• Collaborate with architects to address tough problems and develop agentic flows to shorten the time to a good solution.
• Partner with the AI engineering team to translate architecture workflows into production agents, MCP integrations, and eval harnesses.
• Act as the technical authority on AI architecture work, recognizing excellent architecture output and verifying AI-assisted flows.
• Drive adoption of tools and methods across the organization.

Requirements:

• B.A, M.Sc. or Ph.D. in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience.
• 6+ years in hardware, firmware, or system architecture , NIC, switch, DPU, CPU, or SoC.
• Ability to understand and adopt agentic AI workflows and tools (Claude/Codex/Cursor).
• Strong interpersonal skills and a track record of driving adoption of new tools or processes.

Nice to Have:

• Hands-on experience applying LLMs, agents, or prompt-plus-code pipelines to real engineering work.
• Expertise with high-speed networking silicon , InfiniBand, Ethernet, switch fabric architecture, NIC/RDMA subsystems.
• Familiarity with LLMs: transformer architecture and LLM training/inference parallelism.
• Background defining and measuring engineering productivity metrics.

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You will be responsible for driving the team's technical direction, supporting the evaluation of data and control paths for new features, and ensuring high-quality deliverables that meet the expectations of industry-leading customers. As a leader, you will mentor and grow a team of engineers, foster a culture of ownership and execution, and collaborate closely with NVIDIA's networking NIC FW teams.

Responsibilities:

• Lead and drive team execution end-to-end, combining managerial ownership with hands-on technical contribution, including ownership of the verification testing domain, its flows, coverage, and the regression cycle.
• Develop deep expertise in NVIDIA technologies, with a strong focus on FW functionality with corresponding interfaces with HW and SW.
• Drive team execution by setting clear priorities, removing blockers, and ensuring high-quality, timely delivery, while maintaining a high bar for technical excellence and clearly communicating priorities, trade-offs, and status to stakeholders.
• Define and continuously improve testing methodologies, including leading retrospectives for missed bugs to identify gaps, driving actionable changes to test coverage, flows, and verifiers.
• Act as a technical leader within the team, contributing to design discussions, mentoring engineers, and actively participating in high-level design and code reviews.

Requirements:

• B.Sc. in Software Engineering, Computer Engineering, Electrical Engineering, or Computer Science.
• 3+ years of experience in an engineering management or team leadership role, with a strong hands-on technical background. 6+ overall years of experience as an engineer.
• Strong coding skills with deep understanding of OOP principles and software design.
• Ability to operate effectively in a fast-paced, dynamic environment, balancing execution with continuous improvement.
• Demonstrated leadership qualities , ownership, initiative, problem-solving mindset, and the ability to drive results independently and as part of a team. Excellent verbal and written communication skills in English, with the ability to clearly articulate priorities and align with stakeholders.

Nice to Have:

• Deep familiarity with C++.
• Familiarity with regression concepts, testing flows, and CI practices.
• Knowledge of Networking protocols.
• Working with Git, Gerrit, Jenkins, Docker.
• Experience in working in an agile approach.

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You will be part of a team developing next generation NIC and Switch simulation, works closely with other SW R&D teams and SW Architects.

Responsibilities:

• Design and develop advanced features simulating our world class Switches
• Develop solutions using advanced virtualization technology
• Write clean, efficient and maintainable code
• Collaborate with team members, SW R&D, Architects, Chip Design and FW

Requirements:

• B.Sc. degree or equivalent experience in Computer Science / Software Engineering
• 5+ years of experience
• Proficient knowledge and experience in C/C++
• Strong design, coding, analytical, debugging and problem-solving skills
• Full ownership & end-to-end responsibility
• Excellent social and written communication skills

Nice to Have:

• Can do attitude, independency and agility
• Ability to quickly adapt to new technology and go deep into new areas
• Understanding of Networking Protocols – Ethernet, InfiniBand is an advantage
• Knowledge of Virtualization, especially with KVM/QEMU is an advantage
• Knowledge of Linux/Windows kernel and drivers development is an advantage

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As a Mechanical Engineer at NVIDIA Networking division, you will drive multiple early design concepts while working in fast-paced product development cycles. You will independently lead product design from concept, through detailed design, and support it during Qualification, NPI and MP stages. You will also join task forces to investigate and support production excursions, failure analysis and reliability issues.

To succeed in this role, you will need a B.Sc. in Mechanical Engineering and 2+ years of experience in electro-mechanical product design, including PCB/PCBA design. You will also need excellent knowledge & experience with 3D software for mechanical design (Inventor/Creo) and knowledge with some of the following various production technologies: PCB design, Sheet metal, Electronic Liquid cooling, Metal die casting, Machining (Milling), Extrusion, Plastic injection molding.

You will be responsible for producing of manufacturing documentation (Drawing, Specs) and will have computers & software: PDP (Advantage), Office. You will be self-motivated with a sharp learning curve and able to manage multiple tasks while being very well organized. You will also have multi-disciplinary abilities, strong communication skills, English & Hebrew, written and verbal, and team player skills.

If you have skilled in working with supply chains, contract manufacturers, and leading resources such as consultants, component suppliers, contractors, and manufacturing partners, proficient in mechanical stress simulation tools, background in developing liquid cooled systems, familiar with IDF file exchange processes with Layout engineers, and expertise in designing PCIe and OCP3.0 standards compliant products, as well as implementing and training on new design and flow methodologies, then this could be the perfect opportunity for you.

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Responsibilities:

• Designing advanced thermal solutions for NVIDIA's next-generation products
• Working on a variety of challenging thermal designs
• Performing thermal simulation analyses

Requirements:

• B.Sc. or M.Sc. in Mechanical Engineering (preferably with an energy focus) or an equivalent degree/experience
• 3+ years of experience designing and developing thermal solutions for hardware components
• Strong fundamentals in thermodynamics, fluid mechanics, and heat transfer
• Strong solid understanding of FEA/CFD theory and heat transfer analysis tools, including expert proficiency in at least one thermal simulation software (e.g. IcePak, FloTHERM, Fluent)
• Excellent English

Preferred Qualifications:

• Experience in thermal modeling of PCB/boards and electronic components
• Wide knowledge of manufacturing processes and constraints
• Hands-on experience with thermal analysis workflows and design of experiments (DOE)
• Experience designing liquid-cooling thermal solutions

If you are a creative engineer who loves a challenge, come and be part of the best thermal team in the industry!

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The position includes taking ownership of characterization of IC performance and power parameters, developing new characterization and analysis capabilities, enabling the qualification of new and improvement of future products. You will define and build the required tests, perform the analysis and present the results and conclusions to a wide forum including leading designers and high-level executives.

We offer an exciting work environment, with many new learning experiences and interactions with people from different aspects of the company. Our company employs some of the best engineers in the communication field from all across the world, working on innovative technology and developing new and daring projects.

Key responsibilities:

• Take ownership of characterization of IC performance and power parameters
• Develop new characterization and analysis capabilities
• Enable the qualification of new and improvement of future products
• Define and build the required tests
• Perform the analysis and present the results and conclusions to a wide forum

Requirements:

• B.Sc. in Electrical Engineering/Materials Engineering/Physics (or equivalent experience) with 5+ years of experience
• Confirmed experience with data analysis/product engineering/FAB device engineering/Yield engineering
• Hands-on experience in analog and mixed-signal circuit characterization (e.g., PLLs, SerDes, ADCs/DACs, bandgap/reference circuits), including bench measurements and silicon debug
• Strong problem-solving abilities and out of the box thinking
• Work in a fast-paced, multifaceted work environment with a focus on technical excellence, innovative thinking and strong analytical skills are required
• Ability to self-manage, show leadership, and have good social skills

Preferred qualifications:

• Prior Semiconductor Test engineering/VLSI validation experience
• Hand on experience with scopes and lab equipment
• Programming & Data analysis experience
• Understanding of BE procedures and knowledge of power terminology and measurement methods
• Power management characterization and reliability & validation engineering experience

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This key position includes close interaction with HW, NPI, Thermal, Layout, Quality and Supply chain teams.

As a Senior Opto-Mechanical Failure Analysis Engineer, you will lead multidisciplinary investigations for advanced opto-mechanical and electro-mechanical products, including PCB/PCBA assemblies and complex system integrations.

Your responsibilities will include driving debug activities, performing hands-on root cause analysis on field returns, reliability failures, manufacturing defects, and system-level issues using analytical and laboratory techniques.

You will also work closely with Mechanical, Electrical, Signal Integrity, Thermal, Reliability, and Manufacturing Engineering teams to identify corrective and preventive actions.

In addition, you will perform and drive mechanical simulations of components and assemblies to support failure analysis, root cause investigations, and product design optimization.

Develop failure analysis methodologies, documentation standards, and best practices to improve product robustness and reliability.

Present technical findings and recommendations to cross-functional engineering and management teams.

Requirements:

• B.Sc. in Mechanical Engineering or higher, with 5+ years of experience in opto-mechanical and electro-mechanical product development, including PCB/PCBA design.

• Strong understanding of failure analysis methodologies, root cause investigation, reliability engineering principles, and physics-of-failure analysis.

• Hands-on experience debugging complex opto-electro-mechanical systems and identifying thermal, mechanical, assembly, manufacturing, and reliability-related failure mechanisms.

• Experience leading complex technical investigations, including DOE execution, 8D methodology, and preparation of detailed investigation and failure analysis reports.

• Strong background in mechanical simulations for components and assemblies as part of product design and failure analysis activities.

• Hands-on experience with laboratory and analytical tools such as microscopy, X-ray, CT scanning, thermal imaging, strain/stress measurements, and optical lab equipment in clean room environments.

• Knowledge of optical manufacturing processes, inspection methods, optical modules, fiber-optic interconnects, and multidisciplinary system integration.

• Excellent hands-on experience with 3D CAD tools; Creo is an advantage.

• Self-motivated team player with strong verbal and written communication skills in both English and Hebrew.

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The successful candidate will lead the engineering change process end-to-end, from change request initiation through full implementation in production. They will coordinate cross-functional activities among Engineering, Manufacturing, Quality, Procurement, Logistics, and additional stakeholders.

Responsibilities: Lead the engineering change process end-to-end, from change request initiation through full implementation in production. Coordinate cross-functional activities among Engineering, Manufacturing, Quality, Procurement, Logistics, and additional stakeholders. Responsible for procurement processes supporting the implementation of engineering changes in the production line. Work with project managers and engineers to ensure consistency with company strategy, commitments, and goals.

Requirements: B.Sc. in Industrial Engineering At least 5 years of experience in project management Excellent project management skills – familiar with project management methodologies in production Ability to lead cross functional teams and initiatives Good written and verbal communication skills in English Personal skills: Team player, independent, responsible, capable of multi-tasking, ability to drive people and tasks, leadership qualities, excellent communication skills

Preferred qualifications: Having experience in SW processes and backlog management experience Experience in production facing roles.

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We are looking for a Senior Software Technical Program Manager to lead software programs and projects at NVIDIA's Networking BU. The successful candidate will drive planning and execution of FW/SW projects while aligning with corporate priorities and constraints.

Responsibilities

• Manage the networking software programs for NVIDIA's next-generation AI Data centers
• Coordinate between all project stakeholders, including marketing, engineering teams in IL and around the world, operations, etc., from initial requirements definition through Architectural stage, execution, and delivery
• Develop and execute feature planning and prioritization of perception capabilities to meet the software programs' needs
• Identify risks, gaps, and bottlenecks in time and find resolution with technical leaders and project management
• Work with product managers, architects, and engineers to ensure consistency with company strategy, commitments, and goals

Requirements

• B.Sc. or M.Sc. in Computer Science, Electrical Engineering, or related field
• Expert with software project management methodologies and tools
• 8+ years experience in software project management or leadership
• Experience in software development over hardware/Silicon products
• Technical orientation, including the ability to conduct technical discussions
• Teammate, independent, responsible, capable of multi-tasking, ability to drive people and tasks
• Excellent verbal and written communication skills with English proficiency
• Ability and willingness to work in a dynamic environment and flexible hours, with teams all over the world

Nice to Have

• Experience with program management tools, preferred AI tools
• Networking background
• Experience in multiple groups coordination
• Familiarity with SW Agile concept

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The team delivers brand new, high-quality products to NVIDIA's customers, applying the following:

Development and deployment of automatic testers for NVIDIA’s network business units (Computing network adapters and High-speed switch systems) including hardware, software, and mechanics;

Coordinating and leading all aspects of the analysis of manufacturing data to identify and mitigate quality issues using advanced data analysis techniques such as machine learning, statistical tools, and AI;

Leading smooth production and capacity enlargement and failure analysis of return material from customers to understand the reason for failures;

Validating test performance and stability using QA (V&V – validation and verification) methods;

The TPL leads projects from requirement until end of life; Engineering manager for SPE projects and technical authority across SPE teams

Responsibilities:

Building integration plans, communicating status and priority among the teams (in/outside of SPE), assessing risks and developing mitigation plans;

Leading the project lifecycle in the SPE group, which starts at the requirements stage, through chip design and FW stages till SPE MP, including quality and yields improvement plans;

Responsible for bugs management prioritization and tracking and relevant knowledge transfer to the SPE group;

Working closely with development teams for environment improvements, such as automation, and driving mitigations to reduce risks;

Collaborating with PM for schedule tracking and modifications;

Evaluating new technologies and testing capabilities for improvement;

Working with the testing architecture team (DFT) to assure testing setups and coverage are met;

Engaging with a variety of teams: R&D, HW and SW, Chip design, Operations, thermal, signal integrity, FW and SW, layout, and more, Report project status for high level management

Requirements:

BSc, MSc Electrical/System Engineering;

Proven experience of 10+ years;

Hands on, Integration capabilities of self-task management, vast electronic knowledge, production, and testing process know-how;

Background in working with contract manufacturers and suppliers;

Supervising and tracking the progress of multi-functional and personal tasks;

Personal skills: proactive and self-instruction, good interpersonal relationship, multitasking, well organized, and a quick learner;

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This position offers the opportunity to have a real impact in a dynamic company, impacting data centers across the world.

Responsibilities:

Collaborate with skilled engineers to design and implement the DOCA SDK and infrastructure Take charge of end-to-end development for various features within DOCA Design and develop SDK libraries focusing on networking, storage, and high-performance computing solutions Partner with major companies to address real-world challenges that demand innovative solutions and a customer-centric approach

Requirements:

B.Sc in Computer Engineering, Computer Science, Electrical Engineering, or equivalent practical experience 8+ years of hands-on experience with the software development lifecycle, especially in performance-critical systems Strong programming skills in C/C++ Familiarity with Linux environments and associated tools Strong analytical, debugging, and problem-solving skills Excellent communication skills and teamwork abilities. Self-motivated and well organized. Experience with OOD/OOP

Desirable Qualifications:

Background in networking and low-level programming (C/C++) Experience with performance optimizations Experience in RT embedded development or driver development within a Linux environment Technical leadership skills Confirmed experience in solving customer issues

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This key position includes leading the product and fixtures design, close interaction with HW, PMC (Product management & configuration), NPI, Thermal, Layout, Quality and Supply chain groups.

NVIDIA Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of sectors including high performance computing, enterprise, data centers, cloud computing and Web 2.0.

What you will be doing:

• Drive multiple early design concepts while working in fast-paced product development cycles.
• Independently lead product design from concept, through detailed design, and support it during Qualification, NPI and MP stages.
• Join and lead task forces to investigate and support production excursions, failure analysis and reliability issues.
• Collaborate in research of groundbreaking technologies, materials, and processes with other groups to bring in creative ideas that solve ever growing needs.

What we need to see:

• B.Sc. in Mechanical Engineering or higher degree.
• 8+ years of experience in electro-mechanical product design, including PCB/PCBA design.
• Self-motivated with a sharp learning curve and able to work independently and as a teammate.
• Excellent hands-on experience with 3D CAD.
• Strong background in design of components for high-volume manufacturing technologies, such as: stamping, die casting, extrusion, and injection.
• Experience in developing fixtures/jigs for product assembly/testing.
• High awareness for quality and manufacturability, and understanding of statistical tolerance analysis techniques, CTF dimensioning, and geometric tolerancing.
• Experience in defining and executing DOE (design of experiment)
• Strong verbal and written communication skills in both English and Hebrew.

Ways to stand out from the crowd:

• Skilled in working with supply chains, contract manufacturers, and leading resources such as consultants, component suppliers, contractors, and manufacturing partners.
• Proficient in mechanical stress simulation tools.
• Background in developing liquid cooled systems.
• Familiar with IDF file exchange processes with Layout engineers.
• Expertise in designing PCIe and OCP3.0 standards compliant products, as well as implementing and training on new design and flow methodologies.

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As a STA Engineer, you will be responsible for DFT STA execution, from RTL driven constraints and definitions through DFT constraints quality assurance to STA sign-off.

You will be part of a unique team of experts who have deep understanding in all aspects of pre and post silicon.

You will be exposed and work on a variety of challenging designs, unique DFT solutions that require deep silicon implementation understanding.

Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.

Taking part in flows development.

Requirements:

• B.SC. in Electrical Engineering/Computer Engineering.

• 2-3 years of experience as STA engineer.

• Ability to quickly adapt to new technology and go deep into new areas.

• Strong communication skills.

• Great teammate.

• Drive new solutions based on any issues that arise.

Preferred qualifications:

• Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

• Knowledge in DFT flows such as ATPG, Mbist, Ijtag.

• Prior experience in DFT timing closures.

• Knowledge in CDC.

• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

If you are a creative and autonomous engineer who loves a challenge, come and be part of the best physical design team in the industry!

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You will play a key role in testing advanced networking features, building complex customer-like topologies, and ensuring NVIDIA products meet industry-leading benchmarks of performance, efficiency, and quality. You will collaborate closely with architects, software engineers, and hardware teams across NIC, HCA, switches, CPUs, and GPUs in a fast-paced and highly technical environment.

Responsibilities:

• Review architecture, build, and requirements for new networking features across Ethernet and InfiniBand portfolios
• Compose and build complex testbed topologies that emulate customer environments
• Implement, run, and optimize integration test plans including functional, regression, and performance testing
• Identify, reproduce, and debug issues; work closely with R&D to drive root cause analysis and resolution
• Collaborate with automation teams
• Analyze and optimize network performance, latency, and efficiency
• Provide clear status updates, reports, and insights on system quality and performance

Requirements:

• B.Sc. in Computer Science, Electrical Engineering, or related field (or equivalent experience)
• 8+ years of experience in networking, system validation, or related engineering roles
• Strong hands-on experience with Linux-based systems
• Deep understanding of networking protocols (TCP/IP, UDP, Ethernet, VLANs, L2/L3)
• Experience with routing, switching, and modern data center network architectures
• Strong troubleshooting, debugging, and analytical skills in distributed environments
• Experience with test methodologies (functional, regression, performance, scale)
• Scripting or programming experience (Python, Bash, etc.)
• Independent, fast learner with strong ownership and communication skills

Preferred qualifications:

• Experience with RDMA technologies (RoCE / InfiniBand)
• Knowledge of congestion control algorithms and performance tuning
• Familiarity with AI workloads and their networking requirements
• Experience with HPC environments and benchmarking tools
• Background with virtualization or container technologies (Kubernetes, KVM, etc.)

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You will take a significant part in the definition and development of tests from the development level to the final test of Network-Systems. You will utilize test suites to find, debug and resolve problems with production process. You will also support and fix bugs of existing code. Supporting production lines for: deployments, patches, maintenance.

Test Verification and Validation (both HW and SW). Troubleshooting and streamlining/optimizing our testing procedures.

To be successful in this role, you will need to have a BSc/MSc or equivalent engineering degree in Computer Science, Electrical Engineering, or a related field. You will also need to have 4+ years of related experience in software development and design. You will need to have excellent knowledge of a version control system (preferably GIT) and Linux based development.

You will need to have experience with Software/Hardware products integration and excellent communication skills with hands-on experience collaborating with global teams. You will need to have strong teamwork skills, with the ability to collaborate effectively across cross-functional teams.

Excellent programming, debugging, performance analysis, and test design skills. Familiarity with product manufacturing flows and processes. Exposure and knowledge around application development, configuration management and automation. Experience in tools/services development. Creativity – find solutions for challenging requirements.

Strong leadership skills to drive a project from definition through mass production.

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This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

Responsibilities:

As a member of our Chip Design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of Chip Design related logic. Day to day tasks include:

• Understand and analyze uArch definitions.
• Implement verification components to verify RTL meets specifications.
• Collaborate with our RTL, Arch and uArch teams.
• Work on logic related to switch design.

Requirements:

• A Bachelor’s Degree in Electrical Engineering, Computer Engineering or Computer Science, or equivalent experience.
• 5+ years of hardware description language expertise and verification background required
• Strong communication and interpersonal skills are required along with the work in a dynamic environment.
• A strong background in computer communication is highly desirable.

Preferred Qualifications:

• Experience with computer communication/networking

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Requirements:

• B.SC./ M.SC. in Electrical Engineering.
• At least 5+ years of hands-on STA experience.
• Experience in Prime Time and signoff methodologies.
• A great teammate who thrives in a collaborative environment.
• AI tools orientation or alternatively a desire to learn.

Preferred skills:

• Agentic Frameworks.
• AI prompting experience.
• Experience in Linux environments.
• TCL, Python, shell scripting abilities.
• Experience with data collection and analysis.

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Key responsibilities include:

• Providing leadership in the design and implementation of our large-scale compute cloud
• Identifying architectural changes or completely innovative approaches in our cloud architecture and design
• Helping with strategic challenges we encounter, including effective resource utilization in a heterogeneous compute environment, evolving our private/public cloud strategy, capacity modeling, and planning for multi-year growth and scaling across our global computing environment!

Requirements include:

• B.Sc in Computer Science, Electrical Engineering or related field or equivalent experience
• 8+ years of experience designing and operating large-scale compute infrastructure
• Experience with job schedulers such as IBM/Platform LSF, SGE, SLURM, Marathon, Chronos
• Solid understanding of cluster configuration management tools – Ansible, Puppet, Chef, Salt
• Good experience providing compute services using a public cloud (AWS, Azure, Google Cloud)
• Strong script-writing skills: Python, Bash, Perl
• Knowledge of and/or experience deploying PaaS microservices – Docker, Docker Swarm, Kubernetes
• Understanding of fast distributed and network attached storage solutions and Linux file systems, ability to recommend and implement solutions to improve OS performance and reliability.

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Responsibilities:

• Full responsibility of products materials sourcing and supplier management
• Assist Engineering designing in preferred supplier products for NVIDIA's innovative devices
• Manage vendors' business relationships and all aspects of commercial engagements.
• Responsible for Product cost and supply management Multiple teamworks with CMs, suppliers and NVIDIA internal teams (R&D, Operations, Finance, Sales)
• Develop, modify, and implement commodity strategy to align with NVIDIA needs.
• Analyze suppliers' landscape including components, modules, and CM spaces to ensure NVIDIA is aligned with the best suitable partners.

Requirements:

• BS in Industrial Engineering or similar or equivalent experience
• 8+ years of proven experience in managing suppliers
• Technical skills and Product management skills in electronic/boards industries
• Customer-focused, Self-sufficient & able to take charge of tasks from start to finish, Able to balance multiple tasks and Driven by goals – achieve objectives and deadlines
• Proficient in fast paced, innovative, and multi-faceted organization while influencing cross-functional teams to align strategy.
• Teammate with good interpersonal relations Languages: English - required: Good writing and verbal skills

Ways to stand out from the crowd:

• Experience working with Global suppliers and proven track record in driving sourcing initiatives
• Background with electrical and mechanical components market.
• Familiar with ERP & PLM systems
• Knowledge in components and boards design and production process
• CMs' management – understand CM procurement cycle and be able to guide the communication in between CM and suppliers.

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Responsibilities:

• Lead and serve as the technical focal point for the integration of PHY system aspects and optical (CPO) electrical subsystems, ensuring their performance.
• Hands on cross-disciplinary testing efforts and lab work, collaborating with system architecture, optics, silicon, thermal, mechanical, signal/power integrity, and software teams.
• Characterization and testing of optical links using lab equipment (e.g., oscilloscopes, BER testers, optical spectrum analyzers and simulation tools).
• Driving product scalability, working with internal partners,qualification teams to transition designs from prototype to high-volume production.
• Documentation and reporting of design specifications, test results, and performance metrics.

Requirements:

• B.Sc. in Electrical Engineering from a leading university or equivalent experience
• 8+ years of relevant experience
• Strong analytical and problem-solving skills
• Excellent communication and collaboration abilities
• Enthusiasm for working on multidisciplinary projects
• Solid engineering intuition and understanding of physical trade-offs
• Ability to thrive in a fast-paced development environment

Preferred Qualifications:

• M.Sc./PhD degree in electrical engineering
• Experience in high-speed Transceiver and PHY design is highly valued
• Strong knowledge and experience in electro-optic communication or high-speed signals and analog circuits
• Hands on experience with optoelectrical lab work and validation

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Deploy, manage and maintain large scale AI Data Centers, including control, network and storage stack. Work with multiple software and hardware teams to optimize the clusters networking health and performance. Develop and implement automation scripts for network, compute and storage operations and deployments. Supporting Research & Development activities and engaging in POCs/POVs for future improvements.

Key requirements include:

• B.Sc. in Engineering or CCNP certificate
• 8+ years of proficiency in networking fundamentals, configuring ethernet switches, understanding the TCP/IP stack, and data center architecture
• Excellent knowledge of Windows and Linux (Redhat/CentOS and Ubuntu) networking (sockets, firewalls, iptables, wireshark, etc.) and internals, ACLs and OS level security protection and common protocols e.g. TCP, DHCP, DNS, etc.
• Proactive individual with the ability to work independently, prioritizing tasks to optimize technology and enhance customer experience
• Provides ad-hoc knowledge transfers, develops handover materials, and offers deployment support for engagements

To stand out from the crowd, you should have:

• Combination of interpersonal skills and technical competence
• Knowledge of HPC and AI solution technologies from CPUs and GPUs to high speed interconnects and supporting software
• Experience with multiple storage solutions such as Lustre, GPFS, and newer and emerging storage technologies
• Automation tooling background (Ansible, Salt, Puppet etc.)

NVIDIA is widely considered to be one of the technology world's most desirable employers! We have some of the most forward-thinking and hardworking individuals in the world working for us. If you're creative and autonomous, we want to hear from you!

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Responsibilities:

• Design and develop automated tests for networking Switches and Adapters while working closely with the HW, ASIC, and SW Engineering teams to achieve a reliable test with high coverage
• Exposed to various aspects of design, DFT, and test of NVIDIA's next-generation network products
• Take a significant part in the definition and development of tests from the development level to the final test of Network-Systems
• Utilize test suites to find, debug and resolve problems with production process
• Ability to drive projects to full execution in time and working under pressure of schedule and multi project environment
• Supporting and fixing bugs of existing code. Supporting production lines for: deployments, patches, maintenance
• Test Verification and Validation (both HW and SW). Troubleshooting and streamlining/optimizing our testing procedures

Requirements:

• BSc/MSc or equivalent engineering degree in Computer Science, Electrical Engineering, or a related field
• 3+ years of related experience in software development and design
• 3+ years of proven experience in Python or similar platform
• Excellent knowledge of a version control system (preferably GIT)
• Linux based development
• Experience with Software/Hardware products integration
• Excellent communication skills with hands-on experience collaborating with global teams
• Strong teamwork skills, with the ability to collaborate effectively across cross-functional teams

Nice to Have:

• Familiarity with product manufacturing flows and processes
• A highly motivated teammate who always stays up to date with new technologies and test methodologies
• Exposure and knowledge around application development, configuration management and automation
• Experience in tools/services development. Creativity – find solutions for challenging requirements
• Strong leadership skills to drive a project from definition through mass production.

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