<?xml version="1.0" encoding="UTF-8"?>
<source>
  <jobs>
    <job>
      <externalid>477aff29-633</externalid>
      <title>ASIC Engineer</title>
      <description><![CDATA[<p>Join a multi-disciplined engineering team at Cisco focused on designing analog circuits and components for ASICSs deployed across a range of Cisco platforms. You will collaborate with industry-leading experts to meet power, performance, and area goals for high-volume, high-quality products.</p>
<p><strong>Your Impact</strong></p>
<ul>
<li>Collaborate on the definition and design of high-performance analog circuits.</li>
<li>Own physical design of analog circuits.</li>
<li>Lead design verification activities and write comprehensive simulation plans and test benches.</li>
<li>Drive signal and power integrity for ASIC integration and guide design changes.</li>
<li>Analyse and validate ASIC subsystems and debug complex code.</li>
</ul>
<p><strong>Minimum Qualifications</strong></p>
<ul>
<li>Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 5+ years of ASIC design experience; or Master’s degree with 3+ years; or PhD with relevant experience.</li>
<li>Strong background in analog and mixed-signal circuit design, layout, and verification.</li>
<li>Experience with analog circuit design and verification tools.</li>
<li>Experience with physical design, signal and power integrity, and debugging complex code.</li>
<li>Ability to document functional and user specifications effectively.</li>
</ul>
<p><strong>Preferred Qualifications</strong></p>
<ul>
<li>Advanced knowledge of ASIC design tools, methodologies, and industry best practices.</li>
<li>Expertise in power, performance, and area optimization for ASICs.</li>
<li>Familiarity with ASIC tapeout processes and block-level issue resolution.</li>
<li>Ability to drive development milestones and lead design reviews effectively.</li>
</ul>
<p style="margin-top:24px;font-size:13px;color:#666;">Job Data by <a href="https://yubhub.co">YubHub</a>.</p>]]></description>
      <jobtype>full-time</jobtype>
      <experiencelevel>senior</experiencelevel>
      <workarrangement>onsite</workarrangement>
      <salaryrange></salaryrange>
      <skills>analog circuit design, mixed-signal circuit design, ASIC design, physical design, signal and power integrity, debugging complex code, ASIC design tools, power, performance, and area optimization, ASIC tapeout processes, design reviews</skills>
      <benefits></benefits>
      <licences></licences>
      <category>Engineering</category>
      <industry>Technology</industry>
      <employername>Cisco</employername>
      <employerlogo>https://logos.yubhub.co/cisco.com.png</employerlogo>
      <employerdescription>Cisco is a technology company that creates solutions to power how humans and technology work together across the physical and digital worlds.</employerdescription>
      <employerwebsite>https://www.cisco.com</employerwebsite>
      <compensationcurrency></compensationcurrency>
      <compensationmin></compensationmin>
      <compensationmax></compensationmax>
      <compensationinterval></compensationinterval>
      <applyto>https://cisco.wd5.myworkdayjobs.com/en-US/Cisco_Careers/job/Thalwil-Switzerland/ASIC-Engineer_2021353-1</applyto>
      <location>Thalwil</location>
      <city>Thalwil</city>
      <state></state>
      <postalcode></postalcode>
      <country></country>
      <postedate>2026-10-24</postedate>
      <visasponsorship>unknown</visasponsorship>
      <visasponsorshiptext><![CDATA[]]></visasponsorshiptext>
      <workauthorisation>unknown</workauthorisation>
    </job>
  </jobs>
</source>